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25#include <linux/mm.h>
26#include <linux/init.h>
27#include <mach/hardware.h>
28#include <mach/common.h>
29#include <asm/pgtable.h>
30#include <asm/mach/map.h>
31
32
33
34
35static struct map_desc mxc_io_desc[] __initdata = {
36 {
37 .virtual = MXC91231_L2CC_BASE_ADDR_VIRT,
38 .pfn = __phys_to_pfn(MXC91231_L2CC_BASE_ADDR),
39 .length = MXC91231_L2CC_SIZE,
40 .type = MT_DEVICE,
41 }, {
42 .virtual = MXC91231_X_MEMC_BASE_ADDR_VIRT,
43 .pfn = __phys_to_pfn(MXC91231_X_MEMC_BASE_ADDR),
44 .length = MXC91231_X_MEMC_SIZE,
45 .type = MT_DEVICE,
46 }, {
47 .virtual = MXC91231_ROMP_BASE_ADDR_VIRT,
48 .pfn = __phys_to_pfn(MXC91231_ROMP_BASE_ADDR),
49 .length = MXC91231_ROMP_SIZE,
50 .type = MT_DEVICE,
51 }, {
52 .virtual = MXC91231_AVIC_BASE_ADDR_VIRT,
53 .pfn = __phys_to_pfn(MXC91231_AVIC_BASE_ADDR),
54 .length = MXC91231_AVIC_SIZE,
55 .type = MT_DEVICE,
56 }, {
57 .virtual = MXC91231_AIPS1_BASE_ADDR_VIRT,
58 .pfn = __phys_to_pfn(MXC91231_AIPS1_BASE_ADDR),
59 .length = MXC91231_AIPS1_SIZE,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = MXC91231_SPBA0_BASE_ADDR_VIRT,
63 .pfn = __phys_to_pfn(MXC91231_SPBA0_BASE_ADDR),
64 .length = MXC91231_SPBA0_SIZE,
65 .type = MT_DEVICE,
66 }, {
67 .virtual = MXC91231_SPBA1_BASE_ADDR_VIRT,
68 .pfn = __phys_to_pfn(MXC91231_SPBA1_BASE_ADDR),
69 .length = MXC91231_SPBA1_SIZE,
70 .type = MT_DEVICE,
71 }, {
72 .virtual = MXC91231_AIPS2_BASE_ADDR_VIRT,
73 .pfn = __phys_to_pfn(MXC91231_AIPS2_BASE_ADDR),
74 .length = MXC91231_AIPS2_SIZE,
75 .type = MT_DEVICE,
76 },
77};
78
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81
82
83
84void __init mxc91231_map_io(void)
85{
86 mxc_set_cpu_type(MXC_CPU_MXC91231);
87
88 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
89}
90
91void __init mxc91231_init_irq(void)
92{
93 mxc_init_irq(MXC91231_IO_ADDRESS(MXC91231_AVIC_BASE_ADDR));
94}
95