1
2
3
4
5
6
7
8
9
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/irq.h>
15#include <linux/delay.h>
16#include <linux/serial.h>
17#include <linux/tty.h>
18#include <linux/serial_8250.h>
19#include <linux/serial_reg.h>
20#include <linux/clk.h>
21#include <linux/io.h>
22
23#include <asm/mach-types.h>
24
25#include <mach/board.h>
26#include <mach/mux.h>
27#include <mach/gpio.h>
28#include <mach/fpga.h>
29
30static struct clk * uart1_ck;
31static struct clk * uart2_ck;
32static struct clk * uart3_ck;
33
34static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
35 int offset)
36{
37 offset <<= up->regshift;
38 return (unsigned int)__raw_readb(up->membase + offset);
39}
40
41static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
42 int value)
43{
44 offset <<= p->regshift;
45 __raw_writeb(value, p->membase + offset);
46}
47
48
49
50
51
52
53static void __init omap_serial_reset(struct plat_serial8250_port *p)
54{
55 omap_serial_outp(p, UART_OMAP_MDR1, 0x07);
56 omap_serial_outp(p, UART_OMAP_SCR, 0x08);
57 omap_serial_outp(p, UART_OMAP_MDR1, 0x00);
58
59 if (!cpu_is_omap15xx()) {
60 omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
61 while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
62 }
63}
64
65static struct plat_serial8250_port serial_platform_data[] = {
66 {
67 .membase = OMAP1_IO_ADDRESS(OMAP_UART1_BASE),
68 .mapbase = OMAP_UART1_BASE,
69 .irq = INT_UART1,
70 .flags = UPF_BOOT_AUTOCONF,
71 .iotype = UPIO_MEM,
72 .regshift = 2,
73 .uartclk = OMAP16XX_BASE_BAUD * 16,
74 },
75 {
76 .membase = OMAP1_IO_ADDRESS(OMAP_UART2_BASE),
77 .mapbase = OMAP_UART2_BASE,
78 .irq = INT_UART2,
79 .flags = UPF_BOOT_AUTOCONF,
80 .iotype = UPIO_MEM,
81 .regshift = 2,
82 .uartclk = OMAP16XX_BASE_BAUD * 16,
83 },
84 {
85 .membase = OMAP1_IO_ADDRESS(OMAP_UART3_BASE),
86 .mapbase = OMAP_UART3_BASE,
87 .irq = INT_UART3,
88 .flags = UPF_BOOT_AUTOCONF,
89 .iotype = UPIO_MEM,
90 .regshift = 2,
91 .uartclk = OMAP16XX_BASE_BAUD * 16,
92 },
93 { },
94};
95
96static struct platform_device serial_device = {
97 .name = "serial8250",
98 .id = PLAT8250_DEV_PLATFORM,
99 .dev = {
100 .platform_data = serial_platform_data,
101 },
102};
103
104
105
106
107
108
109void __init omap_serial_init(void)
110{
111 int i;
112
113 if (cpu_is_omap730()) {
114 serial_platform_data[0].regshift = 0;
115 serial_platform_data[1].regshift = 0;
116 serial_platform_data[0].irq = INT_730_UART_MODEM_1;
117 serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
118 }
119
120 if (cpu_is_omap850()) {
121 serial_platform_data[0].regshift = 0;
122 serial_platform_data[1].regshift = 0;
123 serial_platform_data[0].irq = INT_850_UART_MODEM_1;
124 serial_platform_data[1].irq = INT_850_UART_MODEM_IRDA_2;
125 }
126
127 if (cpu_is_omap15xx()) {
128 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
129 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
130 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
131 }
132
133 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
134 switch (i) {
135 case 0:
136 uart1_ck = clk_get(NULL, "uart1_ck");
137 if (IS_ERR(uart1_ck))
138 printk("Could not get uart1_ck\n");
139 else {
140 clk_enable(uart1_ck);
141 if (cpu_is_omap15xx())
142 clk_set_rate(uart1_ck, 12000000);
143 }
144 break;
145 case 1:
146 uart2_ck = clk_get(NULL, "uart2_ck");
147 if (IS_ERR(uart2_ck))
148 printk("Could not get uart2_ck\n");
149 else {
150 clk_enable(uart2_ck);
151 if (cpu_is_omap15xx())
152 clk_set_rate(uart2_ck, 12000000);
153 else
154 clk_set_rate(uart2_ck, 48000000);
155 }
156 break;
157 case 2:
158 uart3_ck = clk_get(NULL, "uart3_ck");
159 if (IS_ERR(uart3_ck))
160 printk("Could not get uart3_ck\n");
161 else {
162 clk_enable(uart3_ck);
163 if (cpu_is_omap15xx())
164 clk_set_rate(uart3_ck, 12000000);
165 }
166 break;
167 }
168 omap_serial_reset(&serial_platform_data[i]);
169 }
170}
171
172#ifdef CONFIG_OMAP_SERIAL_WAKE
173
174static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id)
175{
176
177 return IRQ_HANDLED;
178}
179
180
181
182
183
184
185void omap_serial_wake_trigger(int enable)
186{
187 if (!cpu_is_omap16xx())
188 return;
189
190 if (uart1_ck != NULL) {
191 if (enable)
192 omap_cfg_reg(V14_16XX_GPIO37);
193 else
194 omap_cfg_reg(V14_16XX_UART1_RX);
195 }
196 if (uart2_ck != NULL) {
197 if (enable)
198 omap_cfg_reg(R9_16XX_GPIO18);
199 else
200 omap_cfg_reg(R9_16XX_UART2_RX);
201 }
202 if (uart3_ck != NULL) {
203 if (enable)
204 omap_cfg_reg(L14_16XX_GPIO49);
205 else
206 omap_cfg_reg(L14_16XX_UART3_RX);
207 }
208}
209
210static void __init omap_serial_set_port_wakeup(int gpio_nr)
211{
212 int ret;
213
214 ret = gpio_request(gpio_nr, "UART wake");
215 if (ret < 0) {
216 printk(KERN_ERR "Could not request UART wake GPIO: %i\n",
217 gpio_nr);
218 return;
219 }
220 gpio_direction_input(gpio_nr);
221 ret = request_irq(gpio_to_irq(gpio_nr), &omap_serial_wake_interrupt,
222 IRQF_TRIGGER_RISING, "serial wakeup", NULL);
223 if (ret) {
224 gpio_free(gpio_nr);
225 printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",
226 gpio_nr);
227 return;
228 }
229 enable_irq_wake(gpio_to_irq(gpio_nr));
230}
231
232static int __init omap_serial_wakeup_init(void)
233{
234 if (!cpu_is_omap16xx())
235 return 0;
236
237 if (uart1_ck != NULL)
238 omap_serial_set_port_wakeup(37);
239 if (uart2_ck != NULL)
240 omap_serial_set_port_wakeup(18);
241 if (uart3_ck != NULL)
242 omap_serial_set_port_wakeup(49);
243
244 return 0;
245}
246late_initcall(omap_serial_wakeup_init);
247
248#endif
249
250static int __init omap_init(void)
251{
252 return platform_device_register(&serial_device);
253}
254arch_initcall(omap_init);
255