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12#include <linux/err.h>
13#include <linux/io.h>
14#include <linux/module.h>
15#include <linux/platform_device.h>
16#include <linux/interrupt.h>
17#include <linux/delay.h>
18#include <linux/gpio.h>
19#include <linux/mmc/host.h>
20#include <linux/regulator/consumer.h>
21
22#include <mach/hardware.h>
23#include <mach/control.h>
24#include <mach/mmc.h>
25#include <mach/board.h>
26
27#include "mmc-twl4030.h"
28
29
30#if defined(CONFIG_REGULATOR) && \
31 (defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE))
32
33static u16 control_pbias_offset;
34static u16 control_devconf1_offset;
35
36#define HSMMC_NAME_LEN 9
37
38static struct twl_mmc_controller {
39 struct omap_mmc_platform_data *mmc;
40
41
42
43
44
45
46 struct regulator *vcc;
47 struct regulator *vcc_aux;
48 char name[HSMMC_NAME_LEN + 1];
49} hsmmc[OMAP34XX_NR_MMC];
50
51static int twl_mmc_card_detect(int irq)
52{
53 unsigned i;
54
55 for (i = 0; i < ARRAY_SIZE(hsmmc); i++) {
56 struct omap_mmc_platform_data *mmc;
57
58 mmc = hsmmc[i].mmc;
59 if (!mmc)
60 continue;
61 if (irq != mmc->slots[0].card_detect_irq)
62 continue;
63
64
65 return !gpio_get_value_cansleep(mmc->slots[0].switch_pin);
66 }
67 return -ENOSYS;
68}
69
70static int twl_mmc_get_ro(struct device *dev, int slot)
71{
72 struct omap_mmc_platform_data *mmc = dev->platform_data;
73
74
75 return gpio_get_value_cansleep(mmc->slots[0].gpio_wp);
76}
77
78static int twl_mmc_get_cover_state(struct device *dev, int slot)
79{
80 struct omap_mmc_platform_data *mmc = dev->platform_data;
81
82
83 return !gpio_get_value_cansleep(mmc->slots[0].switch_pin);
84}
85
86
87
88
89static int twl_mmc_late_init(struct device *dev)
90{
91 struct omap_mmc_platform_data *mmc = dev->platform_data;
92 int ret = 0;
93 int i;
94
95
96 if (gpio_is_valid(mmc->slots[0].switch_pin)) {
97 ret = gpio_request(mmc->slots[0].switch_pin, "mmc_cd");
98 if (ret)
99 goto done;
100 ret = gpio_direction_input(mmc->slots[0].switch_pin);
101 if (ret)
102 goto err;
103 }
104
105
106 for (i = 0; i < ARRAY_SIZE(hsmmc); i++) {
107 if (hsmmc[i].name == mmc->slots[0].name) {
108 struct regulator *reg;
109
110 hsmmc[i].mmc = mmc;
111
112 reg = regulator_get(dev, "vmmc");
113 if (IS_ERR(reg)) {
114 dev_dbg(dev, "vmmc regulator missing\n");
115
116
117
118
119 if (i != 0)
120 break;
121 ret = PTR_ERR(reg);
122 hsmmc[i].vcc = NULL;
123 goto err;
124 }
125 hsmmc[i].vcc = reg;
126 mmc->slots[0].ocr_mask = mmc_regulator_get_ocrmask(reg);
127
128
129 reg = regulator_get(dev, "vmmc_aux");
130 hsmmc[i].vcc_aux = IS_ERR(reg) ? NULL : reg;
131
132
133
134
135
136
137
138
139 if (regulator_is_enabled(hsmmc[i].vcc) > 0) {
140 regulator_enable(hsmmc[i].vcc);
141 regulator_disable(hsmmc[i].vcc);
142 }
143 if (hsmmc[i].vcc_aux) {
144 if (regulator_is_enabled(reg) > 0) {
145 regulator_enable(reg);
146 regulator_disable(reg);
147 }
148 }
149
150 break;
151 }
152 }
153
154 return 0;
155
156err:
157 gpio_free(mmc->slots[0].switch_pin);
158done:
159 mmc->slots[0].card_detect_irq = 0;
160 mmc->slots[0].card_detect = NULL;
161
162 dev_err(dev, "err %d configuring card detect\n", ret);
163 return ret;
164}
165
166static void twl_mmc_cleanup(struct device *dev)
167{
168 struct omap_mmc_platform_data *mmc = dev->platform_data;
169 int i;
170
171 gpio_free(mmc->slots[0].switch_pin);
172 for(i = 0; i < ARRAY_SIZE(hsmmc); i++) {
173 regulator_put(hsmmc[i].vcc);
174 regulator_put(hsmmc[i].vcc_aux);
175 }
176}
177
178#ifdef CONFIG_PM
179
180static int twl_mmc_suspend(struct device *dev, int slot)
181{
182 struct omap_mmc_platform_data *mmc = dev->platform_data;
183
184 disable_irq(mmc->slots[0].card_detect_irq);
185 return 0;
186}
187
188static int twl_mmc_resume(struct device *dev, int slot)
189{
190 struct omap_mmc_platform_data *mmc = dev->platform_data;
191
192 enable_irq(mmc->slots[0].card_detect_irq);
193 return 0;
194}
195
196#else
197#define twl_mmc_suspend NULL
198#define twl_mmc_resume NULL
199#endif
200
201#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
202
203static int twl4030_mmc_get_context_loss(struct device *dev)
204{
205
206 return 0;
207}
208
209#else
210#define twl4030_mmc_get_context_loss NULL
211#endif
212
213static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
214 int vdd)
215{
216 u32 reg;
217 int ret = 0;
218 struct twl_mmc_controller *c = &hsmmc[0];
219 struct omap_mmc_platform_data *mmc = dev->platform_data;
220
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228
229
230
231 if (power_on) {
232 if (cpu_is_omap2430()) {
233 reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1);
234 if ((1 << vdd) >= MMC_VDD_30_31)
235 reg |= OMAP243X_MMC1_ACTIVE_OVERWRITE;
236 else
237 reg &= ~OMAP243X_MMC1_ACTIVE_OVERWRITE;
238 omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1);
239 }
240
241 if (mmc->slots[0].internal_clock) {
242 reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
243 reg |= OMAP2_MMCSDIO1ADPCLKISEL;
244 omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0);
245 }
246
247 reg = omap_ctrl_readl(control_pbias_offset);
248 reg |= OMAP2_PBIASSPEEDCTRL0;
249 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
250 omap_ctrl_writel(reg, control_pbias_offset);
251
252 ret = mmc_regulator_set_ocr(c->vcc, vdd);
253
254
255 msleep(100);
256 reg = omap_ctrl_readl(control_pbias_offset);
257 reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0);
258 if ((1 << vdd) <= MMC_VDD_165_195)
259 reg &= ~OMAP2_PBIASLITEVMODE0;
260 else
261 reg |= OMAP2_PBIASLITEVMODE0;
262 omap_ctrl_writel(reg, control_pbias_offset);
263 } else {
264 reg = omap_ctrl_readl(control_pbias_offset);
265 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
266 omap_ctrl_writel(reg, control_pbias_offset);
267
268 ret = mmc_regulator_set_ocr(c->vcc, 0);
269
270
271 msleep(100);
272 reg = omap_ctrl_readl(control_pbias_offset);
273 reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 |
274 OMAP2_PBIASLITEVMODE0);
275 omap_ctrl_writel(reg, control_pbias_offset);
276 }
277
278 return ret;
279}
280
281static int twl_mmc23_set_power(struct device *dev, int slot, int power_on, int vdd)
282{
283 int ret = 0;
284 struct twl_mmc_controller *c = NULL;
285 struct omap_mmc_platform_data *mmc = dev->platform_data;
286 int i;
287
288 for (i = 1; i < ARRAY_SIZE(hsmmc); i++) {
289 if (mmc == hsmmc[i].mmc) {
290 c = &hsmmc[i];
291 break;
292 }
293 }
294
295 if (c == NULL)
296 return -ENODEV;
297
298
299
300
301 if (!c->vcc)
302 return 0;
303
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312
313
314
315
316
317 if (power_on) {
318
319 if (mmc->slots[0].internal_clock) {
320 u32 reg;
321
322 reg = omap_ctrl_readl(control_devconf1_offset);
323 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
324 omap_ctrl_writel(reg, control_devconf1_offset);
325 }
326 ret = mmc_regulator_set_ocr(c->vcc, vdd);
327
328 if (ret == 0 && c->vcc_aux) {
329 ret = regulator_enable(c->vcc_aux);
330 if (ret < 0)
331 ret = mmc_regulator_set_ocr(c->vcc, 0);
332 }
333 } else {
334 if (c->vcc_aux && (ret = regulator_is_enabled(c->vcc_aux)) > 0)
335 ret = regulator_disable(c->vcc_aux);
336 if (ret == 0)
337 ret = mmc_regulator_set_ocr(c->vcc, 0);
338 }
339
340 return ret;
341}
342
343static int twl_mmc1_set_sleep(struct device *dev, int slot, int sleep, int vdd,
344 int cardsleep)
345{
346 struct twl_mmc_controller *c = &hsmmc[0];
347 int mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL;
348
349 return regulator_set_mode(c->vcc, mode);
350}
351
352static int twl_mmc23_set_sleep(struct device *dev, int slot, int sleep, int vdd,
353 int cardsleep)
354{
355 struct twl_mmc_controller *c = NULL;
356 struct omap_mmc_platform_data *mmc = dev->platform_data;
357 int i, err, mode;
358
359 for (i = 1; i < ARRAY_SIZE(hsmmc); i++) {
360 if (mmc == hsmmc[i].mmc) {
361 c = &hsmmc[i];
362 break;
363 }
364 }
365
366 if (c == NULL)
367 return -ENODEV;
368
369
370
371
372
373 if (!c->vcc)
374 return 0;
375
376 mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL;
377
378 if (!c->vcc_aux)
379 return regulator_set_mode(c->vcc, mode);
380
381 if (cardsleep) {
382
383 struct regulator *vcc_aux = c->vcc_aux;
384
385 c->vcc_aux = NULL;
386 if (sleep)
387 err = twl_mmc23_set_power(dev, slot, 0, 0);
388 else
389 err = twl_mmc23_set_power(dev, slot, 1, vdd);
390 c->vcc_aux = vcc_aux;
391 } else
392 err = regulator_set_mode(c->vcc, mode);
393 if (err)
394 return err;
395 return regulator_set_mode(c->vcc_aux, mode);
396}
397
398static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
399
400void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
401{
402 struct twl4030_hsmmc_info *c;
403 int nr_hsmmc = ARRAY_SIZE(hsmmc_data);
404
405 if (cpu_is_omap2430()) {
406 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
407 control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
408 nr_hsmmc = 2;
409 } else {
410 control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
411 control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
412 }
413
414 for (c = controllers; c->mmc; c++) {
415 struct twl_mmc_controller *twl = hsmmc + c->mmc - 1;
416 struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
417
418 if (!c->mmc || c->mmc > nr_hsmmc) {
419 pr_debug("MMC%d: no such controller\n", c->mmc);
420 continue;
421 }
422 if (mmc) {
423 pr_debug("MMC%d: already configured\n", c->mmc);
424 continue;
425 }
426
427 mmc = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL);
428 if (!mmc) {
429 pr_err("Cannot allocate memory for mmc device!\n");
430 return;
431 }
432
433 if (c->name)
434 strncpy(twl->name, c->name, HSMMC_NAME_LEN);
435 else
436 snprintf(twl->name, ARRAY_SIZE(twl->name),
437 "mmc%islot%i", c->mmc, 1);
438 mmc->slots[0].name = twl->name;
439 mmc->nr_slots = 1;
440 mmc->slots[0].wires = c->wires;
441 mmc->slots[0].internal_clock = !c->ext_clock;
442 mmc->dma_mask = 0xffffffff;
443 mmc->init = twl_mmc_late_init;
444
445
446 if (gpio_is_valid(c->gpio_cd)) {
447 mmc->cleanup = twl_mmc_cleanup;
448 mmc->suspend = twl_mmc_suspend;
449 mmc->resume = twl_mmc_resume;
450
451 mmc->slots[0].switch_pin = c->gpio_cd;
452 mmc->slots[0].card_detect_irq = gpio_to_irq(c->gpio_cd);
453 if (c->cover_only)
454 mmc->slots[0].get_cover_state = twl_mmc_get_cover_state;
455 else
456 mmc->slots[0].card_detect = twl_mmc_card_detect;
457 } else
458 mmc->slots[0].switch_pin = -EINVAL;
459
460 mmc->get_context_loss_count =
461 twl4030_mmc_get_context_loss;
462
463
464 if (gpio_is_valid(c->gpio_wp)) {
465 gpio_request(c->gpio_wp, "mmc_wp");
466 gpio_direction_input(c->gpio_wp);
467
468 mmc->slots[0].gpio_wp = c->gpio_wp;
469 mmc->slots[0].get_ro = twl_mmc_get_ro;
470 } else
471 mmc->slots[0].gpio_wp = -EINVAL;
472
473 if (c->nonremovable)
474 mmc->slots[0].nonremovable = 1;
475
476 if (c->power_saving)
477 mmc->slots[0].power_saving = 1;
478
479
480
481
482
483
484
485 mmc->slots[0].ocr_mask = c->ocr_mask;
486
487 switch (c->mmc) {
488 case 1:
489
490 mmc->slots[0].set_power = twl_mmc1_set_power;
491 mmc->slots[0].set_sleep = twl_mmc1_set_sleep;
492 break;
493 case 2:
494 if (c->ext_clock)
495 c->transceiver = 1;
496 if (c->transceiver && c->wires > 4)
497 c->wires = 4;
498
499 case 3:
500
501 mmc->slots[0].set_power = twl_mmc23_set_power;
502 mmc->slots[0].set_sleep = twl_mmc23_set_sleep;
503 break;
504 default:
505 pr_err("MMC%d configuration not supported!\n", c->mmc);
506 kfree(mmc);
507 continue;
508 }
509 hsmmc_data[c->mmc - 1] = mmc;
510 }
511
512 omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC);
513
514
515 for (c = controllers; c->mmc; c++) {
516 struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
517
518 if (!c->mmc || c->mmc > nr_hsmmc)
519 continue;
520 c->dev = mmc->dev;
521 }
522}
523
524#endif
525