LXR linux/arch/arm/mach-s3c2410/s3c2410.c

   1/* linux/arch/arm/mach-s3c2410/s3c2410.c
   2 *
   3 * Copyright (c) 2003-2005 Simtec Electronics
   4 *      Ben Dooks <ben@simtec.co.uk>
   5 *
   6 * http://www.simtec.co.uk/products/EB2410ITX/
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11*/
  12
  13#include <linux/kernel.h>
  14#include <linux/types.h>
  15#include <linux/interrupt.h>
  16#include <linux/list.h>
  17#include <linux/timer.h>
  18#include <linux/init.h>
  19#include <linux/clk.h>
  20#include <linux/sysdev.h>
  21#include <linux/serial_core.h>
  22#include <linux/platform_device.h>
  23#include <linux/io.h>
  24
  25#include <asm/mach/arch.h>
  26#include <asm/mach/map.h>
  27#include <asm/mach/irq.h>
  28
  29#include <mach/hardware.h>
  30#include <asm/irq.h>
  31
  32#include <plat/cpu-freq.h>
  33
  34#include <mach/regs-clock.h>
  35#include <plat/regs-serial.h>
  36
  37#include <plat/s3c2410.h>
  38#include <plat/cpu.h>
  39#include <plat/devs.h>
  40#include <plat/clock.h>
  41#include <plat/pll.h>
  42
  43/* Initial IO mappings */
  44
  45static struct map_desc s3c2410_iodesc[] __initdata = {
  46        IODESC_ENT(CLKPWR),
  47        IODESC_ENT(TIMER),
  48        IODESC_ENT(WATCHDOG),
  49};
  50
  51/* our uart devices */
  52
  53/* uart registration process */
  54
  55void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  56{
  57        s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no);
  58}
  59
  60/* s3c2410_map_io
  61 *
  62 * register the standard cpu IO areas, and any passed in from the
  63 * machine specific initialisation.
  64*/
  65
  66void __init s3c2410_map_io(void)
  67{
  68        iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
  69}
  70
  71void __init_or_cpufreq s3c2410_setup_clocks(void)
  72{
  73        struct clk *xtal_clk;
  74        unsigned long tmp;
  75        unsigned long xtal;
  76        unsigned long fclk;
  77        unsigned long hclk;
  78        unsigned long pclk;
  79
  80        xtal_clk = clk_get(NULL, "xtal");
  81        xtal = clk_get_rate(xtal_clk);
  82        clk_put(xtal_clk);
  83
  84        /* now we've got our machine bits initialised, work out what
  85         * clocks we've got */
  86
  87        fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
  88
  89        tmp = __raw_readl(S3C2410_CLKDIVN);
  90
  91        /* work out clock scalings */
  92
  93        hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
  94        pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
  95
  96        /* print brieft summary of clocks, etc */
  97
  98        printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
  99               print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
 100
 101        /* initialise the clocks here, to allow other things like the
 102         * console to use them
 103         */
 104
 105        s3c24xx_setup_clocks(fclk, hclk, pclk);
 106}
 107
 108/* fake ARMCLK for use with cpufreq, etc. */
 109
 110static struct clk s3c2410_armclk = {
 111        .name   = "armclk",
 112        .parent = &clk_f,
 113        .id     = -1,
 114};
 115
 116void __init s3c2410_init_clocks(int xtal)
 117{
 118        s3c24xx_register_baseclocks(xtal);
 119        s3c2410_setup_clocks();
 120        s3c2410_baseclk_add();
 121        s3c24xx_register_clock(&s3c2410_armclk);
 122}
 123
 124struct sysdev_class s3c2410_sysclass = {
 125        .name = "s3c2410-core",
 126};
 127
 128/* Note, we would have liked to name this s3c2410-core, but we cannot
 129 * register two sysdev_class with the same name.
 130 */
 131struct sysdev_class s3c2410a_sysclass = {
 132        .name = "s3c2410a-core",
 133};
 134
 135static struct sys_device s3c2410_sysdev = {
 136        .cls            = &s3c2410_sysclass,
 137};
 138
 139/* need to register class before we actually register the device, and
 140 * we also need to ensure that it has been initialised before any of the
 141 * drivers even try to use it (even if not on an s3c2410 based system)
 142 * as a driver which may support both 2410 and 2440 may try and use it.
 143*/
 144
 145static int __init s3c2410_core_init(void)
 146{
 147        return sysdev_class_register(&s3c2410_sysclass);
 148}
 149
 150core_initcall(s3c2410_core_init);
 151
 152static int __init s3c2410a_core_init(void)
 153{
 154        return sysdev_class_register(&s3c2410a_sysclass);
 155}
 156
 157core_initcall(s3c2410a_core_init);
 158
 159int __init s3c2410_init(void)
 160{
 161        printk("S3C2410: Initialising architecture\n");
 162
 163        return sysdev_register(&s3c2410_sysdev);
 164}
 165
 166int __init s3c2410a_init(void)
 167{
 168        s3c2410_sysdev.cls = &s3c2410a_sysclass;
 169        return s3c2410_init();
 170}
 171