1/* 2 * 3 * arch/arm/mach-u300/include/mach/gpio.h 4 * 5 * 6 * Copyright (C) 2007-2009 ST-Ericsson AB 7 * License terms: GNU General Public License (GPL) version 2 8 * GPIO block resgister definitions and inline macros for 9 * U300 GPIO COH 901 335 or COH 901 571/3 10 * Author: Linus Walleij <linus.walleij@stericsson.com> 11 */ 12 13#ifndef __MACH_U300_GPIO_H 14#define __MACH_U300_GPIO_H 15 16#include <linux/kernel.h> 17#include <linux/io.h> 18#include <mach/hardware.h> 19#include <asm/irq.h> 20 21/* Switch type depending on platform/chip variant */ 22#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) 23#define U300_COH901335 24#endif 25#if defined(CONFIG_MACH_U300_BS365) || defined(CONFIG_MACH_U300_BS335) 26#define U300_COH901571_3 27#endif 28 29/* Get base address for regs here */ 30#include "u300-regs.h" 31/* IRQ numbers */ 32#include "irqs.h" 33 34/* 35 * This is the GPIO block definitions. GPIO (General Purpose I/O) can be 36 * used for anything, and often is. The event/enable etc figures are for 37 * the lowermost pin (pin 0 on each port), shift this left to match your 38 * pin if you're gonna use these values. 39 */ 40#ifdef U300_COH901335 41#define U300_GPIO_PORTX_SPACING (0x1C) 42/* Port X Pin Data Register 32bit, this is both input and output (R/W) */ 43#define U300_GPIO_PXPDIR (0x00) 44#define U300_GPIO_PXPDOR (0x00) 45/* Port X Pin Config Register 32bit (R/W) */ 46#define U300_GPIO_PXPCR (0x04) 47#define U300_GPIO_PXPCR_ALL_PINS_MODE_MASK (0x0000FFFFUL) 48#define U300_GPIO_PXPCR_PIN_MODE_MASK (0x00000003UL) 49#define U300_GPIO_PXPCR_PIN_MODE_SHIFT (0x00000002UL) 50#define U300_GPIO_PXPCR_PIN_MODE_INPUT (0x00000000UL) 51#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL (0x00000001UL) 52#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_DRAIN (0x00000002UL) 53#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_SOURCE (0x00000003UL) 54/* Port X Interrupt Event Register 32bit (R/W) */ 55#define U300_GPIO_PXIEV (0x08) 56#define U300_GPIO_PXIEV_ALL_IRQ_EVENT_MASK (0x000000FFUL) 57#define U300_GPIO_PXIEV_IRQ_EVENT (0x00000001UL) 58/* Port X Interrupt Enable Register 32bit (R/W) */ 59#define U300_GPIO_PXIEN (0x0C) 60#define U300_GPIO_PXIEN_ALL_IRQ_ENABLE_MASK (0x000000FFUL) 61#define U300_GPIO_PXIEN_IRQ_ENABLE (0x00000001UL) 62/* Port X Interrupt Force Register 32bit (R/W) */ 63#define U300_GPIO_PXIFR (0x10) 64#define U300_GPIO_PXIFR_ALL_IRQ_FORCE_MASK (0x000000FFUL) 65#define U300_GPIO_PXIFR_IRQ_FORCE (0x00000001UL) 66/* Port X Interrupt Config Register 32bit (R/W) */ 67#define U300_GPIO_PXICR (0x14) 68#define U300_GPIO_PXICR_ALL_IRQ_CONFIG_MASK (0x000000FFUL) 69#define U300_GPIO_PXICR_IRQ_CONFIG_MASK (0x00000001UL) 70#define U300_GPIO_PXICR_IRQ_CONFIG_FALLING_EDGE (0x00000000UL) 71#define U300_GPIO_PXICR_IRQ_CONFIG_RISING_EDGE (0x00000001UL) 72/* Port X Pull-up Enable Register 32bit (R/W) */ 73#define U300_GPIO_PXPER (0x18) 74#define U300_GPIO_PXPER_ALL_PULL_UP_DISABLE_MASK (0x000000FFUL) 75#define U300_GPIO_PXPER_PULL_UP_DISABLE (0x00000001UL) 76/* Control Register 32bit (R/W) */ 77#define U300_GPIO_CR (0x54) 78#define U300_GPIO_CR_BLOCK_CLOCK_ENABLE (0x00000001UL) 79/* three ports of 8 bits each = GPIO pins 0..23 */ 80#define U300_GPIO_NUM_PORTS 3 81#define U300_GPIO_PINS_PER_PORT 8 82#define U300_GPIO_MAX (U300_GPIO_PINS_PER_PORT * U300_GPIO_NUM_PORTS - 1) 83#endif 84 85#ifdef U300_COH901571_3 86/* 87 * Control Register 32bit (R/W) 88 * bit 15-9 (mask 0x0000FE00) contains the number of cores. 8*cores 89 * gives the number of GPIO pins. 90 * bit 8-2 (mask 0x000001FC) contains the core version ID. 91 */ 92#define U300_GPIO_CR (0x00) 93#define U300_GPIO_CR_SYNC_SEL_ENABLE (0x00000002UL) 94#define U300_GPIO_CR_BLOCK_CLKRQ_ENABLE (0x00000001UL) 95#define U300_GPIO_PORTX_SPACING (0x30) 96/* Port X Pin Data INPUT Register 32bit (R/W) */ 97#define U300_GPIO_PXPDIR (0x04) 98/* Port X Pin Data OUTPUT Register 32bit (R/W) */ 99#define U300_GPIO_PXPDOR (0x08) 100/* Port X Pin Config Register 32bit (R/W) */ 101#define U300_GPIO_PXPCR (0x0C) 102#define U300_GPIO_PXPCR_ALL_PINS_MODE_MASK (0x0000FFFFUL) 103#define U300_GPIO_PXPCR_PIN_MODE_MASK (0x00000003UL) 104#define U300_GPIO_PXPCR_PIN_MODE_SHIFT (0x00000002UL) 105#define U300_GPIO_PXPCR_PIN_MODE_INPUT (0x00000000UL) 106#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL (0x00000001UL) 107#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_DRAIN (0x00000002UL) 108#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_SOURCE (0x00000003UL) 109/* Port X Pull-up Enable Register 32bit (R/W) */ 110#define U300_GPIO_PXPER (0x10) 111#define U300_GPIO_PXPER_ALL_PULL_UP_DISABLE_MASK (0x000000FFUL) 112#define U300_GPIO_PXPER_PULL_UP_DISABLE (0x00000001UL) 113/* Port X Interrupt Event Register 32bit (R/W) */ 114#define U300_GPIO_PXIEV (0x14) 115#define U300_GPIO_PXIEV_ALL_IRQ_EVENT_MASK (0x000000FFUL) 116#define U300_GPIO_PXIEV_IRQ_EVENT (0x00000001UL) 117/* Port X Interrupt Enable Register 32bit (R/W) */ 118#define U300_GPIO_PXIEN (0x18) 119#define U300_GPIO_PXIEN_ALL_IRQ_ENABLE_MASK (0x000000FFUL) 120#define U300_GPIO_PXIEN_IRQ_ENABLE (0x00000001UL) 121/* Port X Interrupt Force Register 32bit (R/W) */ 122#define U300_GPIO_PXIFR (0x1C) 123#define U300_GPIO_PXIFR_ALL_IRQ_FORCE_MASK (0x000000FFUL) 124#define U300_GPIO_PXIFR_IRQ_FORCE (0x00000001UL) 125/* Port X Interrupt Config Register 32bit (R/W) */ 126#define U300_GPIO_PXICR (0x20) 127#define U300_GPIO_PXICR_ALL_IRQ_CONFIG_MASK (0x000000FFUL) 128#define U300_GPIO_PXICR_IRQ_CONFIG_MASK (0x00000001UL) 129#define U300_GPIO_PXICR_IRQ_CONFIG_FALLING_EDGE (0x00000000UL) 130#define U300_GPIO_PXICR_IRQ_CONFIG_RISING_EDGE (0x00000001UL) 131#ifdef CONFIG_MACH_U300_BS335 132/* seven ports of 8 bits each = GPIO pins 0..55 */ 133#define U300_GPIO_NUM_PORTS 7 134#else 135/* five ports of 8 bits each = GPIO pins 0..39 */ 136#define U300_GPIO_NUM_PORTS 5 137#endif 138#define U300_GPIO_PINS_PER_PORT 8 139#define U300_GPIO_MAX (U300_GPIO_PINS_PER_PORT * U300_GPIO_NUM_PORTS - 1) 140#endif 141 142/* 143 * Individual pin assignments for the B26/S26. Notice that the 144 * actual usage of these pins depends on the PAD MUX settings, that 145 * is why the same number can potentially appear several times. 146 * In the reference design each pin is only used for one purpose. 147 * These were determined by inspecting the B26/S26 schematic: 148 * 2/1911-ROA 128 1603 149 */ 150#ifdef CONFIG_MACH_U300_BS2X 151#define U300_GPIO_PIN_UART_RX 0 152#define U300_GPIO_PIN_UART_TX 1 153#define U300_GPIO_PIN_GPIO02 2 /* Unrouted */ 154#define U300_GPIO_PIN_GPIO03 3 /* Unrouted */ 155#define U300_GPIO_PIN_CAM_SLEEP 4 156#define U300_GPIO_PIN_CAM_REG_EN 5 157#define U300_GPIO_PIN_GPIO06 6 /* Unrouted */ 158#define U300_GPIO_PIN_GPIO07 7 /* Unrouted */ 159 160#define U300_GPIO_PIN_GPIO08 8 /* Service point SP2321 */ 161#define U300_GPIO_PIN_GPIO09 9 /* Service point SP2322 */ 162#define U300_GPIO_PIN_PHFSENSE 10 /* Headphone jack sensing */ 163#define U300_GPIO_PIN_MMC_CLKRET 11 /* Clock return from MMC/SD card */ 164#define U300_GPIO_PIN_MMC_CD 12 /* MMC Card insertion detection */ 165#define U300_GPIO_PIN_FLIPSENSE 13 /* Mechanical flip sensing */ 166#define U300_GPIO_PIN_GPIO14 14 /* DSP JTAG Port RTCK */ 167#define U300_GPIO_PIN_GPIO15 15 /* Unrouted */ 168 169#define U300_GPIO_PIN_GPIO16 16 /* Unrouted */ 170#define U300_GPIO_PIN_GPIO17 17 /* Unrouted */ 171#define U300_GPIO_PIN_GPIO18 18 /* Unrouted */ 172#define U300_GPIO_PIN_GPIO19 19 /* Unrouted */ 173#define U300_GPIO_PIN_GPIO20 20 /* Unrouted */ 174#define U300_GPIO_PIN_GPIO21 21 /* Unrouted */ 175#define U300_GPIO_PIN_GPIO22 22 /* Unrouted */ 176#define U300_GPIO_PIN_GPIO23 23 /* Unrouted */ 177#endif 178 179/* 180 * Individual pin assignments for the B330/S330 and B365/S365. 181 * Notice that the actual usage of these pins depends on the 182 * PAD MUX settings, that is why the same number can potentially 183 * appear several times. In the reference design each pin is only 184 * used for one purpose. These were determined by inspecting the 185 * S365 schematic. 186 */ 187#if defined(CONFIG_MACH_U300_BS330) || defined(CONFIG_MACH_U300_BS365) || \ 188 defined(CONFIG_MACH_U300_BS335) 189#define U300_GPIO_PIN_UART_RX 0 190#define U300_GPIO_PIN_UART_TX 1 191#define U300_GPIO_PIN_UART_CTS 2 192#define U300_GPIO_PIN_UART_RTS 3 193#define U300_GPIO_PIN_CAM_MAIN_STANDBY 4 /* Camera MAIN standby */ 194#define U300_GPIO_PIN_GPIO05 5 /* Unrouted */ 195#define U300_GPIO_PIN_MS_CD 6 /* Memory Stick Card insertion */ 196#define U300_GPIO_PIN_GPIO07 7 /* Test point TP2430 */ 197 198#define U300_GPIO_PIN_GPIO08 8 /* Test point TP2437 */ 199#define U300_GPIO_PIN_GPIO09 9 /* Test point TP2431 */ 200#define U300_GPIO_PIN_GPIO10 10 /* Test point TP2432 */ 201#define U300_GPIO_PIN_MMC_CLKRET 11 /* Clock return from MMC/SD card */ 202#define U300_GPIO_PIN_MMC_CD 12 /* MMC Card insertion detection */ 203#define U300_GPIO_PIN_CAM_SUB_STANDBY 13 /* Camera SUB standby */ 204#define U300_GPIO_PIN_GPIO14 14 /* Test point TP2436 */ 205#define U300_GPIO_PIN_GPIO15 15 /* Unrouted */ 206 207#define U300_GPIO_PIN_GPIO16 16 /* Test point TP2438 */ 208#define U300_GPIO_PIN_PHFSENSE 17 /* Headphone jack sensing */ 209#define U300_GPIO_PIN_GPIO18 18 /* Test point TP2439 */ 210#define U300_GPIO_PIN_GPIO19 19 /* Routed somewhere */ 211#define U300_GPIO_PIN_GPIO20 20 /* Unrouted */ 212#define U300_GPIO_PIN_GPIO21 21 /* Unrouted */ 213#define U300_GPIO_PIN_GPIO22 22 /* Unrouted */ 214#define U300_GPIO_PIN_GPIO23 23 /* Unrouted */ 215 216#define U300_GPIO_PIN_GPIO24 24 /* Unrouted */ 217#define U300_GPIO_PIN_GPIO25 25 /* Unrouted */ 218#define U300_GPIO_PIN_GPIO26 26 /* Unrouted */ 219#define U300_GPIO_PIN_GPIO27 27 /* Unrouted */ 220#define U300_GPIO_PIN_GPIO28 28 /* Unrouted */ 221#define U300_GPIO_PIN_GPIO29 29 /* Unrouted */ 222#define U300_GPIO_PIN_GPIO30 30 /* Unrouted */ 223#define U300_GPIO_PIN_GPIO31 31 /* Unrouted */ 224 225#define U300_GPIO_PIN_GPIO32 32 /* Unrouted */ 226#define U300_GPIO_PIN_GPIO33 33 /* Unrouted */ 227#define U300_GPIO_PIN_GPIO34 34 /* Unrouted */ 228#define U300_GPIO_PIN_GPIO35 35 /* Unrouted */ 229#define U300_GPIO_PIN_GPIO36 36 /* Unrouted */ 230#define U300_GPIO_PIN_GPIO37 37 /* Unrouted */ 231#define U300_GPIO_PIN_GPIO38 38 /* Unrouted */ 232#define U300_GPIO_PIN_GPIO39 39 /* Unrouted */ 233 234#ifdef CONFIG_MACH_U300_BS335 235 236#define U300_GPIO_PIN_GPIO40 40 /* Unrouted */ 237#define U300_GPIO_PIN_GPIO41 41 /* Unrouted */ 238#define U300_GPIO_PIN_GPIO42 42 /* Unrouted */ 239#define U300_GPIO_PIN_GPIO43 43 /* Unrouted */ 240#define U300_GPIO_PIN_GPIO44 44 /* Unrouted */ 241#define U300_GPIO_PIN_GPIO45 45 /* Unrouted */ 242#define U300_GPIO_PIN_GPIO46 46 /* Unrouted */ 243#define U300_GPIO_PIN_GPIO47 47 /* Unrouted */ 244 245#define U300_GPIO_PIN_GPIO48 48 /* Unrouted */ 246#define U300_GPIO_PIN_GPIO49 49 /* Unrouted */ 247#define U300_GPIO_PIN_GPIO50 50 /* Unrouted */ 248#define U300_GPIO_PIN_GPIO51 51 /* Unrouted */ 249#define U300_GPIO_PIN_GPIO52 52 /* Unrouted */ 250#define U300_GPIO_PIN_GPIO53 53 /* Unrouted */ 251#define U300_GPIO_PIN_GPIO54 54 /* Unrouted */ 252#define U300_GPIO_PIN_GPIO55 55 /* Unrouted */ 253#endif 254 255#endif 256 257/* translates a pin number to a port number */ 258#define PIN_TO_PORT(val) (val >> 3) 259 260/* These can be found in arch/arm/mach-u300/gpio.c */ 261extern int gpio_is_valid(int number); 262extern int gpio_request(unsigned gpio, const char *label); 263extern void gpio_free(unsigned gpio); 264extern int gpio_direction_input(unsigned gpio); 265extern int gpio_direction_output(unsigned gpio, int value); 266extern int gpio_register_callback(unsigned gpio, 267 int (*func)(void *arg), 268 void *); 269extern int gpio_unregister_callback(unsigned gpio); 270extern void enable_irq_on_gpio_pin(unsigned gpio, int edge); 271extern void disable_irq_on_gpio_pin(unsigned gpio); 272extern void gpio_pullup(unsigned gpio, int value); 273extern int gpio_get_value(unsigned gpio); 274extern void gpio_set_value(unsigned gpio, int value); 275 276/* wrappers to sleep-enable the previous two functions */ 277static inline unsigned gpio_to_irq(unsigned gpio) 278{ 279 return PIN_TO_PORT(gpio) + IRQ_U300_GPIO_PORT0; 280} 281 282static inline unsigned irq_to_gpio(unsigned irq) 283{ 284 /* 285 * FIXME: This is no 1-1 mapping at all, it points to the 286 * whole block of 8 pins. 287 */ 288 return (irq - IRQ_U300_GPIO_PORT0) << 3; 289} 290 291#endif 292