LXR linux/arch/arm/plat-s3c24xx/s3c244x.c

   1/* linux/arch/arm/plat-s3c24xx/s3c244x.c
   2 *
   3 * Copyright (c) 2004-2006 Simtec Electronics
   4 *   Ben Dooks <ben@simtec.co.uk>
   5 *
   6 * Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443)
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11*/
  12
  13#include <linux/kernel.h>
  14#include <linux/types.h>
  15#include <linux/interrupt.h>
  16#include <linux/list.h>
  17#include <linux/timer.h>
  18#include <linux/init.h>
  19#include <linux/serial_core.h>
  20#include <linux/platform_device.h>
  21#include <linux/sysdev.h>
  22#include <linux/clk.h>
  23#include <linux/io.h>
  24
  25#include <asm/mach/arch.h>
  26#include <asm/mach/map.h>
  27#include <asm/mach/irq.h>
  28
  29#include <mach/hardware.h>
  30#include <asm/irq.h>
  31
  32#include <plat/cpu-freq.h>
  33
  34#include <mach/regs-clock.h>
  35#include <plat/regs-serial.h>
  36#include <mach/regs-gpio.h>
  37#include <mach/regs-gpioj.h>
  38#include <mach/regs-dsc.h>
  39
  40#include <plat/s3c2410.h>
  41#include <plat/s3c2440.h>
  42#include "s3c244x.h"
  43#include <plat/clock.h>
  44#include <plat/devs.h>
  45#include <plat/cpu.h>
  46#include <plat/pm.h>
  47#include <plat/pll.h>
  48
  49static struct map_desc s3c244x_iodesc[] __initdata = {
  50        IODESC_ENT(CLKPWR),
  51        IODESC_ENT(TIMER),
  52        IODESC_ENT(WATCHDOG),
  53};
  54
  55/* uart initialisation */
  56
  57void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  58{
  59        s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
  60}
  61
  62void __init s3c244x_map_io(void)
  63{
  64        /* register our io-tables */
  65
  66        iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
  67
  68        /* rename any peripherals used differing from the s3c2410 */
  69
  70        s3c_device_sdi.name  = "s3c2440-sdi";
  71        s3c_device_i2c0.name  = "s3c2440-i2c";
  72        s3c_device_nand.name = "s3c2440-nand";
  73        s3c_device_usbgadget.name = "s3c2440-usbgadget";
  74}
  75
  76void __init_or_cpufreq s3c244x_setup_clocks(void)
  77{
  78        struct clk *xtal_clk;
  79        unsigned long clkdiv;
  80        unsigned long camdiv;
  81        unsigned long xtal;
  82        unsigned long hclk, fclk, pclk;
  83        int hdiv = 1;
  84
  85        xtal_clk = clk_get(NULL, "xtal");
  86        xtal = clk_get_rate(xtal_clk);
  87        clk_put(xtal_clk);
  88
  89        fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
  90
  91        clkdiv = __raw_readl(S3C2410_CLKDIVN);
  92        camdiv = __raw_readl(S3C2440_CAMDIVN);
  93
  94        /* work out clock scalings */
  95
  96        switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
  97        case S3C2440_CLKDIVN_HDIVN_1:
  98                hdiv = 1;
  99                break;
 100
 101        case S3C2440_CLKDIVN_HDIVN_2:
 102                hdiv = 2;
 103                break;
 104
 105        case S3C2440_CLKDIVN_HDIVN_4_8:
 106                hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
 107                break;
 108
 109        case S3C2440_CLKDIVN_HDIVN_3_6:
 110                hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
 111                break;
 112        }
 113
 114        hclk = fclk / hdiv;
 115        pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
 116
 117        /* print brief summary of clocks, etc */
 118
 119        printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
 120               print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
 121
 122        s3c24xx_setup_clocks(fclk, hclk, pclk);
 123}
 124
 125void __init s3c244x_init_clocks(int xtal)
 126{
 127        /* initialise the clocks here, to allow other things like the
 128         * console to use them, and to add new ones after the initialisation
 129         */
 130
 131        s3c24xx_register_baseclocks(xtal);
 132        s3c244x_setup_clocks();
 133        s3c2410_baseclk_add();
 134}
 135
 136#ifdef CONFIG_PM
 137
 138static struct sleep_save s3c244x_sleep[] = {
 139        SAVE_ITEM(S3C2440_DSC0),
 140        SAVE_ITEM(S3C2440_DSC1),
 141        SAVE_ITEM(S3C2440_GPJDAT),
 142        SAVE_ITEM(S3C2440_GPJCON),
 143        SAVE_ITEM(S3C2440_GPJUP)
 144};
 145
 146static int s3c244x_suspend(struct sys_device *dev, pm_message_t state)
 147{
 148        s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
 149        return 0;
 150}
 151
 152static int s3c244x_resume(struct sys_device *dev)
 153{
 154        s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
 155        return 0;
 156}
 157
 158#else
 159#define s3c244x_suspend NULL
 160#define s3c244x_resume  NULL
 161#endif
 162
 163/* Since the S3C2442 and S3C2440 share  items, put both sysclasses here */
 164
 165struct sysdev_class s3c2440_sysclass = {
 166        .name           = "s3c2440-core",
 167        .suspend        = s3c244x_suspend,
 168        .resume         = s3c244x_resume
 169};
 170
 171struct sysdev_class s3c2442_sysclass = {
 172        .name           = "s3c2442-core",
 173        .suspend        = s3c244x_suspend,
 174        .resume         = s3c244x_resume
 175};
 176
 177/* need to register class before we actually register the device, and
 178 * we also need to ensure that it has been initialised before any of the
 179 * drivers even try to use it (even if not on an s3c2440 based system)
 180 * as a driver which may support both 2410 and 2440 may try and use it.
 181*/
 182
 183static int __init s3c2440_core_init(void)
 184{
 185        return sysdev_class_register(&s3c2440_sysclass);
 186}
 187
 188core_initcall(s3c2440_core_init);
 189
 190static int __init s3c2442_core_init(void)
 191{
 192        return sysdev_class_register(&s3c2442_sysclass);
 193}
 194
 195core_initcall(s3c2442_core_init);
 196