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24#include <linux/kernel.h>
25#include <linux/sched.h>
26#include <linux/module.h>
27#include <linux/interrupt.h>
28#include <linux/percpu.h>
29#include <linux/bitops.h>
30#include <linux/slab.h>
31#include <linux/errno.h>
32#include <linux/kthread.h>
33#include <linux/unistd.h>
34#include <linux/io.h>
35#include <asm/system.h>
36#include <asm/atomic.h>
37
38DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
39
40asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs);
41
42static void __ipipe_no_irqtail(void);
43
44unsigned long __ipipe_irq_tail_hook = (unsigned long)&__ipipe_no_irqtail;
45EXPORT_SYMBOL(__ipipe_irq_tail_hook);
46
47unsigned long __ipipe_core_clock;
48EXPORT_SYMBOL(__ipipe_core_clock);
49
50unsigned long __ipipe_freq_scale;
51EXPORT_SYMBOL(__ipipe_freq_scale);
52
53atomic_t __ipipe_irq_lvdepth[IVG15 + 1];
54
55unsigned long __ipipe_irq_lvmask = bfin_no_irqs;
56EXPORT_SYMBOL(__ipipe_irq_lvmask);
57
58static void __ipipe_ack_irq(unsigned irq, struct irq_desc *desc)
59{
60 desc->ipipe_ack(irq, desc);
61}
62
63
64
65
66
67void __ipipe_enable_pipeline(void)
68{
69 unsigned irq;
70
71 __ipipe_core_clock = get_cclk();
72 __ipipe_freq_scale = 1000000000UL / __ipipe_core_clock;
73
74 for (irq = 0; irq < NR_IRQS; ++irq)
75 ipipe_virtualize_irq(ipipe_root_domain,
76 irq,
77 (ipipe_irq_handler_t)&asm_do_IRQ,
78 NULL,
79 &__ipipe_ack_irq,
80 IPIPE_HANDLE_MASK | IPIPE_PASS_MASK);
81}
82
83
84
85
86
87
88void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
89{
90 struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr();
91 struct ipipe_domain *this_domain, *next_domain;
92 struct list_head *head, *pos;
93 struct ipipe_irqdesc *idesc;
94 int m_ack, s = -1;
95
96
97
98
99
100
101
102 m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR);
103 this_domain = __ipipe_current_domain;
104 idesc = &this_domain->irqs[irq];
105
106 if (unlikely(test_bit(IPIPE_STICKY_FLAG, &idesc->control)))
107 head = &this_domain->p_link;
108 else {
109 head = __ipipe_pipeline.next;
110 next_domain = list_entry(head, struct ipipe_domain, p_link);
111 idesc = &next_domain->irqs[irq];
112 if (likely(test_bit(IPIPE_WIRED_FLAG, &idesc->control))) {
113 if (!m_ack && idesc->acknowledge != NULL)
114 idesc->acknowledge(irq, irq_to_desc(irq));
115 if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
116 s = __test_and_set_bit(IPIPE_STALL_FLAG,
117 &p->status);
118 __ipipe_dispatch_wired(next_domain, irq);
119 goto out;
120 }
121 }
122
123
124
125 pos = head;
126 while (pos != &__ipipe_pipeline) {
127 next_domain = list_entry(pos, struct ipipe_domain, p_link);
128 idesc = &next_domain->irqs[irq];
129 if (test_bit(IPIPE_HANDLE_FLAG, &idesc->control)) {
130 __ipipe_set_irq_pending(next_domain, irq);
131 if (!m_ack && idesc->acknowledge != NULL) {
132 idesc->acknowledge(irq, irq_to_desc(irq));
133 m_ack = 1;
134 }
135 }
136 if (!test_bit(IPIPE_PASS_FLAG, &idesc->control))
137 break;
138 pos = next_domain->p_link.next;
139 }
140
141
142
143
144
145
146
147
148
149 if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
150 s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status);
151
152
153
154
155
156
157 if (test_bit(IPIPE_AHEAD_FLAG, &this_domain->flags) &&
158 ipipe_head_cpudom_var(irqpend_himask) == 0)
159 goto out;
160
161 __ipipe_walk_pipeline(head);
162out:
163 if (!s)
164 __clear_bit(IPIPE_STALL_FLAG, &p->status);
165}
166
167void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
168{
169 struct irq_desc *desc = irq_to_desc(irq);
170 int prio = __ipipe_get_irq_priority(irq);
171
172 desc->depth = 0;
173 if (ipd != &ipipe_root &&
174 atomic_inc_return(&__ipipe_irq_lvdepth[prio]) == 1)
175 __set_bit(prio, &__ipipe_irq_lvmask);
176}
177EXPORT_SYMBOL(__ipipe_enable_irqdesc);
178
179void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
180{
181 int prio = __ipipe_get_irq_priority(irq);
182
183 if (ipd != &ipipe_root &&
184 atomic_dec_and_test(&__ipipe_irq_lvdepth[prio]))
185 __clear_bit(prio, &__ipipe_irq_lvmask);
186}
187EXPORT_SYMBOL(__ipipe_disable_irqdesc);
188
189int __ipipe_syscall_root(struct pt_regs *regs)
190{
191 struct ipipe_percpu_domain_data *p;
192 unsigned long flags;
193 int ret;
194
195
196
197
198
199
200
201
202 if (regs->orig_p0 < NR_syscalls) {
203 void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook;
204 hook();
205 if ((current->flags & PF_EVNOTIFY) == 0)
206 return 0;
207 }
208
209
210
211
212
213
214
215
216
217
218 if (!__ipipe_event_monitored_p(IPIPE_EVENT_SYSCALL))
219 return 0;
220
221 ret = __ipipe_dispatch_event(IPIPE_EVENT_SYSCALL, regs);
222
223 local_irq_save_hw(flags);
224
225 if (!__ipipe_root_domain_p) {
226 local_irq_restore_hw(flags);
227 return 1;
228 }
229
230 p = ipipe_root_cpudom_ptr();
231 if ((p->irqpend_himask & IPIPE_IRQMASK_VIRT) != 0)
232 __ipipe_sync_pipeline(IPIPE_IRQMASK_VIRT);
233
234 local_irq_restore_hw(flags);
235
236 return -ret;
237}
238
239unsigned long ipipe_critical_enter(void (*syncfn) (void))
240{
241 unsigned long flags;
242
243 local_irq_save_hw(flags);
244
245 return flags;
246}
247
248void ipipe_critical_exit(unsigned long flags)
249{
250 local_irq_restore_hw(flags);
251}
252
253static void __ipipe_no_irqtail(void)
254{
255}
256
257int ipipe_get_sysinfo(struct ipipe_sysinfo *info)
258{
259 info->ncpus = num_online_cpus();
260 info->cpufreq = ipipe_cpu_freq();
261 info->archdep.tmirq = IPIPE_TIMER_IRQ;
262 info->archdep.tmfreq = info->cpufreq;
263
264 return 0;
265}
266
267
268
269
270
271
272int ipipe_trigger_irq(unsigned irq)
273{
274 unsigned long flags;
275
276#ifdef CONFIG_IPIPE_DEBUG
277 if (irq >= IPIPE_NR_IRQS ||
278 (ipipe_virtual_irq_p(irq)
279 && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map)))
280 return -EINVAL;
281#endif
282
283 local_irq_save_hw(flags);
284 __ipipe_handle_irq(irq, NULL);
285 local_irq_restore_hw(flags);
286
287 return 1;
288}
289
290asmlinkage void __ipipe_sync_root(void)
291{
292 void (*irq_tail_hook)(void) = (void (*)(void))__ipipe_irq_tail_hook;
293 unsigned long flags;
294
295 BUG_ON(irqs_disabled());
296
297 local_irq_save_hw(flags);
298
299 if (irq_tail_hook)
300 irq_tail_hook();
301
302 clear_thread_flag(TIF_IRQ_SYNC);
303
304 if (ipipe_root_cpudom_var(irqpend_himask) != 0)
305 __ipipe_sync_pipeline(IPIPE_IRQMASK_ANY);
306
307 local_irq_restore_hw(flags);
308}
309
310void ___ipipe_sync_pipeline(unsigned long syncmask)
311{
312 if (__ipipe_root_domain_p &&
313 test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)))
314 return;
315
316 __ipipe_sync_stage(syncmask);
317}
318
319void __ipipe_disable_root_irqs_hw(void)
320{
321
322
323
324
325
326
327
328
329 bfin_sti(__ipipe_irq_lvmask);
330 __set_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status));
331}
332
333void __ipipe_enable_root_irqs_hw(void)
334{
335 __clear_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status));
336 bfin_sti(bfin_irq_flags);
337}
338