linux/arch/blackfin/mach-bf537/boards/cm_bf537e.c
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   1/*
   2 * Copyright 2004-2009 Analog Devices Inc.
   3 *           2008-2009 Bluetechnix
   4 *                2005 National ICT Australia (NICTA)
   5 *                      Aidan Williams <aidan@nicta.com.au>
   6 *
   7 * Licensed under the GPL-2 or later.
   8 */
   9
  10#include <linux/device.h>
  11#include <linux/etherdevice.h>
  12#include <linux/platform_device.h>
  13#include <linux/mtd/mtd.h>
  14#include <linux/mtd/partitions.h>
  15#include <linux/mtd/physmap.h>
  16#include <linux/spi/spi.h>
  17#include <linux/spi/flash.h>
  18#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  19#include <linux/usb/isp1362.h>
  20#endif
  21#include <linux/ata_platform.h>
  22#include <linux/irq.h>
  23#include <asm/dma.h>
  24#include <asm/bfin5xx_spi.h>
  25#include <asm/portmux.h>
  26#include <asm/dpmc.h>
  27
  28/*
  29 * Name the Board for the /proc/cpuinfo
  30 */
  31const char bfin_board_name[] = "Bluetechnix CM BF537E";
  32
  33#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  34/* all SPI peripherals info goes here */
  35
  36#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  37static struct mtd_partition bfin_spi_flash_partitions[] = {
  38        {
  39                .name = "bootloader(spi)",
  40                .size = 0x00020000,
  41                .offset = 0,
  42                .mask_flags = MTD_CAP_ROM
  43        }, {
  44                .name = "linux kernel(spi)",
  45                .size = 0xe0000,
  46                .offset = 0x20000
  47        }, {
  48                .name = "file system(spi)",
  49                .size = 0x700000,
  50                .offset = 0x00100000,
  51        }
  52};
  53
  54static struct flash_platform_data bfin_spi_flash_data = {
  55        .name = "m25p80",
  56        .parts = bfin_spi_flash_partitions,
  57        .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  58        .type = "m25p64",
  59};
  60
  61/* SPI flash chip (m25p64) */
  62static struct bfin5xx_spi_chip spi_flash_chip_info = {
  63        .enable_dma = 0,         /* use dma transfer with this chip*/
  64        .bits_per_word = 8,
  65};
  66#endif
  67
  68#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  69/* SPI ADC chip */
  70static struct bfin5xx_spi_chip spi_adc_chip_info = {
  71        .enable_dma = 1,         /* use dma transfer with this chip*/
  72        .bits_per_word = 16,
  73};
  74#endif
  75
  76#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  77static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  78        .enable_dma = 0,
  79        .bits_per_word = 16,
  80};
  81#endif
  82
  83#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  84static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
  85        .enable_dma = 0,
  86        .bits_per_word = 8,
  87};
  88#endif
  89
  90static struct spi_board_info bfin_spi_board_info[] __initdata = {
  91#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  92        {
  93                /* the modalias must be the same as spi device driver name */
  94                .modalias = "m25p80", /* Name of spi_driver for this device */
  95                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
  96                .bus_num = 0, /* Framework bus number */
  97                .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  98                .platform_data = &bfin_spi_flash_data,
  99                .controller_data = &spi_flash_chip_info,
 100                .mode = SPI_MODE_3,
 101        },
 102#endif
 103
 104#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 105        {
 106                .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 107                .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 108                .bus_num = 0, /* Framework bus number */
 109                .chip_select = 1, /* Framework chip select. */
 110                .platform_data = NULL, /* No spi_driver specific config */
 111                .controller_data = &spi_adc_chip_info,
 112        },
 113#endif
 114
 115#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 116        {
 117                .modalias = "ad1836",
 118                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 119                .bus_num = 0,
 120                .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
 121                .controller_data = &ad1836_spi_chip_info,
 122        },
 123#endif
 124
 125#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 126        {
 127                .modalias = "mmc_spi",
 128                .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 129                .bus_num = 0,
 130                .chip_select = 1,
 131                .controller_data = &mmc_spi_chip_info,
 132                .mode = SPI_MODE_3,
 133        },
 134#endif
 135};
 136
 137/* SPI (0) */
 138static struct resource bfin_spi0_resource[] = {
 139        [0] = {
 140                .start = SPI0_REGBASE,
 141                .end   = SPI0_REGBASE + 0xFF,
 142                .flags = IORESOURCE_MEM,
 143                },
 144        [1] = {
 145                .start = CH_SPI,
 146                .end   = CH_SPI,
 147                .flags = IORESOURCE_DMA,
 148        },
 149        [2] = {
 150                .start = IRQ_SPI,
 151                .end   = IRQ_SPI,
 152                .flags = IORESOURCE_IRQ,
 153        },
 154};
 155
 156/* SPI controller data */
 157static struct bfin5xx_spi_master bfin_spi0_info = {
 158        .num_chipselect = 8,
 159        .enable_dma = 1,  /* master has the ability to do dma transfer */
 160        .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 161};
 162
 163static struct platform_device bfin_spi0_device = {
 164        .name = "bfin-spi",
 165        .id = 0, /* Bus number */
 166        .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 167        .resource = bfin_spi0_resource,
 168        .dev = {
 169                .platform_data = &bfin_spi0_info, /* Passed to driver */
 170        },
 171};
 172#endif  /* spi master and devices */
 173
 174#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 175static struct platform_device rtc_device = {
 176        .name = "rtc-bfin",
 177        .id   = -1,
 178};
 179#endif
 180
 181#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
 182static struct platform_device hitachi_fb_device = {
 183        .name = "hitachi-tx09",
 184};
 185#endif
 186
 187#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 188#include <linux/smc91x.h>
 189
 190static struct smc91x_platdata smc91x_info = {
 191        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
 192        .leda = RPC_LED_100_10,
 193        .ledb = RPC_LED_TX_RX,
 194};
 195
 196static struct resource smc91x_resources[] = {
 197        {
 198                .start = 0x20200300,
 199                .end = 0x20200300 + 16,
 200                .flags = IORESOURCE_MEM,
 201        }, {
 202                .start = IRQ_PF14,
 203                .end = IRQ_PF14,
 204                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 205                },
 206};
 207
 208static struct platform_device smc91x_device = {
 209        .name = "smc91x",
 210        .id = 0,
 211        .num_resources = ARRAY_SIZE(smc91x_resources),
 212        .resource = smc91x_resources,
 213        .dev    = {
 214                .platform_data  = &smc91x_info,
 215        },
 216};
 217#endif
 218
 219#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 220static struct resource isp1362_hcd_resources[] = {
 221        {
 222                .start = 0x20308000,
 223                .end = 0x20308000,
 224                .flags = IORESOURCE_MEM,
 225        }, {
 226                .start = 0x20308004,
 227                .end = 0x20308004,
 228                .flags = IORESOURCE_MEM,
 229        }, {
 230                .start = IRQ_PG15,
 231                .end = IRQ_PG15,
 232                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 233        },
 234};
 235
 236static struct isp1362_platform_data isp1362_priv = {
 237        .sel15Kres = 1,
 238        .clknotstop = 0,
 239        .oc_enable = 0,
 240        .int_act_high = 0,
 241        .int_edge_triggered = 0,
 242        .remote_wakeup_connected = 0,
 243        .no_power_switching = 1,
 244        .power_switching_mode = 0,
 245};
 246
 247static struct platform_device isp1362_hcd_device = {
 248        .name = "isp1362-hcd",
 249        .id = 0,
 250        .dev = {
 251                .platform_data = &isp1362_priv,
 252        },
 253        .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
 254        .resource = isp1362_hcd_resources,
 255};
 256#endif
 257
 258#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 259static struct resource net2272_bfin_resources[] = {
 260        {
 261                .start = 0x20300000,
 262                .end = 0x20300000 + 0x100,
 263                .flags = IORESOURCE_MEM,
 264        }, {
 265                .start = IRQ_PG13,
 266                .end = IRQ_PG13,
 267                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 268        },
 269};
 270
 271static struct platform_device net2272_bfin_device = {
 272        .name = "net2272",
 273        .id = -1,
 274        .num_resources = ARRAY_SIZE(net2272_bfin_resources),
 275        .resource = net2272_bfin_resources,
 276};
 277#endif
 278
 279#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 280static struct mtd_partition cm_partitions[] = {
 281        {
 282                .name   = "bootloader(nor)",
 283                .size   = 0x40000,
 284                .offset = 0,
 285        }, {
 286                .name   = "linux kernel(nor)",
 287                .size   = 0x100000,
 288                .offset = MTDPART_OFS_APPEND,
 289        }, {
 290                .name   = "file system(nor)",
 291                .size   = MTDPART_SIZ_FULL,
 292                .offset = MTDPART_OFS_APPEND,
 293        }
 294};
 295
 296static struct physmap_flash_data cm_flash_data = {
 297        .width    = 2,
 298        .parts    = cm_partitions,
 299        .nr_parts = ARRAY_SIZE(cm_partitions),
 300};
 301
 302static unsigned cm_flash_gpios[] = { GPIO_PF4 };
 303
 304static struct resource cm_flash_resource[] = {
 305        {
 306                .name  = "cfi_probe",
 307                .start = 0x20000000,
 308                .end   = 0x201fffff,
 309                .flags = IORESOURCE_MEM,
 310        }, {
 311                .start = (unsigned long)cm_flash_gpios,
 312                .end   = ARRAY_SIZE(cm_flash_gpios),
 313                .flags = IORESOURCE_IRQ,
 314        }
 315};
 316
 317static struct platform_device cm_flash_device = {
 318        .name          = "gpio-addr-flash",
 319        .id            = 0,
 320        .dev = {
 321                .platform_data = &cm_flash_data,
 322        },
 323        .num_resources = ARRAY_SIZE(cm_flash_resource),
 324        .resource      = cm_flash_resource,
 325};
 326#endif
 327
 328#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 329#ifdef CONFIG_SERIAL_BFIN_UART0
 330static struct resource bfin_uart0_resources[] = {
 331        {
 332                .start = 0xFFC00400,
 333                .end = 0xFFC004FF,
 334                .flags = IORESOURCE_MEM,
 335        },
 336        {
 337                .start = IRQ_UART0_RX,
 338                .end = IRQ_UART0_RX+1,
 339                .flags = IORESOURCE_IRQ,
 340        },
 341        {
 342                .start = IRQ_UART0_ERROR,
 343                .end = IRQ_UART0_ERROR,
 344                .flags = IORESOURCE_IRQ,
 345        },
 346        {
 347                .start = CH_UART0_TX,
 348                .end = CH_UART0_TX,
 349                .flags = IORESOURCE_DMA,
 350        },
 351        {
 352                .start = CH_UART0_RX,
 353                .end = CH_UART0_RX,
 354                .flags = IORESOURCE_DMA,
 355        },
 356#ifdef CONFIG_BFIN_UART0_CTSRTS
 357        {
 358                /*
 359                 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 360                 */
 361                .start = -1,
 362                .end = -1,
 363                .flags = IORESOURCE_IO,
 364        },
 365        {
 366                /*
 367                 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 368                 */
 369                .start = -1,
 370                .end = -1,
 371                .flags = IORESOURCE_IO,
 372        },
 373#endif
 374};
 375
 376static struct platform_device bfin_uart0_device = {
 377        .name = "bfin-uart",
 378        .id = 0,
 379        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 380        .resource = bfin_uart0_resources,
 381};
 382#endif
 383#ifdef CONFIG_SERIAL_BFIN_UART1
 384static struct resource bfin_uart1_resources[] = {
 385        {
 386                .start = 0xFFC02000,
 387                .end = 0xFFC020FF,
 388                .flags = IORESOURCE_MEM,
 389        },
 390        {
 391                .start = IRQ_UART1_RX,
 392                .end = IRQ_UART1_RX+1,
 393                .flags = IORESOURCE_IRQ,
 394        },
 395        {
 396                .start = IRQ_UART1_ERROR,
 397                .end = IRQ_UART1_ERROR,
 398                .flags = IORESOURCE_IRQ,
 399        },
 400        {
 401                .start = CH_UART1_TX,
 402                .end = CH_UART1_TX,
 403                .flags = IORESOURCE_DMA,
 404        },
 405        {
 406                .start = CH_UART1_RX,
 407                .end = CH_UART1_RX,
 408                .flags = IORESOURCE_DMA,
 409        },
 410#ifdef CONFIG_BFIN_UART1_CTSRTS
 411        {
 412                /*
 413                 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 414                 */
 415                .start = -1,
 416                .end = -1,
 417                .flags = IORESOURCE_IO,
 418        },
 419        {
 420                /*
 421                 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 422                 */
 423                .start = -1,
 424                .end = -1,
 425                .flags = IORESOURCE_IO,
 426        },
 427#endif
 428};
 429
 430static struct platform_device bfin_uart1_device = {
 431        .name = "bfin-uart",
 432        .id = 1,
 433        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 434        .resource = bfin_uart1_resources,
 435};
 436#endif
 437#endif
 438
 439#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 440#ifdef CONFIG_BFIN_SIR0
 441static struct resource bfin_sir0_resources[] = {
 442        {
 443                .start = 0xFFC00400,
 444                .end = 0xFFC004FF,
 445                .flags = IORESOURCE_MEM,
 446        },
 447        {
 448                .start = IRQ_UART0_RX,
 449                .end = IRQ_UART0_RX+1,
 450                .flags = IORESOURCE_IRQ,
 451        },
 452        {
 453                .start = CH_UART0_RX,
 454                .end = CH_UART0_RX+1,
 455                .flags = IORESOURCE_DMA,
 456        },
 457};
 458static struct platform_device bfin_sir0_device = {
 459        .name = "bfin_sir",
 460        .id = 0,
 461        .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 462        .resource = bfin_sir0_resources,
 463};
 464#endif
 465#ifdef CONFIG_BFIN_SIR1
 466static struct resource bfin_sir1_resources[] = {
 467        {
 468                .start = 0xFFC02000,
 469                .end = 0xFFC020FF,
 470                .flags = IORESOURCE_MEM,
 471        },
 472        {
 473                .start = IRQ_UART1_RX,
 474                .end = IRQ_UART1_RX+1,
 475                .flags = IORESOURCE_IRQ,
 476        },
 477        {
 478                .start = CH_UART1_RX,
 479                .end = CH_UART1_RX+1,
 480                .flags = IORESOURCE_DMA,
 481        },
 482};
 483static struct platform_device bfin_sir1_device = {
 484        .name = "bfin_sir",
 485        .id = 1,
 486        .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 487        .resource = bfin_sir1_resources,
 488};
 489#endif
 490#endif
 491
 492#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 493static struct resource bfin_twi0_resource[] = {
 494        [0] = {
 495                .start = TWI0_REGBASE,
 496                .end   = TWI0_REGBASE,
 497                .flags = IORESOURCE_MEM,
 498        },
 499        [1] = {
 500                .start = IRQ_TWI,
 501                .end   = IRQ_TWI,
 502                .flags = IORESOURCE_IRQ,
 503        },
 504};
 505
 506static struct platform_device i2c_bfin_twi_device = {
 507        .name = "i2c-bfin-twi",
 508        .id = 0,
 509        .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 510        .resource = bfin_twi0_resource,
 511};
 512#endif
 513
 514#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 515static struct platform_device bfin_sport0_uart_device = {
 516        .name = "bfin-sport-uart",
 517        .id = 0,
 518};
 519
 520static struct platform_device bfin_sport1_uart_device = {
 521        .name = "bfin-sport-uart",
 522        .id = 1,
 523};
 524#endif
 525
 526#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 527static struct platform_device bfin_mii_bus = {
 528        .name = "bfin_mii_bus",
 529};
 530
 531static struct platform_device bfin_mac_device = {
 532        .name = "bfin_mac",
 533        .dev.platform_data = &bfin_mii_bus,
 534};
 535#endif
 536
 537#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 538#define PATA_INT        IRQ_PF14
 539
 540static struct pata_platform_info bfin_pata_platform_data = {
 541        .ioport_shift = 2,
 542        .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
 543};
 544
 545static struct resource bfin_pata_resources[] = {
 546        {
 547                .start = 0x2030C000,
 548                .end = 0x2030C01F,
 549                .flags = IORESOURCE_MEM,
 550        },
 551        {
 552                .start = 0x2030D018,
 553                .end = 0x2030D01B,
 554                .flags = IORESOURCE_MEM,
 555        },
 556        {
 557                .start = PATA_INT,
 558                .end = PATA_INT,
 559                .flags = IORESOURCE_IRQ,
 560        },
 561};
 562
 563static struct platform_device bfin_pata_device = {
 564        .name = "pata_platform",
 565        .id = -1,
 566        .num_resources = ARRAY_SIZE(bfin_pata_resources),
 567        .resource = bfin_pata_resources,
 568        .dev = {
 569                .platform_data = &bfin_pata_platform_data,
 570        }
 571};
 572#endif
 573
 574static const unsigned int cclk_vlev_datasheet[] =
 575{
 576        VRPAIR(VLEV_085, 250000000),
 577        VRPAIR(VLEV_090, 376000000),
 578        VRPAIR(VLEV_095, 426000000),
 579        VRPAIR(VLEV_100, 426000000),
 580        VRPAIR(VLEV_105, 476000000),
 581        VRPAIR(VLEV_110, 476000000),
 582        VRPAIR(VLEV_115, 476000000),
 583        VRPAIR(VLEV_120, 500000000),
 584        VRPAIR(VLEV_125, 533000000),
 585        VRPAIR(VLEV_130, 600000000),
 586};
 587
 588static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 589        .tuple_tab = cclk_vlev_datasheet,
 590        .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 591        .vr_settling_time = 25 /* us */,
 592};
 593
 594static struct platform_device bfin_dpmc = {
 595        .name = "bfin dpmc",
 596        .dev = {
 597                .platform_data = &bfin_dmpc_vreg_data,
 598        },
 599};
 600
 601static struct platform_device *cm_bf537e_devices[] __initdata = {
 602
 603        &bfin_dpmc,
 604
 605#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
 606        &hitachi_fb_device,
 607#endif
 608
 609#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 610        &rtc_device,
 611#endif
 612
 613#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 614#ifdef CONFIG_SERIAL_BFIN_UART0
 615        &bfin_uart0_device,
 616#endif
 617#ifdef CONFIG_SERIAL_BFIN_UART1
 618        &bfin_uart1_device,
 619#endif
 620#endif
 621
 622#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 623#ifdef CONFIG_BFIN_SIR0
 624        &bfin_sir0_device,
 625#endif
 626#ifdef CONFIG_BFIN_SIR1
 627        &bfin_sir1_device,
 628#endif
 629#endif
 630
 631#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 632        &i2c_bfin_twi_device,
 633#endif
 634
 635#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 636        &bfin_sport0_uart_device,
 637        &bfin_sport1_uart_device,
 638#endif
 639
 640#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 641        &isp1362_hcd_device,
 642#endif
 643
 644#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 645        &smc91x_device,
 646#endif
 647
 648#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 649        &bfin_mii_bus,
 650        &bfin_mac_device,
 651#endif
 652
 653#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 654        &net2272_bfin_device,
 655#endif
 656
 657#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 658        &bfin_spi0_device,
 659#endif
 660
 661#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 662        &bfin_pata_device,
 663#endif
 664
 665#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 666        &cm_flash_device,
 667#endif
 668};
 669
 670static int __init cm_bf537e_init(void)
 671{
 672        printk(KERN_INFO "%s(): registering device resources\n", __func__);
 673        platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
 674#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 675        spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 676#endif
 677
 678#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 679        irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
 680#endif
 681        return 0;
 682}
 683
 684arch_initcall(cm_bf537e_init);
 685
 686void bfin_get_ether_addr(char *addr)
 687{
 688        random_ether_addr(addr);
 689        printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
 690}
 691EXPORT_SYMBOL(bfin_get_ether_addr);
 692