LXR linux/arch/cris/include/arch-v32/arch/hwregs/iop/iop_fifo_in_extra

   1#ifndef __iop_fifo_in_extra_defs_h
   2#define __iop_fifo_in_extra_defs_h
   3
   4/*
   5 * This file is autogenerated from
   6 *   file:           ../../inst/io_proc/rtl/iop_fifo_in_extra.r
   7 *     id:           <not found>
   8 *     last modfied: Mon Apr 11 16:10:08 2005
   9 *
  10 *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_fifo_in_extra_defs.h ../../inst/io_proc/rtl/iop_fifo_in_extra.r
  11 *      id: $Id: iop_fifo_in_extra_defs.h,v 1.1 2005/04/24 18:31:05 starvik Exp $
  12 * Any changes here will be lost.
  13 *
  14 * -*- buffer-read-only: t -*-
  15 */
  16/* Main access macros */
  17#ifndef REG_RD
  18#define REG_RD( scope, inst, reg ) \
  19  REG_READ( reg_##scope##_##reg, \
  20            (inst) + REG_RD_ADDR_##scope##_##reg )
  21#endif
  22
  23#ifndef REG_WR
  24#define REG_WR( scope, inst, reg, val ) \
  25  REG_WRITE( reg_##scope##_##reg, \
  26             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  27#endif
  28
  29#ifndef REG_RD_VECT
  30#define REG_RD_VECT( scope, inst, reg, index ) \
  31  REG_READ( reg_##scope##_##reg, \
  32            (inst) + REG_RD_ADDR_##scope##_##reg + \
  33            (index) * STRIDE_##scope##_##reg )
  34#endif
  35
  36#ifndef REG_WR_VECT
  37#define REG_WR_VECT( scope, inst, reg, index, val ) \
  38  REG_WRITE( reg_##scope##_##reg, \
  39             (inst) + REG_WR_ADDR_##scope##_##reg + \
  40             (index) * STRIDE_##scope##_##reg, (val) )
  41#endif
  42
  43#ifndef REG_RD_INT
  44#define REG_RD_INT( scope, inst, reg ) \
  45  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
  46#endif
  47
  48#ifndef REG_WR_INT
  49#define REG_WR_INT( scope, inst, reg, val ) \
  50  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  51#endif
  52
  53#ifndef REG_RD_INT_VECT
  54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
  55  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
  56            (index) * STRIDE_##scope##_##reg )
  57#endif
  58
  59#ifndef REG_WR_INT_VECT
  60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  61  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
  62             (index) * STRIDE_##scope##_##reg, (val) )
  63#endif
  64
  65#ifndef REG_TYPE_CONV
  66#define REG_TYPE_CONV( type, orgtype, val ) \
  67  ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
  68#endif
  69
  70#ifndef reg_page_size
  71#define reg_page_size 8192
  72#endif
  73
  74#ifndef REG_ADDR
  75#define REG_ADDR( scope, inst, reg ) \
  76  ( (inst) + REG_RD_ADDR_##scope##_##reg )
  77#endif
  78
  79#ifndef REG_ADDR_VECT
  80#define REG_ADDR_VECT( scope, inst, reg, index ) \
  81  ( (inst) + REG_RD_ADDR_##scope##_##reg + \
  82    (index) * STRIDE_##scope##_##reg )
  83#endif
  84
  85/* C-code for register scope iop_fifo_in_extra */
  86
  87/* Register rw_wr_data, scope iop_fifo_in_extra, type rw */
  88typedef unsigned int reg_iop_fifo_in_extra_rw_wr_data;
  89#define REG_RD_ADDR_iop_fifo_in_extra_rw_wr_data 0
  90#define REG_WR_ADDR_iop_fifo_in_extra_rw_wr_data 0
  91
  92/* Register r_stat, scope iop_fifo_in_extra, type r */
  93typedef struct {
  94  unsigned int avail_bytes : 4;
  95  unsigned int last        : 8;
  96  unsigned int dif_in_en   : 1;
  97  unsigned int dif_out_en  : 1;
  98  unsigned int dummy1      : 18;
  99} reg_iop_fifo_in_extra_r_stat;
 100#define REG_RD_ADDR_iop_fifo_in_extra_r_stat 4
 101
 102/* Register rw_strb_dif_in, scope iop_fifo_in_extra, type rw */
 103typedef struct {
 104  unsigned int last : 2;
 105  unsigned int dummy1 : 30;
 106} reg_iop_fifo_in_extra_rw_strb_dif_in;
 107#define REG_RD_ADDR_iop_fifo_in_extra_rw_strb_dif_in 8
 108#define REG_WR_ADDR_iop_fifo_in_extra_rw_strb_dif_in 8
 109
 110/* Register rw_intr_mask, scope iop_fifo_in_extra, type rw */
 111typedef struct {
 112  unsigned int urun      : 1;
 113  unsigned int last_data : 1;
 114  unsigned int dav       : 1;
 115  unsigned int avail     : 1;
 116  unsigned int orun      : 1;
 117  unsigned int dummy1    : 27;
 118} reg_iop_fifo_in_extra_rw_intr_mask;
 119#define REG_RD_ADDR_iop_fifo_in_extra_rw_intr_mask 12
 120#define REG_WR_ADDR_iop_fifo_in_extra_rw_intr_mask 12
 121
 122/* Register rw_ack_intr, scope iop_fifo_in_extra, type rw */
 123typedef struct {
 124  unsigned int urun      : 1;
 125  unsigned int last_data : 1;
 126  unsigned int dav       : 1;
 127  unsigned int avail     : 1;
 128  unsigned int orun      : 1;
 129  unsigned int dummy1    : 27;
 130} reg_iop_fifo_in_extra_rw_ack_intr;
 131#define REG_RD_ADDR_iop_fifo_in_extra_rw_ack_intr 16
 132#define REG_WR_ADDR_iop_fifo_in_extra_rw_ack_intr 16
 133
 134/* Register r_intr, scope iop_fifo_in_extra, type r */
 135typedef struct {
 136  unsigned int urun      : 1;
 137  unsigned int last_data : 1;
 138  unsigned int dav       : 1;
 139  unsigned int avail     : 1;
 140  unsigned int orun      : 1;
 141  unsigned int dummy1    : 27;
 142} reg_iop_fifo_in_extra_r_intr;
 143#define REG_RD_ADDR_iop_fifo_in_extra_r_intr 20
 144
 145/* Register r_masked_intr, scope iop_fifo_in_extra, type r */
 146typedef struct {
 147  unsigned int urun      : 1;
 148  unsigned int last_data : 1;
 149  unsigned int dav       : 1;
 150  unsigned int avail     : 1;
 151  unsigned int orun      : 1;
 152  unsigned int dummy1    : 27;
 153} reg_iop_fifo_in_extra_r_masked_intr;
 154#define REG_RD_ADDR_iop_fifo_in_extra_r_masked_intr 24
 155
 156
 157/* Constants */
 158enum {
 159  regk_iop_fifo_in_extra_fifo_in           = 0x00000002,
 160  regk_iop_fifo_in_extra_no                = 0x00000000,
 161  regk_iop_fifo_in_extra_rw_intr_mask_default = 0x00000000,
 162  regk_iop_fifo_in_extra_yes               = 0x00000001
 163};
 164#endif /* __iop_fifo_in_extra_defs_h */
 165