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13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/init.h>
17#include <linux/ioport.h>
18#include <linux/errno.h>
19
20#include "pci-frv.h"
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34
35void
36pcibios_align_resource(void *data, struct resource *res,
37 resource_size_t size, resource_size_t align)
38{
39 if (res->flags & IORESOURCE_IO) {
40 resource_size_t start = res->start;
41
42 if (start & 0x300) {
43 start = (start + 0x3ff) & ~0x3ff;
44 res->start = start;
45 }
46 }
47}
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83static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
84{
85 struct list_head *ln;
86 struct pci_bus *bus;
87 struct pci_dev *dev;
88 int idx;
89 struct resource *r;
90
91
92 for (ln=bus_list->next; ln != bus_list; ln=ln->next) {
93 bus = pci_bus_b(ln);
94 if ((dev = bus->self)) {
95 for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
96 r = &dev->resource[idx];
97 if (!r->start)
98 continue;
99 if (pci_claim_resource(dev, idx) < 0)
100 printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, pci_name(dev));
101 }
102 }
103 pcibios_allocate_bus_resources(&bus->children);
104 }
105}
106
107static void __init pcibios_allocate_resources(int pass)
108{
109 struct pci_dev *dev = NULL;
110 int idx, disabled;
111 u16 command;
112 struct resource *r;
113
114 for_each_pci_dev(dev) {
115 pci_read_config_word(dev, PCI_COMMAND, &command);
116 for(idx = 0; idx < 6; idx++) {
117 r = &dev->resource[idx];
118 if (r->parent)
119 continue;
120 if (!r->start)
121 continue;
122 if (r->flags & IORESOURCE_IO)
123 disabled = !(command & PCI_COMMAND_IO);
124 else
125 disabled = !(command & PCI_COMMAND_MEMORY);
126 if (pass == disabled) {
127 DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n",
128 r->start, r->end, r->flags, disabled, pass);
129 if (pci_claim_resource(dev, idx) < 0) {
130 printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, pci_name(dev));
131
132 r->end -= r->start;
133 r->start = 0;
134 }
135 }
136 }
137 if (!pass) {
138 r = &dev->resource[PCI_ROM_RESOURCE];
139 if (r->flags & IORESOURCE_ROM_ENABLE) {
140
141 u32 reg;
142 DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
143 r->flags &= ~IORESOURCE_ROM_ENABLE;
144 pci_read_config_dword(dev, dev->rom_base_reg, ®);
145 pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
146 }
147 }
148 }
149}
150
151static void __init pcibios_assign_resources(void)
152{
153 struct pci_dev *dev = NULL;
154 int idx;
155 struct resource *r;
156
157 for_each_pci_dev(dev) {
158 int class = dev->class >> 8;
159
160
161 if (!class || class == PCI_CLASS_BRIDGE_HOST)
162 continue;
163
164 for(idx=0; idx<6; idx++) {
165 r = &dev->resource[idx];
166
167
168
169
170 if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) ||
171 (class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO)))
172 continue;
173
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177
178
179 if (!r->start && r->end)
180 pci_assign_resource(dev, idx);
181 }
182
183 if (pci_probe & PCI_ASSIGN_ROMS) {
184 r = &dev->resource[PCI_ROM_RESOURCE];
185 r->end -= r->start;
186 r->start = 0;
187 if (r->end)
188 pci_assign_resource(dev, PCI_ROM_RESOURCE);
189 }
190 }
191}
192
193void __init pcibios_resource_survey(void)
194{
195 DBG("PCI: Allocating resources\n");
196 pcibios_allocate_bus_resources(&pci_root_buses);
197 pcibios_allocate_resources(0);
198 pcibios_allocate_resources(1);
199 pcibios_assign_resources();
200}
201
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205
206unsigned int pcibios_max_latency = 255;
207
208void pcibios_set_master(struct pci_dev *dev)
209{
210 u8 lat;
211 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
212 if (lat < 16)
213 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
214 else if (lat > pcibios_max_latency)
215 lat = pcibios_max_latency;
216 else
217 return;
218 printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
219 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
220}
221