LXR linux/arch/m68k/include/asm/io

   1/*
   2 * linux/include/asm-m68k/io.h
   3 *
   4 * 4/1/00 RZ: - rewritten to avoid clashes between ISA/PCI and other
   5 *              IO access
   6 *            - added Q40 support
   7 *            - added skeleton for GG-II and Amiga PCMCIA
   8 * 2/3/01 RZ: - moved a few more defs into raw_io.h
   9 *
  10 * inX/outX should not be used by any driver unless it does
  11 * ISA access. Other drivers should use function defined in raw_io.h
  12 * or define its own macros on top of these.
  13 *
  14 *    inX(),outX()              are for ISA I/O
  15 *    isa_readX(),isa_writeX()  are for ISA memory
  16 */
  17
  18#ifndef _IO_H
  19#define _IO_H
  20
  21#ifdef __KERNEL__
  22
  23#include <linux/compiler.h>
  24#include <asm/raw_io.h>
  25#include <asm/virtconvert.h>
  26
  27#include <asm-generic/iomap.h>
  28
  29#ifdef CONFIG_ATARI
  30#include <asm/atarihw.h>
  31#endif
  32
  33
  34/*
  35 * IO/MEM definitions for various ISA bridges
  36 */
  37
  38
  39#ifdef CONFIG_Q40
  40
  41#define q40_isa_io_base  0xff400000
  42#define q40_isa_mem_base 0xff800000
  43
  44#define Q40_ISA_IO_B(ioaddr) (q40_isa_io_base+1+4*((unsigned long)(ioaddr)))
  45#define Q40_ISA_IO_W(ioaddr) (q40_isa_io_base+  4*((unsigned long)(ioaddr)))
  46#define Q40_ISA_MEM_B(madr)  (q40_isa_mem_base+1+4*((unsigned long)(madr)))
  47#define Q40_ISA_MEM_W(madr)  (q40_isa_mem_base+  4*((unsigned long)(madr)))
  48
  49#define MULTI_ISA 0
  50#endif /* Q40 */
  51
  52/* GG-II Zorro to ISA bridge */
  53#ifdef CONFIG_GG2
  54
  55extern unsigned long gg2_isa_base;
  56#define GG2_ISA_IO_B(ioaddr) (gg2_isa_base+1+((unsigned long)(ioaddr)*4))
  57#define GG2_ISA_IO_W(ioaddr) (gg2_isa_base+  ((unsigned long)(ioaddr)*4))
  58#define GG2_ISA_MEM_B(madr)  (gg2_isa_base+1+(((unsigned long)(madr)*4) & 0xfffff))
  59#define GG2_ISA_MEM_W(madr)  (gg2_isa_base+  (((unsigned long)(madr)*4) & 0xfffff))
  60
  61#ifndef MULTI_ISA
  62#define MULTI_ISA 0
  63#else
  64#undef MULTI_ISA
  65#define MULTI_ISA 1
  66#endif
  67#endif /* GG2 */
  68
  69#ifdef CONFIG_AMIGA_PCMCIA
  70#include <asm/amigayle.h>
  71
  72#define AG_ISA_IO_B(ioaddr) ( GAYLE_IO+(ioaddr)+(((ioaddr)&1)*GAYLE_ODD) )
  73#define AG_ISA_IO_W(ioaddr) ( GAYLE_IO+(ioaddr) )
  74
  75#ifndef MULTI_ISA
  76#define MULTI_ISA 0
  77#else
  78#undef MULTI_ISA
  79#define MULTI_ISA 1
  80#endif
  81#endif /* AMIGA_PCMCIA */
  82
  83
  84
  85#ifdef CONFIG_ISA
  86
  87#if MULTI_ISA == 0
  88#undef MULTI_ISA
  89#endif
  90
  91#define ISA_TYPE_Q40 (1)
  92#define ISA_TYPE_GG2 (2)
  93#define ISA_TYPE_AG  (3)
  94
  95#if defined(CONFIG_Q40) && !defined(MULTI_ISA)
  96#define ISA_TYPE ISA_TYPE_Q40
  97#define ISA_SEX  0
  98#endif
  99#if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA)
 100#define ISA_TYPE ISA_TYPE_AG
 101#define ISA_SEX  1
 102#endif
 103#if defined(CONFIG_GG2) && !defined(MULTI_ISA)
 104#define ISA_TYPE ISA_TYPE_GG2
 105#define ISA_SEX  0
 106#endif
 107
 108#ifdef MULTI_ISA
 109extern int isa_type;
 110extern int isa_sex;
 111
 112#define ISA_TYPE isa_type
 113#define ISA_SEX  isa_sex
 114#endif
 115
 116/*
 117 * define inline addr translation functions. Normally only one variant will
 118 * be compiled in so the case statement will be optimised away
 119 */
 120
 121static inline u8 __iomem *isa_itb(unsigned long addr)
 122{
 123  switch(ISA_TYPE)
 124    {
 125#ifdef CONFIG_Q40
 126    case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr);
 127#endif
 128#ifdef CONFIG_GG2
 129    case ISA_TYPE_GG2: return (u8 __iomem *)GG2_ISA_IO_B(addr);
 130#endif
 131#ifdef CONFIG_AMIGA_PCMCIA
 132    case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr);
 133#endif
 134    default: return NULL; /* avoid warnings, just in case */
 135    }
 136}
 137static inline u16 __iomem *isa_itw(unsigned long addr)
 138{
 139  switch(ISA_TYPE)
 140    {
 141#ifdef CONFIG_Q40
 142    case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr);
 143#endif
 144#ifdef CONFIG_GG2
 145    case ISA_TYPE_GG2: return (u16 __iomem *)GG2_ISA_IO_W(addr);
 146#endif
 147#ifdef CONFIG_AMIGA_PCMCIA
 148    case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr);
 149#endif
 150    default: return NULL; /* avoid warnings, just in case */
 151    }
 152}
 153static inline u32 __iomem *isa_itl(unsigned long addr)
 154{
 155  switch(ISA_TYPE)
 156    {
 157#ifdef CONFIG_AMIGA_PCMCIA
 158    case ISA_TYPE_AG: return (u32 __iomem *)AG_ISA_IO_W(addr);
 159#endif
 160    default: return 0; /* avoid warnings, just in case */
 161    }
 162}
 163static inline u8 __iomem *isa_mtb(unsigned long addr)
 164{
 165  switch(ISA_TYPE)
 166    {
 167#ifdef CONFIG_Q40
 168    case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
 169#endif
 170#ifdef CONFIG_GG2
 171    case ISA_TYPE_GG2: return (u8 __iomem *)GG2_ISA_MEM_B(addr);
 172#endif
 173#ifdef CONFIG_AMIGA_PCMCIA
 174    case ISA_TYPE_AG: return (u8 __iomem *)addr;
 175#endif
 176    default: return NULL; /* avoid warnings, just in case */
 177    }
 178}
 179static inline u16 __iomem *isa_mtw(unsigned long addr)
 180{
 181  switch(ISA_TYPE)
 182    {
 183#ifdef CONFIG_Q40
 184    case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
 185#endif
 186#ifdef CONFIG_GG2
 187    case ISA_TYPE_GG2: return (u16 __iomem *)GG2_ISA_MEM_W(addr);
 188#endif
 189#ifdef CONFIG_AMIGA_PCMCIA
 190    case ISA_TYPE_AG: return (u16 __iomem *)addr;
 191#endif
 192    default: return NULL; /* avoid warnings, just in case */
 193    }
 194}
 195
 196
 197#define isa_inb(port)      in_8(isa_itb(port))
 198#define isa_inw(port)      (ISA_SEX ? in_be16(isa_itw(port)) : in_le16(isa_itw(port)))
 199#define isa_inl(port)      (ISA_SEX ? in_be32(isa_itl(port)) : in_le32(isa_itl(port)))
 200#define isa_outb(val,port) out_8(isa_itb(port),(val))
 201#define isa_outw(val,port) (ISA_SEX ? out_be16(isa_itw(port),(val)) : out_le16(isa_itw(port),(val)))
 202#define isa_outl(val,port) (ISA_SEX ? out_be32(isa_itl(port),(val)) : out_le32(isa_itl(port),(val)))
 203
 204#define isa_readb(p)       in_8(isa_mtb((unsigned long)(p)))
 205#define isa_readw(p)       \
 206        (ISA_SEX ? in_be16(isa_mtw((unsigned long)(p))) \
 207                 : in_le16(isa_mtw((unsigned long)(p))))
 208#define isa_writeb(val,p)  out_8(isa_mtb((unsigned long)(p)),(val))
 209#define isa_writew(val,p)  \
 210        (ISA_SEX ? out_be16(isa_mtw((unsigned long)(p)),(val))  \
 211                 : out_le16(isa_mtw((unsigned long)(p)),(val)))
 212
 213static inline void isa_delay(void)
 214{
 215  switch(ISA_TYPE)
 216    {
 217#ifdef CONFIG_Q40
 218    case ISA_TYPE_Q40: isa_outb(0,0x80); break;
 219#endif
 220#ifdef CONFIG_GG2
 221    case ISA_TYPE_GG2: break;
 222#endif
 223#ifdef CONFIG_AMIGA_PCMCIA
 224    case ISA_TYPE_AG: break;
 225#endif
 226    default: break; /* avoid warnings */
 227    }
 228}
 229
 230#define isa_inb_p(p)      ({u8 v=isa_inb(p);isa_delay();v;})
 231#define isa_outb_p(v,p)   ({isa_outb((v),(p));isa_delay();})
 232#define isa_inw_p(p)      ({u16 v=isa_inw(p);isa_delay();v;})
 233#define isa_outw_p(v,p)   ({isa_outw((v),(p));isa_delay();})
 234#define isa_inl_p(p)      ({u32 v=isa_inl(p);isa_delay();v;})
 235#define isa_outl_p(v,p)   ({isa_outl((v),(p));isa_delay();})
 236
 237#define isa_insb(port, buf, nr) raw_insb(isa_itb(port), (u8 *)(buf), (nr))
 238#define isa_outsb(port, buf, nr) raw_outsb(isa_itb(port), (u8 *)(buf), (nr))
 239
 240#define isa_insw(port, buf, nr)     \
 241       (ISA_SEX ? raw_insw(isa_itw(port), (u16 *)(buf), (nr)) :    \
 242                  raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
 243
 244#define isa_outsw(port, buf, nr)    \
 245       (ISA_SEX ? raw_outsw(isa_itw(port), (u16 *)(buf), (nr)) :  \
 246                  raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
 247
 248#define isa_insl(port, buf, nr)     \
 249       (ISA_SEX ? raw_insl(isa_itl(port), (u32 *)(buf), (nr)) :    \
 250                  raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
 251
 252#define isa_outsl(port, buf, nr)    \
 253       (ISA_SEX ? raw_outsl(isa_itl(port), (u32 *)(buf), (nr)) :  \
 254                  raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
 255
 256
 257#define inb     isa_inb
 258#define inb_p   isa_inb_p
 259#define outb    isa_outb
 260#define outb_p  isa_outb_p
 261#define inw     isa_inw
 262#define inw_p   isa_inw_p
 263#define outw    isa_outw
 264#define outw_p  isa_outw_p
 265#define inl     isa_inl
 266#define inl_p   isa_inl_p
 267#define outl    isa_outl
 268#define outl_p  isa_outl_p
 269#define insb    isa_insb
 270#define insw    isa_insw
 271#define insl    isa_insl
 272#define outsb   isa_outsb
 273#define outsw   isa_outsw
 274#define outsl   isa_outsl
 275#define readb   isa_readb
 276#define readw   isa_readw
 277#define writeb  isa_writeb
 278#define writew  isa_writew
 279
 280#else  /* CONFIG_ISA */
 281
 282/*
 283 * We need to define dummy functions for GENERIC_IOMAP support.
 284 */
 285#define inb(port)          0xff
 286#define inb_p(port)        0xff
 287#define outb(val,port)     ((void)0)
 288#define outb_p(val,port)   ((void)0)
 289#define inw(port)          0xffff
 290#define outw(val,port)     ((void)0)
 291#define inl(port)          0xffffffffUL
 292#define outl(val,port)     ((void)0)
 293
 294#define insb(port,buf,nr)  ((void)0)
 295#define outsb(port,buf,nr) ((void)0)
 296#define insw(port,buf,nr)  ((void)0)
 297#define outsw(port,buf,nr) ((void)0)
 298#define insl(port,buf,nr)  ((void)0)
 299#define outsl(port,buf,nr) ((void)0)
 300
 301/*
 302 * These should be valid on any ioremap()ed region
 303 */
 304#define readb(addr)      in_8(addr)
 305#define writeb(val,addr) out_8((addr),(val))
 306#define readw(addr)      in_le16(addr)
 307#define writew(val,addr) out_le16((addr),(val))
 308
 309#endif /* CONFIG_ISA */
 310
 311#define readl(addr)      in_le32(addr)
 312#define writel(val,addr) out_le32((addr),(val))
 313
 314#define mmiowb()
 315
 316static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
 317{
 318        return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
 319}
 320static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
 321{
 322        return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
 323}
 324static inline void __iomem *ioremap_writethrough(unsigned long physaddr,
 325                                         unsigned long size)
 326{
 327        return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
 328}
 329static inline void __iomem *ioremap_fullcache(unsigned long physaddr,
 330                                      unsigned long size)
 331{
 332        return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
 333}
 334
 335static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
 336{
 337        __builtin_memset((void __force *) addr, val, count);
 338}
 339static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
 340{
 341        __builtin_memcpy(dst, (void __force *) src, count);
 342}
 343static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
 344{
 345        __builtin_memcpy((void __force *) dst, src, count);
 346}
 347
 348#ifndef CONFIG_SUN3
 349#define IO_SPACE_LIMIT 0xffff
 350#else
 351#define IO_SPACE_LIMIT 0x0fffffff
 352#endif
 353
 354#endif /* __KERNEL__ */
 355
 356#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED          1
 357
 358/*
 359 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 360 * access
 361 */
 362#define xlate_dev_mem_ptr(p)    __va(p)
 363
 364/*
 365 * Convert a virtual cached pointer to an uncached pointer
 366 */
 367#define xlate_dev_kmem_ptr(p)   p
 368
 369#endif /* _IO_H */
 370