LXR linux/arch/mips/mipssim/sim

   1/*
   2 * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
   3 *
   4 *  This program is free software; you can distribute it and/or modify it
   5 *  under the terms of the GNU General Public License (Version 2) as
   6 *  published by the Free Software Foundation.
   7 *
   8 *  This program is distributed in the hope it will be useful, but WITHOUT
   9 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  11 *  for more details.
  12 *
  13 *  You should have received a copy of the GNU General Public License along
  14 *  with this program; if not, write to the Free Software Foundation, Inc.,
  15 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  16 *
  17 */
  18/*
  19 * Simulator Platform-specific hooks for SMTC operation
  20 */
  21#include <linux/kernel.h>
  22#include <linux/sched.h>
  23#include <linux/cpumask.h>
  24#include <linux/interrupt.h>
  25#include <linux/smp.h>
  26
  27#include <asm/atomic.h>
  28#include <asm/cpu.h>
  29#include <asm/processor.h>
  30#include <asm/system.h>
  31#include <asm/mmu_context.h>
  32#include <asm/smtc_ipi.h>
  33
  34/* VPE/SMP Prototype implements platform interfaces directly */
  35
  36/*
  37 * Cause the specified action to be performed on a targeted "CPU"
  38 */
  39
  40static void ssmtc_send_ipi_single(int cpu, unsigned int action)
  41{
  42        smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
  43        /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
  44}
  45
  46static inline void ssmtc_send_ipi_mask(const struct cpumask *mask,
  47                                       unsigned int action)
  48{
  49        unsigned int i;
  50
  51        for_each_cpu(i, mask)
  52                ssmtc_send_ipi_single(i, action);
  53}
  54
  55/*
  56 * Post-config but pre-boot cleanup entry point
  57 */
  58static void __cpuinit ssmtc_init_secondary(void)
  59{
  60        void smtc_init_secondary(void);
  61
  62        smtc_init_secondary();
  63}
  64
  65/*
  66 * SMP initialization finalization entry point
  67 */
  68static void __cpuinit ssmtc_smp_finish(void)
  69{
  70        smtc_smp_finish();
  71}
  72
  73/*
  74 * Hook for after all CPUs are online
  75 */
  76static void ssmtc_cpus_done(void)
  77{
  78}
  79
  80/*
  81 * Platform "CPU" startup hook
  82 */
  83static void __cpuinit ssmtc_boot_secondary(int cpu, struct task_struct *idle)
  84{
  85        smtc_boot_secondary(cpu, idle);
  86}
  87
  88static void __init ssmtc_smp_setup(void)
  89{
  90        if (read_c0_config3() & (1 << 2))
  91                mipsmt_build_cpu_map(0);
  92}
  93
  94/*
  95 * Platform SMP pre-initialization
  96 */
  97static void ssmtc_prepare_cpus(unsigned int max_cpus)
  98{
  99        /*
 100         * As noted above, we can assume a single CPU for now
 101         * but it may be multithreaded.
 102         */
 103
 104        if (read_c0_config3() & (1 << 2)) {
 105                mipsmt_prepare_cpus();
 106        }
 107}
 108
 109struct plat_smp_ops ssmtc_smp_ops = {
 110        .send_ipi_single        = ssmtc_send_ipi_single,
 111        .send_ipi_mask          = ssmtc_send_ipi_mask,
 112        .init_secondary         = ssmtc_init_secondary,
 113        .smp_finish             = ssmtc_smp_finish,
 114        .cpus_done              = ssmtc_cpus_done,
 115        .boot_secondary         = ssmtc_boot_secondary,
 116        .smp_setup              = ssmtc_smp_setup,
 117        .prepare_cpus           = ssmtc_prepare_cpus,
 118};
 119