LXR linux/arch/mips/pci/ops-titan.c

   1/*
   2 * Copyright 2003 PMC-Sierra
   3 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
   4 *
   5 *  This program is free software; you can redistribute  it and/or modify it
   6 *  under  the terms of  the GNU General  Public License as published by the
   7 *  Free Software Foundation;  either version 2 of the  License, or (at your
   8 *  option) any later version.
   9 *
  10 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  11 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  12 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  13 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  14 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  16 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  18 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  19 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20 *
  21 *  You should have received a copy of the  GNU General Public License along
  22 *  with this program; if not, write  to the Free Software Foundation, Inc.,
  23 *  675 Mass Ave, Cambridge, MA 02139, USA.
  24 */
  25#include <linux/types.h>
  26#include <linux/pci.h>
  27#include <linux/kernel.h>
  28
  29#include <asm/pci.h>
  30#include <asm/io.h>
  31#include <asm/rm9k-ocd.h>
  32
  33/*
  34 * PCI specific defines
  35 */
  36#define TITAN_PCI_0_CONFIG_ADDRESS      0x780
  37#define TITAN_PCI_0_CONFIG_DATA         0x784
  38
  39/*
  40 * Titan PCI Config Read Byte
  41 */
  42static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
  43        int size, u32 * val)
  44{
  45        uint32_t address, tmp;
  46        int dev, busno, func;
  47
  48        busno = bus->number;
  49        dev = PCI_SLOT(devfn);
  50        func = PCI_FUNC(devfn);
  51
  52        address = (busno << 16) | (dev << 11) | (func << 8) |
  53                  (reg & 0xfc) | 0x80000000;
  54
  55
  56        /* start the configuration cycle */
  57        ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);
  58        tmp = ocd_readl(TITAN_PCI_0_CONFIG_DATA) >> ((reg & 3) << 3);
  59
  60        switch (size) {
  61        case 1:
  62                tmp &= 0xff;
  63        case 2:
  64                tmp &= 0xffff;
  65        }
  66        *val = tmp;
  67
  68        return PCIBIOS_SUCCESSFUL;
  69}
  70
  71static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg,
  72        int size, u32 val)
  73{
  74        uint32_t address;
  75        int dev, busno, func;
  76
  77        busno = bus->number;
  78        dev = PCI_SLOT(devfn);
  79        func = PCI_FUNC(devfn);
  80
  81        address = (busno << 16) | (dev << 11) | (func << 8) |
  82                (reg & 0xfc) | 0x80000000;
  83
  84        /* start the configuration cycle */
  85        ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);
  86
  87        /* write the data */
  88        switch (size) {
  89        case 1:
  90                ocd_writeb(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x3));
  91                break;
  92
  93        case 2:
  94                ocd_writew(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x2));
  95                break;
  96
  97        case 4:
  98                ocd_writel(val, TITAN_PCI_0_CONFIG_DATA);
  99                break;
 100        }
 101
 102        return PCIBIOS_SUCCESSFUL;
 103}
 104
 105/*
 106 * Titan PCI structure
 107 */
 108struct pci_ops titan_pci_ops = {
 109        titan_read_config,
 110        titan_write_config,
 111};
 112