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36#include <linux/types.h>
37#include <linux/pci.h>
38#include <linux/kernel.h>
39#include <linux/init.h>
40#include <linux/interrupt.h>
41
42#include <asm/addrspace.h>
43#include <asm/txx9irq.h>
44#include <asm/txx9/pci.h>
45#include <asm/txx9/tx3927.h>
46
47static int mkaddr(struct pci_bus *bus, unsigned char devfn, unsigned char where)
48{
49 if (bus->parent == NULL &&
50 devfn >= PCI_DEVFN(TX3927_PCIC_MAX_DEVNU, 0))
51 return -1;
52 tx3927_pcicptr->ica =
53 ((bus->number & 0xff) << 0x10) |
54 ((devfn & 0xff) << 0x08) |
55 (where & 0xfc) | (bus->parent ? 1 : 0);
56
57
58 tx3927_pcicptr->pcistat |= PCI_STATUS_REC_MASTER_ABORT;
59 tx3927_pcicptr->pcistatim &= ~PCI_STATUS_REC_MASTER_ABORT;
60 return 0;
61}
62
63static inline int check_abort(void)
64{
65 if (tx3927_pcicptr->pcistat & PCI_STATUS_REC_MASTER_ABORT) {
66 tx3927_pcicptr->pcistat |= PCI_STATUS_REC_MASTER_ABORT;
67 tx3927_pcicptr->pcistatim |= PCI_STATUS_REC_MASTER_ABORT;
68
69 iob();
70 return PCIBIOS_DEVICE_NOT_FOUND;
71 }
72 return PCIBIOS_SUCCESSFUL;
73}
74
75static int tx3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
76 int where, int size, u32 * val)
77{
78 if (mkaddr(bus, devfn, where)) {
79 *val = 0xffffffff;
80 return PCIBIOS_DEVICE_NOT_FOUND;
81 }
82
83 switch (size) {
84 case 1:
85 *val = *(volatile u8 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 3));
86 break;
87
88 case 2:
89 *val = le16_to_cpu(*(volatile u16 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 3)));
90 break;
91
92 case 4:
93 *val = le32_to_cpu(tx3927_pcicptr->icd);
94 break;
95 }
96
97 return check_abort();
98}
99
100static int tx3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
101 int where, int size, u32 val)
102{
103 if (mkaddr(bus, devfn, where))
104 return PCIBIOS_DEVICE_NOT_FOUND;
105
106 switch (size) {
107 case 1:
108 *(volatile u8 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 3)) = val;
109 break;
110
111 case 2:
112 *(volatile u16 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 2)) =
113 cpu_to_le16(val);
114 break;
115
116 case 4:
117 tx3927_pcicptr->icd = cpu_to_le32(val);
118 }
119
120 return check_abort();
121}
122
123static struct pci_ops tx3927_pci_ops = {
124 .read = tx3927_pci_read_config,
125 .write = tx3927_pci_write_config,
126};
127
128void __init tx3927_pcic_setup(struct pci_controller *channel,
129 unsigned long sdram_size, int extarb)
130{
131 unsigned long flags;
132 unsigned long io_base =
133 channel->io_resource->start + mips_io_port_base - IO_BASE;
134 unsigned long io_size =
135 channel->io_resource->end - channel->io_resource->start;
136 unsigned long io_pciaddr =
137 channel->io_resource->start - channel->io_offset;
138 unsigned long mem_base =
139 channel->mem_resource->start;
140 unsigned long mem_size =
141 channel->mem_resource->end - channel->mem_resource->start;
142 unsigned long mem_pciaddr =
143 channel->mem_resource->start - channel->mem_offset;
144
145 printk(KERN_INFO "TX3927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s",
146 tx3927_pcicptr->did, tx3927_pcicptr->vid,
147 tx3927_pcicptr->rid,
148 extarb ? "External" : "Internal");
149 channel->pci_ops = &tx3927_pci_ops;
150
151 local_irq_save(flags);
152
153 tx3927_pcicptr->lbc = TX3927_PCIC_LBC_EPCAD;
154#ifdef __BIG_ENDIAN
155 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_IBSE |
156 TX3927_PCIC_LBC_TIBSE |
157 TX3927_PCIC_LBC_TMFBSE | TX3927_PCIC_LBC_MSDSE;
158#endif
159
160 tx3927_pcicptr->iomas = ~(io_size - 1);
161 tx3927_pcicptr->ilbioma = io_base;
162 tx3927_pcicptr->ipbioma = io_pciaddr;
163 tx3927_pcicptr->mmas = ~(mem_size - 1);
164 tx3927_pcicptr->ilbmma = mem_base;
165 tx3927_pcicptr->ipbmma = mem_pciaddr;
166
167 tx3927_pcicptr->iobas = 0xffffffff;
168 tx3927_pcicptr->ioba = 0;
169 tx3927_pcicptr->tlbioma = 0;
170 tx3927_pcicptr->mbas = ~(sdram_size - 1);
171 tx3927_pcicptr->mba = 0;
172 tx3927_pcicptr->tlbmma = 0;
173
174 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
175
176
177 tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
178
179 tx3927_pcicptr->lbim = TX3927_PCIC_LBIM_ALL;
180
181 tx3927_pcicptr->pcistat = TX3927_PCIC_PCISTATIM_ALL;
182
183 tx3927_pcicptr->pcistatim = TX3927_PCIC_PCISTATIM_ALL;
184
185
186 tx3927_pcicptr->il = TX3927_IR_PCI;
187
188 tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E;
189
190
191 if (!extarb)
192 tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN;
193
194 tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER |
195 PCI_COMMAND_MEMORY |
196 PCI_COMMAND_IO |
197 PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
198 local_irq_restore(flags);
199}
200
201static irqreturn_t tx3927_pcierr_interrupt(int irq, void *dev_id)
202{
203 struct pt_regs *regs = get_irq_regs();
204
205 if (txx9_pci_err_action != TXX9_PCI_ERR_IGNORE) {
206 printk(KERN_WARNING "PCI error interrupt at 0x%08lx.\n",
207 regs->cp0_epc);
208 printk(KERN_WARNING "pcistat:%02x, lbstat:%04lx\n",
209 tx3927_pcicptr->pcistat, tx3927_pcicptr->lbstat);
210 }
211 if (txx9_pci_err_action != TXX9_PCI_ERR_PANIC) {
212
213 tx3927_pcicptr->pcistat |= TX3927_PCIC_PCISTATIM_ALL;
214 tx3927_pcicptr->istat = TX3927_PCIC_IIM_ALL;
215 tx3927_pcicptr->tstat = TX3927_PCIC_TIM_ALL;
216 tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
217 return IRQ_HANDLED;
218 }
219 console_verbose();
220 panic("PCI error.");
221}
222
223void __init tx3927_setup_pcierr_irq(void)
224{
225 if (request_irq(TXX9_IRQ_BASE + TX3927_IR_PCI,
226 tx3927_pcierr_interrupt,
227 IRQF_DISABLED, "PCI error",
228 (void *)TX3927_PCIC_REG))
229 printk(KERN_WARNING "Failed to request irq for PCIERR\n");
230}
231
