LXR linux/arch/mips/pmc-sierra/yosemite/atmel_read

   1/*
   2 *  arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c
   3 *
   4 *  Copyright (C) 2003 PMC-Sierra Inc.
   5 *  Author: Manish Lachwani (lachwani@pmc-sierra.com)
   6 *  Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
   7 *
   8 *  This program is free software; you can redistribute  it and/or modify it
   9 *  under  the terms of  the GNU General  Public License as published by the
  10 *  Free Software Foundation;  either version 2 of the  License, or (at your
  11 *  option) any later version.
  12 *
  13 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  14 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  15 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  16 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  17 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  18 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  19 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  20 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  21 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  22 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  23 *
  24 *  You should have received a copy of the  GNU General Public License along
  25 *  with this program; if not, write  to the Free Software Foundation, Inc.,
  26 *  675 Mass Ave, Cambridge, MA 02139, USA.
  27 */
  28
  29/*
  30 * Header file for atmel_read_eeprom.c
  31 */
  32
  33#include <linux/types.h>
  34#include <linux/pci.h>
  35#include <linux/kernel.h>
  36#include <linux/slab.h>
  37#include <asm/pci.h>
  38#include <asm/io.h>
  39#include <linux/init.h>
  40#include <asm/termios.h>
  41#include <asm/ioctls.h>
  42#include <linux/ioctl.h>
  43#include <linux/fcntl.h>
  44
  45#define DEFAULT_PORT    "/dev/ttyS0"    /* Port to open */
  46#define TXX             0               /* Dummy loop for spinning */
  47
  48#define BLOCK_SEL       0x00
  49#define SLAVE_ADDR      0xa0
  50#define READ_BIT        0x01
  51#define WRITE_BIT       0x00
  52#define R_HEADER        SLAVE_ADDR + BLOCK_SEL + READ_BIT
  53#define W_HEADER        SLAVE_ADDR + BLOCK_SEL + WRITE_BIT
  54
  55/*
  56 * Clock, Voltages and Data
  57 */
  58#define vcc_off         (ioctl(fd, TIOCSBRK, 0))
  59#define vcc_on          (ioctl(fd, TIOCCBRK, 0))
  60#define sda_hi          (ioctl(fd, TIOCMBIS, &dtr))
  61#define sda_lo          (ioctl(fd, TIOCMBIC, &dtr))
  62#define scl_lo          (ioctl(fd, TIOCMBIC, &rts))
  63#define scl_hi          (ioctl(fd, TIOCMBIS, &rts))
  64
  65const char rts = TIOCM_RTS;
  66const char dtr = TIOCM_DTR;
  67int fd;
  68
  69