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19#include <linux/init.h>
20#include <linux/delay.h>
21#include <linux/interrupt.h>
22#include <linux/smp.h>
23#include <linux/kernel_stat.h>
24
25#include <asm/mmu_context.h>
26#include <asm/io.h>
27#include <asm/fw/cfe/cfe_api.h>
28#include <asm/sibyte/sb1250.h>
29#include <asm/sibyte/sb1250_regs.h>
30#include <asm/sibyte/sb1250_int.h>
31
32static void *mailbox_set_regs[] = {
33 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU),
34 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU)
35};
36
37static void *mailbox_clear_regs[] = {
38 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU),
39 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU)
40};
41
42static void *mailbox_regs[] = {
43 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU),
44 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU)
45};
46
47
48
49
50void __cpuinit sb1250_smp_init(void)
51{
52 unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 |
53 STATUSF_IP1 | STATUSF_IP0;
54
55
56 change_c0_status(ST0_IM, imask);
57}
58
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66
67
68static void sb1250_send_ipi_single(int cpu, unsigned int action)
69{
70 __raw_writeq((((u64)action) << 48), mailbox_set_regs[cpu]);
71}
72
73static inline void sb1250_send_ipi_mask(const struct cpumask *mask,
74 unsigned int action)
75{
76 unsigned int i;
77
78 for_each_cpu(i, mask)
79 sb1250_send_ipi_single(i, action);
80}
81
82
83
84
85static void __cpuinit sb1250_init_secondary(void)
86{
87 extern void sb1250_smp_init(void);
88
89 sb1250_smp_init();
90}
91
92
93
94
95
96static void __cpuinit sb1250_smp_finish(void)
97{
98 extern void sb1250_clockevent_init(void);
99
100 sb1250_clockevent_init();
101 local_irq_enable();
102}
103
104
105
106
107static void sb1250_cpus_done(void)
108{
109}
110
111
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113
114
115static void __cpuinit sb1250_boot_secondary(int cpu, struct task_struct *idle)
116{
117 int retval;
118
119 retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap,
120 __KSTK_TOS(idle),
121 (unsigned long)task_thread_info(idle), 0);
122 if (retval != 0)
123 printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval);
124}
125
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127
128
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130
131
132
133static void __init sb1250_smp_setup(void)
134{
135 int i, num;
136
137 cpus_clear(cpu_possible_map);
138 cpu_set(0, cpu_possible_map);
139 __cpu_number_map[0] = 0;
140 __cpu_logical_map[0] = 0;
141
142 for (i = 1, num = 0; i < NR_CPUS; i++) {
143 if (cfe_cpu_stop(i) == 0) {
144 cpu_set(i, cpu_possible_map);
145 __cpu_number_map[i] = ++num;
146 __cpu_logical_map[num] = i;
147 }
148 }
149 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
150}
151
152static void __init sb1250_prepare_cpus(unsigned int max_cpus)
153{
154}
155
156struct plat_smp_ops sb_smp_ops = {
157 .send_ipi_single = sb1250_send_ipi_single,
158 .send_ipi_mask = sb1250_send_ipi_mask,
159 .init_secondary = sb1250_init_secondary,
160 .smp_finish = sb1250_smp_finish,
161 .cpus_done = sb1250_cpus_done,
162 .boot_secondary = sb1250_boot_secondary,
163 .smp_setup = sb1250_smp_setup,
164 .prepare_cpus = sb1250_prepare_cpus,
165};
166
167void sb1250_mailbox_interrupt(void)
168{
169 int cpu = smp_processor_id();
170 int irq = K_INT_MBOX_0;
171 unsigned int action;
172
173 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
174
175 action = (____raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff;
176
177
178 ____raw_writeq(((u64)action) << 48, mailbox_clear_regs[cpu]);
179
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183
184
185 if (action & SMP_CALL_FUNCTION)
186 smp_call_function_interrupt();
187}
188