LXR linux/arch/powerpc/include/asm/page

   1#ifndef _ASM_POWERPC_PAGE_64_H
   2#define _ASM_POWERPC_PAGE_64_H
   3
   4/*
   5 * Copyright (C) 2001 PPC64 Team, IBM Corp
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License
   9 * as published by the Free Software Foundation; either version
  10 * 2 of the License, or (at your option) any later version.
  11 */
  12
  13/*
  14 * We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux
  15 * specific, every notion of page number shared with the firmware, TCEs,
  16 * iommu, etc... still uses a page size of 4K.
  17 */
  18#define HW_PAGE_SHIFT           12
  19#define HW_PAGE_SIZE            (ASM_CONST(1) << HW_PAGE_SHIFT)
  20#define HW_PAGE_MASK            (~(HW_PAGE_SIZE-1))
  21
  22/*
  23 * PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
  24 * HW_PAGE_SHIFT, that is 4K pages.
  25 */
  26#define PAGE_FACTOR             (PAGE_SHIFT - HW_PAGE_SHIFT)
  27
  28/* Segment size; normal 256M segments */
  29#define SID_SHIFT               28
  30#define SID_MASK                ASM_CONST(0xfffffffff)
  31#define ESID_MASK               0xfffffffff0000000UL
  32#define GET_ESID(x)             (((x) >> SID_SHIFT) & SID_MASK)
  33
  34/* 1T segments */
  35#define SID_SHIFT_1T            40
  36#define SID_MASK_1T             0xffffffUL
  37#define ESID_MASK_1T            0xffffff0000000000UL
  38#define GET_ESID_1T(x)          (((x) >> SID_SHIFT_1T) & SID_MASK_1T)
  39
  40#ifndef __ASSEMBLY__
  41#include <asm/cache.h>
  42
  43typedef unsigned long pte_basic_t;
  44
  45static __inline__ void clear_page(void *addr)
  46{
  47        unsigned long lines, line_size;
  48
  49        line_size = ppc64_caches.dline_size;
  50        lines = ppc64_caches.dlines_per_page;
  51
  52        __asm__ __volatile__(
  53        "mtctr  %1      # clear_page\n\
  541:      dcbz    0,%0\n\
  55        add     %0,%0,%3\n\
  56        bdnz+   1b"
  57        : "=r" (addr)
  58        : "r" (lines), "0" (addr), "r" (line_size)
  59        : "ctr", "memory");
  60}
  61
  62extern void copy_4K_page(void *to, void *from);
  63
  64#ifdef CONFIG_PPC_64K_PAGES
  65static inline void copy_page(void *to, void *from)
  66{
  67        unsigned int i;
  68        for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) {
  69                copy_4K_page(to, from);
  70                to += 4096;
  71                from += 4096;
  72        }
  73}
  74#else /* CONFIG_PPC_64K_PAGES */
  75static inline void copy_page(void *to, void *from)
  76{
  77        copy_4K_page(to, from);
  78}
  79#endif /* CONFIG_PPC_64K_PAGES */
  80
  81/* Log 2 of page table size */
  82extern u64 ppc64_pft_size;
  83
  84/* Large pages size */
  85#ifdef CONFIG_HUGETLB_PAGE
  86extern unsigned int HPAGE_SHIFT;
  87#else
  88#define HPAGE_SHIFT PAGE_SHIFT
  89#endif
  90#define HPAGE_SIZE              ((1UL) << HPAGE_SHIFT)
  91#define HPAGE_MASK              (~(HPAGE_SIZE - 1))
  92#define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
  93#define HUGE_MAX_HSTATE         3
  94
  95#endif /* __ASSEMBLY__ */
  96
  97#ifdef CONFIG_PPC_MM_SLICES
  98
  99#define SLICE_LOW_SHIFT         28
 100#define SLICE_HIGH_SHIFT        40
 101
 102#define SLICE_LOW_TOP           (0x100000000ul)
 103#define SLICE_NUM_LOW           (SLICE_LOW_TOP >> SLICE_LOW_SHIFT)
 104#define SLICE_NUM_HIGH          (PGTABLE_RANGE >> SLICE_HIGH_SHIFT)
 105
 106#define GET_LOW_SLICE_INDEX(addr)       ((addr) >> SLICE_LOW_SHIFT)
 107#define GET_HIGH_SLICE_INDEX(addr)      ((addr) >> SLICE_HIGH_SHIFT)
 108
 109#ifndef __ASSEMBLY__
 110
 111struct slice_mask {
 112        u16 low_slices;
 113        u16 high_slices;
 114};
 115
 116struct mm_struct;
 117
 118extern unsigned long slice_get_unmapped_area(unsigned long addr,
 119                                             unsigned long len,
 120                                             unsigned long flags,
 121                                             unsigned int psize,
 122                                             int topdown,
 123                                             int use_cache);
 124
 125extern unsigned int get_slice_psize(struct mm_struct *mm,
 126                                    unsigned long addr);
 127
 128extern void slice_init_context(struct mm_struct *mm, unsigned int psize);
 129extern void slice_set_user_psize(struct mm_struct *mm, unsigned int psize);
 130extern void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
 131                                  unsigned long len, unsigned int psize);
 132
 133#define slice_mm_new_context(mm)        ((mm)->context.id == 0)
 134
 135#endif /* __ASSEMBLY__ */
 136#else
 137#define slice_init()
 138#ifdef CONFIG_PPC_STD_MMU_64
 139#define get_slice_psize(mm, addr)       ((mm)->context.user_psize)
 140#define slice_set_user_psize(mm, psize)         \
 141do {                                            \
 142        (mm)->context.user_psize = (psize);     \
 143        (mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \
 144} while (0)
 145#else /* CONFIG_PPC_STD_MMU_64 */
 146#ifdef CONFIG_PPC_64K_PAGES
 147#define get_slice_psize(mm, addr)       MMU_PAGE_64K
 148#else /* CONFIG_PPC_64K_PAGES */
 149#define get_slice_psize(mm, addr)       MMU_PAGE_4K
 150#endif /* !CONFIG_PPC_64K_PAGES */
 151#define slice_set_user_psize(mm, psize) do { BUG(); } while(0)
 152#endif /* !CONFIG_PPC_STD_MMU_64 */
 153
 154#define slice_set_range_psize(mm, start, len, psize)    \
 155        slice_set_user_psize((mm), (psize))
 156#define slice_mm_new_context(mm)        1
 157#endif /* CONFIG_PPC_MM_SLICES */
 158
 159#ifdef CONFIG_HUGETLB_PAGE
 160
 161#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
 162
 163#endif /* !CONFIG_HUGETLB_PAGE */
 164
 165#ifdef MODULE
 166#define __page_aligned __attribute__((__aligned__(PAGE_SIZE)))
 167#else
 168#define __page_aligned \
 169        __attribute__((__aligned__(PAGE_SIZE), \
 170                __section__(".data.page_aligned")))
 171#endif
 172
 173#define VM_DATA_DEFAULT_FLAGS \
 174        (test_thread_flag(TIF_32BIT) ? \
 175         VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
 176
 177/*
 178 * This is the default if a program doesn't have a PT_GNU_STACK
 179 * program header entry. The PPC64 ELF ABI has a non executable stack
 180 * stack by default, so in the absense of a PT_GNU_STACK program header
 181 * we turn execute permission off.
 182 */
 183#define VM_STACK_DEFAULT_FLAGS32        (VM_READ | VM_WRITE | VM_EXEC | \
 184                                         VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 185
 186#define VM_STACK_DEFAULT_FLAGS64        (VM_READ | VM_WRITE | \
 187                                         VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 188
 189#define VM_STACK_DEFAULT_FLAGS \
 190        (test_thread_flag(TIF_32BIT) ? \
 191         VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
 192
 193#include <asm-generic/getorder.h>
 194
 195#endif /* _ASM_POWERPC_PAGE_64_H */
 196