LXR linux/arch/powerpc/include/asm/ppc-pci.h

   1/*
   2 * c 2001 PPC 64 Team, IBM Corp
   3 *
   4 *      This program is free software; you can redistribute it and/or
   5 *      modify it under the terms of the GNU General Public License
   6 *      as published by the Free Software Foundation; either version
   7 *      2 of the License, or (at your option) any later version.
   8 */
   9#ifndef _ASM_POWERPC_PPC_PCI_H
  10#define _ASM_POWERPC_PPC_PCI_H
  11#ifdef __KERNEL__
  12
  13#ifdef CONFIG_PCI
  14
  15#include <linux/pci.h>
  16#include <asm/pci-bridge.h>
  17
  18extern unsigned long isa_io_base;
  19
  20extern void pci_setup_phb_io(struct pci_controller *hose, int primary);
  21extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
  22
  23
  24extern struct list_head hose_list;
  25
  26extern void find_and_init_phbs(void);
  27
  28extern struct pci_dev *isa_bridge_pcidev;       /* may be NULL if no ISA bus */
  29
  30/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
  31#define BUID_HI(buid) ((buid) >> 32)
  32#define BUID_LO(buid) ((buid) & 0xffffffff)
  33
  34/* PCI device_node operations */
  35struct device_node;
  36typedef void *(*traverse_func)(struct device_node *me, void *data);
  37void *traverse_pci_devices(struct device_node *start, traverse_func pre,
  38                void *data);
  39
  40extern void pci_devs_phb_init(void);
  41extern void pci_devs_phb_init_dynamic(struct pci_controller *phb);
  42
  43/* From rtas_pci.h */
  44extern void init_pci_config_tokens (void);
  45extern unsigned long get_phb_buid (struct device_node *);
  46extern int rtas_setup_phb(struct pci_controller *phb);
  47
  48extern unsigned long pci_probe_only;
  49
  50/* ---- EEH internal-use-only related routines ---- */
  51#ifdef CONFIG_EEH
  52
  53void pci_addr_cache_insert_device(struct pci_dev *dev);
  54void pci_addr_cache_remove_device(struct pci_dev *dev);
  55void pci_addr_cache_build(void);
  56struct pci_dev *pci_get_device_by_addr(unsigned long addr);
  57
  58/**
  59 * eeh_slot_error_detail -- record and EEH error condition to the log
  60 * @pdn:      pci device node
  61 * @severity: EEH_LOG_TEMP_FAILURE or EEH_LOG_PERM_FAILURE
  62 *
  63 * Obtains the EEH error details from the RTAS subsystem,
  64 * and then logs these details with the RTAS error log system.
  65 */
  66#define EEH_LOG_TEMP_FAILURE 1
  67#define EEH_LOG_PERM_FAILURE 2
  68void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
  69
  70/**
  71 * rtas_pci_enable - enable IO transfers for this slot
  72 * @pdn:       pci device node
  73 * @function:  either EEH_THAW_MMIO or EEH_THAW_DMA 
  74 *
  75 * Enable I/O transfers to this slot 
  76 */
  77#define EEH_THAW_MMIO 2
  78#define EEH_THAW_DMA  3
  79int rtas_pci_enable(struct pci_dn *pdn, int function);
  80
  81/**
  82 * rtas_set_slot_reset -- unfreeze a frozen slot
  83 * @pdn:       pci device node
  84 *
  85 * Clear the EEH-frozen condition on a slot.  This routine
  86 * does this by asserting the PCI #RST line for 1/8th of
  87 * a second; this routine will sleep while the adapter is
  88 * being reset.
  89 *
  90 * Returns a non-zero value if the reset failed.
  91 */
  92int rtas_set_slot_reset (struct pci_dn *);
  93int eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs);
  94
  95/** 
  96 * eeh_restore_bars - Restore device configuration info.
  97 * @pdn:       pci device node
  98 *
  99 * A reset of a PCI device will clear out its config space.
 100 * This routines will restore the config space for this
 101 * device, and is children, to values previously obtained
 102 * from the firmware.
 103 */
 104void eeh_restore_bars(struct pci_dn *);
 105
 106/**
 107 * rtas_configure_bridge -- firmware initialization of pci bridge
 108 * @pdn:       pci device node
 109 *
 110 * Ask the firmware to configure all PCI bridges devices
 111 * located behind the indicated node. Required after a
 112 * pci device reset. Does essentially the same hing as
 113 * eeh_restore_bars, but for brdges, and lets firmware 
 114 * do the work.
 115 */
 116void rtas_configure_bridge(struct pci_dn *);
 117
 118int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
 119int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
 120
 121/**
 122 * eeh_mark_slot -- set mode flags for pertition endpoint
 123 * @pdn:       pci device node
 124 *
 125 * mark and clear slots: find "partition endpoint" PE and set or 
 126 * clear the flags for each subnode of the PE.
 127 */
 128void eeh_mark_slot (struct device_node *dn, int mode_flag);
 129void eeh_clear_slot (struct device_node *dn, int mode_flag);
 130
 131/**
 132 * find_device_pe -- Find the associated "Partiationable Endpoint" PE
 133 * @pdn:       pci device node
 134 */
 135struct device_node * find_device_pe(struct device_node *dn);
 136
 137void eeh_sysfs_add_device(struct pci_dev *pdev);
 138void eeh_sysfs_remove_device(struct pci_dev *pdev);
 139
 140#endif /* CONFIG_EEH */
 141
 142#else /* CONFIG_PCI */
 143static inline void find_and_init_phbs(void) { }
 144static inline void init_pci_config_tokens(void) { }
 145#endif /* !CONFIG_PCI */
 146
 147#endif /* __KERNEL__ */
 148#endif /* _ASM_POWERPC_PPC_PCI_H */
 149