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20#include <linux/types.h>
21#include <linux/string.h>
22#include <linux/kvm.h>
23#include <linux/kvm_host.h>
24#include <linux/highmem.h>
25
26#include <asm/tlbflush.h>
27#include <asm/mmu-44x.h>
28#include <asm/kvm_ppc.h>
29#include <asm/kvm_44x.h>
30#include "timing.h"
31
32#include "44x_tlb.h"
33#include "trace.h"
34
35#ifndef PPC44x_TLBE_SIZE
36#define PPC44x_TLBE_SIZE PPC44x_TLB_4K
37#endif
38
39#define PAGE_SIZE_4K (1<<12)
40#define PAGE_MASK_4K (~(PAGE_SIZE_4K - 1))
41
42#define PPC44x_TLB_UATTR_MASK \
43 (PPC44x_TLB_U0|PPC44x_TLB_U1|PPC44x_TLB_U2|PPC44x_TLB_U3)
44#define PPC44x_TLB_USER_PERM_MASK (PPC44x_TLB_UX|PPC44x_TLB_UR|PPC44x_TLB_UW)
45#define PPC44x_TLB_SUPER_PERM_MASK (PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW)
46
47#ifdef DEBUG
48void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
49{
50 struct kvmppc_44x_tlbe *tlbe;
51 int i;
52
53 printk("vcpu %d TLB dump:\n", vcpu->vcpu_id);
54 printk("| %2s | %3s | %8s | %8s | %8s |\n",
55 "nr", "tid", "word0", "word1", "word2");
56
57 for (i = 0; i < ARRAY_SIZE(vcpu_44x->guest_tlb); i++) {
58 tlbe = &vcpu_44x->guest_tlb[i];
59 if (tlbe->word0 & PPC44x_TLB_VALID)
60 printk(" G%2d | %02X | %08X | %08X | %08X |\n",
61 i, tlbe->tid, tlbe->word0, tlbe->word1,
62 tlbe->word2);
63 }
64}
65#endif
66
67static inline void kvmppc_44x_tlbie(unsigned int index)
68{
69
70
71 asm volatile(
72 "tlbwe %[index], %[index], 0\n"
73 :
74 : [index] "r"(index)
75 );
76}
77
78static inline void kvmppc_44x_tlbre(unsigned int index,
79 struct kvmppc_44x_tlbe *tlbe)
80{
81 asm volatile(
82 "tlbre %[word0], %[index], 0\n"
83 "mfspr %[tid], %[sprn_mmucr]\n"
84 "andi. %[tid], %[tid], 0xff\n"
85 "tlbre %[word1], %[index], 1\n"
86 "tlbre %[word2], %[index], 2\n"
87 : [word0] "=r"(tlbe->word0),
88 [word1] "=r"(tlbe->word1),
89 [word2] "=r"(tlbe->word2),
90 [tid] "=r"(tlbe->tid)
91 : [index] "r"(index),
92 [sprn_mmucr] "i"(SPRN_MMUCR)
93 : "cc"
94 );
95}
96
97static inline void kvmppc_44x_tlbwe(unsigned int index,
98 struct kvmppc_44x_tlbe *stlbe)
99{
100 unsigned long tmp;
101
102 asm volatile(
103 "mfspr %[tmp], %[sprn_mmucr]\n"
104 "rlwimi %[tmp], %[tid], 0, 0xff\n"
105 "mtspr %[sprn_mmucr], %[tmp]\n"
106 "tlbwe %[word0], %[index], 0\n"
107 "tlbwe %[word1], %[index], 1\n"
108 "tlbwe %[word2], %[index], 2\n"
109 : [tmp] "=&r"(tmp)
110 : [word0] "r"(stlbe->word0),
111 [word1] "r"(stlbe->word1),
112 [word2] "r"(stlbe->word2),
113 [tid] "r"(stlbe->tid),
114 [index] "r"(index),
115 [sprn_mmucr] "i"(SPRN_MMUCR)
116 );
117}
118
119static u32 kvmppc_44x_tlb_shadow_attrib(u32 attrib, int usermode)
120{
121
122 attrib &= PPC44x_TLB_PERM_MASK|PPC44x_TLB_UATTR_MASK;
123
124 if (!usermode) {
125
126
127 attrib &= ~PPC44x_TLB_USER_PERM_MASK;
128 attrib |= (attrib & PPC44x_TLB_SUPER_PERM_MASK) << 3;
129 }
130
131
132 attrib |= PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW;
133
134
135 attrib |= PPC44x_TLB_M;
136
137 return attrib;
138}
139
140
141void kvmppc_44x_tlb_load(struct kvm_vcpu *vcpu)
142{
143 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
144 int i;
145
146 for (i = 0; i <= tlb_44x_hwater; i++) {
147 struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i];
148
149 if (get_tlb_v(stlbe) && get_tlb_ts(stlbe))
150 kvmppc_44x_tlbwe(i, stlbe);
151 }
152}
153
154static void kvmppc_44x_tlbe_set_modified(struct kvmppc_vcpu_44x *vcpu_44x,
155 unsigned int i)
156{
157 vcpu_44x->shadow_tlb_mod[i] = 1;
158}
159
160
161void kvmppc_44x_tlb_put(struct kvm_vcpu *vcpu)
162{
163 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
164 int i;
165
166 for (i = 0; i <= tlb_44x_hwater; i++) {
167 struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i];
168
169 if (vcpu_44x->shadow_tlb_mod[i])
170 kvmppc_44x_tlbre(i, stlbe);
171
172 if (get_tlb_v(stlbe) && get_tlb_ts(stlbe))
173 kvmppc_44x_tlbie(i);
174 }
175}
176
177
178
179int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid,
180 unsigned int as)
181{
182 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
183 int i;
184
185
186 for (i = 0; i < ARRAY_SIZE(vcpu_44x->guest_tlb); i++) {
187 struct kvmppc_44x_tlbe *tlbe = &vcpu_44x->guest_tlb[i];
188 unsigned int tid;
189
190 if (eaddr < get_tlb_eaddr(tlbe))
191 continue;
192
193 if (eaddr > get_tlb_end(tlbe))
194 continue;
195
196 tid = get_tlb_tid(tlbe);
197 if (tid && (tid != pid))
198 continue;
199
200 if (!get_tlb_v(tlbe))
201 continue;
202
203 if (get_tlb_ts(tlbe) != as)
204 continue;
205
206 return i;
207 }
208
209 return -1;
210}
211
212gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int gtlb_index,
213 gva_t eaddr)
214{
215 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
216 struct kvmppc_44x_tlbe *gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
217 unsigned int pgmask = get_tlb_bytes(gtlbe) - 1;
218
219 return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
220}
221
222int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
223{
224 unsigned int as = !!(vcpu->arch.msr & MSR_IS);
225
226 return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
227}
228
229int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
230{
231 unsigned int as = !!(vcpu->arch.msr & MSR_DS);
232
233 return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
234}
235
236void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
237{
238}
239
240void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
241{
242}
243
244static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x,
245 unsigned int stlb_index)
246{
247 struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[stlb_index];
248
249 if (!ref->page)
250 return;
251
252
253
254
255 kvmppc_44x_tlbie(stlb_index);
256
257
258 if (ref->writeable)
259 kvm_release_page_dirty(ref->page);
260 else
261 kvm_release_page_clean(ref->page);
262
263 ref->page = NULL;
264
265
266
267 trace_kvm_stlb_inval(stlb_index);
268}
269
270void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
271{
272 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
273 int i;
274
275 for (i = 0; i <= tlb_44x_hwater; i++)
276 kvmppc_44x_shadow_release(vcpu_44x, i);
277}
278
279
280
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283
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285
286
287
288
289
290
291void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr,
292 unsigned int gtlb_index)
293{
294 struct kvmppc_44x_tlbe stlbe;
295 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
296 struct kvmppc_44x_tlbe *gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
297 struct kvmppc_44x_shadow_ref *ref;
298 struct page *new_page;
299 hpa_t hpaddr;
300 gfn_t gfn;
301 u32 asid = gtlbe->tid;
302 u32 flags = gtlbe->word2;
303 u32 max_bytes = get_tlb_bytes(gtlbe);
304 unsigned int victim;
305
306
307
308 local_irq_disable();
309 victim = ++tlb_44x_index;
310 if (victim > tlb_44x_hwater)
311 victim = 0;
312 tlb_44x_index = victim;
313 local_irq_enable();
314
315
316 gfn = gpaddr >> PAGE_SHIFT;
317 new_page = gfn_to_page(vcpu->kvm, gfn);
318 if (is_error_page(new_page)) {
319 printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
320 kvm_release_page_clean(new_page);
321 return;
322 }
323 hpaddr = page_to_phys(new_page);
324
325
326 kvmppc_44x_shadow_release(vcpu_44x, victim);
327
328
329
330
331
332
333
334
335 stlbe.word0 = PPC44x_TLB_VALID | PPC44x_TLB_TS;
336
337 if (max_bytes >= PAGE_SIZE) {
338
339
340 stlbe.word0 |= (gvaddr & PAGE_MASK) | PPC44x_TLBE_SIZE;
341 } else {
342
343
344
345
346 stlbe.word0 |= (gvaddr & PAGE_MASK_4K) | PPC44x_TLB_4K;
347
348
349
350
351 hpaddr |= gpaddr & (PAGE_MASK ^ PAGE_MASK_4K);
352 }
353
354 stlbe.word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
355 stlbe.word2 = kvmppc_44x_tlb_shadow_attrib(flags,
356 vcpu->arch.msr & MSR_PR);
357 stlbe.tid = !(asid & 0xff);
358
359
360 ref = &vcpu_44x->shadow_refs[victim];
361 ref->page = new_page;
362 ref->gtlb_index = gtlb_index;
363 ref->writeable = !!(stlbe.word2 & PPC44x_TLB_UW);
364 ref->tid = stlbe.tid;
365
366
367 kvmppc_44x_tlbe_set_modified(vcpu_44x, victim);
368 kvmppc_44x_tlbwe(victim, &stlbe);
369 trace_kvm_stlb_write(victim, stlbe.tid, stlbe.word0, stlbe.word1,
370 stlbe.word2);
371}
372
373
374
375static void kvmppc_44x_invalidate(struct kvm_vcpu *vcpu,
376 unsigned int gtlb_index)
377{
378 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
379 int i;
380
381 for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++) {
382 struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[i];
383 if (ref->gtlb_index == gtlb_index)
384 kvmppc_44x_shadow_release(vcpu_44x, i);
385 }
386}
387
388void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
389{
390 vcpu->arch.shadow_pid = !usermode;
391}
392
393void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid)
394{
395 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
396 int i;
397
398 if (unlikely(vcpu->arch.pid == new_pid))
399 return;
400
401 vcpu->arch.pid = new_pid;
402
403
404
405
406
407 for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++) {
408 struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[i];
409
410 if (ref->tid == 0)
411 kvmppc_44x_shadow_release(vcpu_44x, i);
412 }
413}
414
415static int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
416 const struct kvmppc_44x_tlbe *tlbe)
417{
418 gpa_t gpa;
419
420 if (!get_tlb_v(tlbe))
421 return 0;
422
423
424
425 if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS))
426 return 0;
427
428 gpa = get_tlb_raddr(tlbe);
429 if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT))
430
431 return 0;
432
433 return 1;
434}
435
436int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
437{
438 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
439 struct kvmppc_44x_tlbe *tlbe;
440 unsigned int gtlb_index;
441
442 gtlb_index = vcpu->arch.gpr[ra];
443 if (gtlb_index > KVM44x_GUEST_TLB_SIZE) {
444 printk("%s: index %d\n", __func__, gtlb_index);
445 kvmppc_dump_vcpu(vcpu);
446 return EMULATE_FAIL;
447 }
448
449 tlbe = &vcpu_44x->guest_tlb[gtlb_index];
450
451
452 if (tlbe->word0 & PPC44x_TLB_VALID)
453 kvmppc_44x_invalidate(vcpu, gtlb_index);
454
455 switch (ws) {
456 case PPC44x_TLB_PAGEID:
457 tlbe->tid = get_mmucr_stid(vcpu);
458 tlbe->word0 = vcpu->arch.gpr[rs];
459 break;
460
461 case PPC44x_TLB_XLAT:
462 tlbe->word1 = vcpu->arch.gpr[rs];
463 break;
464
465 case PPC44x_TLB_ATTRIB:
466 tlbe->word2 = vcpu->arch.gpr[rs];
467 break;
468
469 default:
470 return EMULATE_FAIL;
471 }
472
473 if (tlbe_is_host_safe(vcpu, tlbe)) {
474 gva_t eaddr;
475 gpa_t gpaddr;
476 u32 bytes;
477
478 eaddr = get_tlb_eaddr(tlbe);
479 gpaddr = get_tlb_raddr(tlbe);
480
481
482 bytes = get_tlb_bytes(tlbe);
483 eaddr &= ~(bytes - 1);
484 gpaddr &= ~(bytes - 1);
485
486 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
487 }
488
489 trace_kvm_gtlb_write(gtlb_index, tlbe->tid, tlbe->word0, tlbe->word1,
490 tlbe->word2);
491
492 kvmppc_set_exit_type(vcpu, EMULATED_TLBWE_EXITS);
493 return EMULATE_DONE;
494}
495
496int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb, u8 rc)
497{
498 u32 ea;
499 int gtlb_index;
500 unsigned int as = get_mmucr_sts(vcpu);
501 unsigned int pid = get_mmucr_stid(vcpu);
502
503 ea = vcpu->arch.gpr[rb];
504 if (ra)
505 ea += vcpu->arch.gpr[ra];
506
507 gtlb_index = kvmppc_44x_tlb_index(vcpu, ea, pid, as);
508 if (rc) {
509 if (gtlb_index < 0)
510 vcpu->arch.cr &= ~0x20000000;
511 else
512 vcpu->arch.cr |= 0x20000000;
513 }
514 vcpu->arch.gpr[rt] = gtlb_index;
515
516 kvmppc_set_exit_type(vcpu, EMULATED_TLBSX_EXITS);
517 return EMULATE_DONE;
518}
519