LXR linux/arch/powerpc/platforms/fsl

   1/*
   2 * ULI M1575 setup code - specific to Freescale boards
   3 *
   4 * Copyright 2007 Freescale Semiconductor Inc.
   5 *
   6 * This program is free software; you can redistribute  it and/or modify it
   7 * under  the terms of  the GNU General  Public License as published by the
   8 * Free Software Foundation;  either version 2 of the  License, or (at your
   9 * option) any later version.
  10 */
  11
  12#include <linux/stddef.h>
  13#include <linux/kernel.h>
  14#include <linux/pci.h>
  15#include <linux/interrupt.h>
  16#include <linux/mc146818rtc.h>
  17
  18#include <asm/system.h>
  19#include <asm/pci-bridge.h>
  20
  21#define ULI_PIRQA       0x08
  22#define ULI_PIRQB       0x09
  23#define ULI_PIRQC       0x0a
  24#define ULI_PIRQD       0x0b
  25#define ULI_PIRQE       0x0c
  26#define ULI_PIRQF       0x0d
  27#define ULI_PIRQG       0x0e
  28
  29#define ULI_8259_NONE   0x00
  30#define ULI_8259_IRQ1   0x08
  31#define ULI_8259_IRQ3   0x02
  32#define ULI_8259_IRQ4   0x04
  33#define ULI_8259_IRQ5   0x05
  34#define ULI_8259_IRQ6   0x07
  35#define ULI_8259_IRQ7   0x06
  36#define ULI_8259_IRQ9   0x01
  37#define ULI_8259_IRQ10  0x03
  38#define ULI_8259_IRQ11  0x09
  39#define ULI_8259_IRQ12  0x0b
  40#define ULI_8259_IRQ14  0x0d
  41#define ULI_8259_IRQ15  0x0f
  42
  43u8 uli_pirq_to_irq[8] = {
  44        ULI_8259_IRQ9,          /* PIRQA */
  45        ULI_8259_IRQ10,         /* PIRQB */
  46        ULI_8259_IRQ11,         /* PIRQC */
  47        ULI_8259_IRQ12,         /* PIRQD */
  48        ULI_8259_IRQ5,          /* PIRQE */
  49        ULI_8259_IRQ6,          /* PIRQF */
  50        ULI_8259_IRQ7,          /* PIRQG */
  51        ULI_8259_NONE,          /* PIRQH */
  52};
  53
  54static inline bool is_quirk_valid(void)
  55{
  56        return (machine_is(mpc86xx_hpcn) ||
  57                machine_is(mpc8544_ds) ||
  58                machine_is(p2020_ds) ||
  59                machine_is(mpc8572_ds));
  60}
  61
  62/* Bridge */
  63static void __devinit early_uli5249(struct pci_dev *dev)
  64{
  65        unsigned char temp;
  66
  67        if (!is_quirk_valid())
  68                return;
  69
  70        pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_IO |
  71                 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
  72
  73        /* read/write lock */
  74        pci_read_config_byte(dev, 0x7c, &temp);
  75        pci_write_config_byte(dev, 0x7c, 0x80);
  76
  77        /* set as P2P bridge */
  78        pci_write_config_byte(dev, PCI_CLASS_PROG, 0x01);
  79        dev->class |= 0x1;
  80
  81        /* restore lock */
  82        pci_write_config_byte(dev, 0x7c, temp);
  83}
  84
  85
  86static void __devinit quirk_uli1575(struct pci_dev *dev)
  87{
  88        int i;
  89
  90        if (!is_quirk_valid())
  91                return;
  92
  93        /*
  94         * ULI1575 interrupts route setup
  95         */
  96
  97        /* ULI1575 IRQ mapping conf register maps PIRQx to IRQn */
  98        for (i = 0; i < 4; i++) {
  99                u8 val = uli_pirq_to_irq[i*2] | (uli_pirq_to_irq[i*2+1] << 4);
 100                pci_write_config_byte(dev, 0x48 + i, val);
 101        }
 102
 103        /* USB 1.1 OHCI controller 1: dev 28, func 0 - IRQ12 */
 104        pci_write_config_byte(dev, 0x86, ULI_PIRQD);
 105
 106        /* USB 1.1 OHCI controller 2: dev 28, func 1 - IRQ9 */
 107        pci_write_config_byte(dev, 0x87, ULI_PIRQA);
 108
 109        /* USB 1.1 OHCI controller 3: dev 28, func 2 - IRQ10 */
 110        pci_write_config_byte(dev, 0x88, ULI_PIRQB);
 111
 112        /* Lan controller: dev 27, func 0 - IRQ6 */
 113        pci_write_config_byte(dev, 0x89, ULI_PIRQF);
 114
 115        /* AC97 Audio controller: dev 29, func 0 - IRQ6 */
 116        pci_write_config_byte(dev, 0x8a, ULI_PIRQF);
 117
 118        /* Modem controller: dev 29, func 1 - IRQ6 */
 119        pci_write_config_byte(dev, 0x8b, ULI_PIRQF);
 120
 121        /* HD Audio controller: dev 29, func 2 - IRQ6 */
 122        pci_write_config_byte(dev, 0x8c, ULI_PIRQF);
 123
 124        /* SATA controller: dev 31, func 1 - IRQ5 */
 125        pci_write_config_byte(dev, 0x8d, ULI_PIRQE);
 126
 127        /* SMB interrupt: dev 30, func 1 - IRQ7 */
 128        pci_write_config_byte(dev, 0x8e, ULI_PIRQG);
 129
 130        /* PMU ACPI SCI interrupt: dev 30, func 2 - IRQ7 */
 131        pci_write_config_byte(dev, 0x8f, ULI_PIRQG);
 132
 133        /* USB 2.0 controller: dev 28, func 3 */
 134        pci_write_config_byte(dev, 0x74, ULI_8259_IRQ11);
 135
 136        /* Primary PATA IDE IRQ: 14
 137         * Secondary PATA IDE IRQ: 15
 138         */
 139        pci_write_config_byte(dev, 0x44, 0x30 | ULI_8259_IRQ14);
 140        pci_write_config_byte(dev, 0x75, ULI_8259_IRQ15);
 141}
 142
 143static void __devinit quirk_final_uli1575(struct pci_dev *dev)
 144{
 145        /* Set i8259 interrupt trigger
 146         * IRQ 3:  Level
 147         * IRQ 4:  Level
 148         * IRQ 5:  Level
 149         * IRQ 6:  Level
 150         * IRQ 7:  Level
 151         * IRQ 9:  Level
 152         * IRQ 10: Level
 153         * IRQ 11: Level
 154         * IRQ 12: Level
 155         * IRQ 14: Edge
 156         * IRQ 15: Edge
 157         */
 158        if (!is_quirk_valid())
 159                return;
 160
 161        outb(0xfa, 0x4d0);
 162        outb(0x1e, 0x4d1);
 163
 164        /* setup RTC */
 165        CMOS_WRITE(RTC_SET, RTC_CONTROL);
 166        CMOS_WRITE(RTC_24H, RTC_CONTROL);
 167
 168        /* ensure month, date, and week alarm fields are ignored */
 169        CMOS_WRITE(0, RTC_VALID);
 170
 171        outb_p(0x7c, 0x72);
 172        outb_p(RTC_ALARM_DONT_CARE, 0x73);
 173
 174        outb_p(0x7d, 0x72);
 175        outb_p(RTC_ALARM_DONT_CARE, 0x73);
 176}
 177
 178/* SATA */
 179static void __devinit quirk_uli5288(struct pci_dev *dev)
 180{
 181        unsigned char c;
 182        unsigned int d;
 183
 184        if (!is_quirk_valid())
 185                return;
 186
 187        /* read/write lock */
 188        pci_read_config_byte(dev, 0x83, &c);
 189        pci_write_config_byte(dev, 0x83, c|0x80);
 190
 191        pci_read_config_dword(dev, PCI_CLASS_REVISION, &d);
 192        d = (d & 0xff) | (PCI_CLASS_STORAGE_SATA_AHCI << 8);
 193        pci_write_config_dword(dev, PCI_CLASS_REVISION, d);
 194
 195        /* restore lock */
 196        pci_write_config_byte(dev, 0x83, c);
 197
 198        /* disable emulated PATA mode enabled */
 199        pci_read_config_byte(dev, 0x84, &c);
 200        pci_write_config_byte(dev, 0x84, c & ~0x01);
 201}
 202
 203/* PATA */
 204static void __devinit quirk_uli5229(struct pci_dev *dev)
 205{
 206        unsigned short temp;
 207
 208        if (!is_quirk_valid())
 209                return;
 210
 211        pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE |
 212                PCI_COMMAND_MASTER | PCI_COMMAND_IO);
 213
 214        /* Enable Native IRQ 14/15 */
 215        pci_read_config_word(dev, 0x4a, &temp);
 216        pci_write_config_word(dev, 0x4a, temp | 0x1000);
 217}
 218
 219/* We have to do a dummy read on the P2P for the RTC to work, WTF */
 220static void __devinit quirk_final_uli5249(struct pci_dev *dev)
 221{
 222        int i;
 223        u8 *dummy;
 224        struct pci_bus *bus = dev->bus;
 225        resource_size_t end = 0;
 226
 227        for (i = PCI_BRIDGE_RESOURCES; i < PCI_BRIDGE_RESOURCES+3; i++) {
 228                unsigned long flags = pci_resource_flags(dev, i);
 229                if ((flags & (IORESOURCE_MEM|IORESOURCE_PREFETCH)) == IORESOURCE_MEM)
 230                        end = pci_resource_end(dev, i);
 231        }
 232
 233        for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
 234                if ((bus->resource[i]) &&
 235                        (bus->resource[i]->flags & IORESOURCE_MEM)) {
 236                        if (bus->resource[i]->end == end)
 237                                dummy = ioremap(bus->resource[i]->start, 0x4);
 238                        else
 239                                dummy = ioremap(bus->resource[i]->end - 3, 0x4);
 240                        if (dummy) {
 241                                in_8(dummy);
 242                                iounmap(dummy);
 243                        }
 244                        break;
 245                }
 246        }
 247}
 248
 249DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
 250DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575);
 251DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
 252DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
 253DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5249, quirk_final_uli5249);
 254DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x1575, quirk_final_uli1575);
 255DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
 256
 257static void __devinit hpcd_quirk_uli1575(struct pci_dev *dev)
 258{
 259        u32 temp32;
 260
 261        if (!machine_is(mpc86xx_hpcd))
 262                return;
 263
 264        /* Disable INTx */
 265        pci_read_config_dword(dev, 0x48, &temp32);
 266        pci_write_config_dword(dev, 0x48, (temp32 | 1<<26));
 267
 268        /* Enable sideband interrupt */
 269        pci_read_config_dword(dev, 0x90, &temp32);
 270        pci_write_config_dword(dev, 0x90, (temp32 | 1<<22));
 271}
 272
 273static void __devinit hpcd_quirk_uli5288(struct pci_dev *dev)
 274{
 275        unsigned char c;
 276
 277        if (!machine_is(mpc86xx_hpcd))
 278                return;
 279
 280        pci_read_config_byte(dev, 0x83, &c);
 281        c |= 0x80;
 282        pci_write_config_byte(dev, 0x83, c);
 283
 284        pci_write_config_byte(dev, PCI_CLASS_PROG, 0x01);
 285        pci_write_config_byte(dev, PCI_CLASS_DEVICE, 0x06);
 286
 287        pci_read_config_byte(dev, 0x83, &c);
 288        c &= 0x7f;
 289        pci_write_config_byte(dev, 0x83, c);
 290}
 291
 292/*
 293 * Since 8259PIC was disabled on the board, the IDE device can not
 294 * use the legacy IRQ, we need to let the IDE device work under
 295 * native mode and use the interrupt line like other PCI devices.
 296 * IRQ14 is a sideband interrupt from IDE device to CPU and we use this
 297 * as the interrupt for IDE device.
 298 */
 299static void __devinit hpcd_quirk_uli5229(struct pci_dev *dev)
 300{
 301        unsigned char c;
 302
 303        if (!machine_is(mpc86xx_hpcd))
 304                return;
 305
 306        pci_read_config_byte(dev, 0x4b, &c);
 307        c |= 0x10;
 308        pci_write_config_byte(dev, 0x4b, c);
 309}
 310
 311/*
 312 * SATA interrupt pin bug fix
 313 * There's a chip bug for 5288, The interrupt pin should be 2,
 314 * not the read only value 1, So it use INTB#, not INTA# which
 315 * actually used by the IDE device 5229.
 316 * As of this bug, during the PCI initialization, 5288 read the
 317 * irq of IDE device from the device tree, this function fix this
 318 * bug by re-assigning a correct irq to 5288.
 319 *
 320 */
 321static void __devinit hpcd_final_uli5288(struct pci_dev *dev)
 322{
 323        struct pci_controller *hose = pci_bus_to_host(dev->bus);
 324        struct device_node *hosenode = hose ? hose->dn : NULL;
 325        struct of_irq oirq;
 326        int virq, pin = 2;
 327        u32 laddr[3];
 328
 329        if (!machine_is(mpc86xx_hpcd))
 330                return;
 331
 332        if (!hosenode)
 333                return;
 334
 335        laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(31, 0) << 8);
 336        laddr[1] = laddr[2] = 0;
 337        of_irq_map_raw(hosenode, &pin, 1, laddr, &oirq);
 338        virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
 339                                     oirq.size);
 340        dev->irq = virq;
 341}
 342
 343DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, hpcd_quirk_uli1575);
 344DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, hpcd_quirk_uli5288);
 345DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, hpcd_quirk_uli5229);
 346DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5288, hpcd_final_uli5288);
 347
 348int uli_exclude_device(struct pci_controller *hose,
 349                        u_char bus, u_char devfn)
 350{
 351        if (bus == (hose->first_busno + 2)) {
 352                /* exclude Modem controller */
 353                if ((PCI_SLOT(devfn) == 29) && (PCI_FUNC(devfn) == 1))
 354                        return PCIBIOS_DEVICE_NOT_FOUND;
 355
 356                /* exclude HD Audio controller */
 357                if ((PCI_SLOT(devfn) == 29) && (PCI_FUNC(devfn) == 2))
 358                        return PCIBIOS_DEVICE_NOT_FOUND;
 359        }
 360
 361        return PCIBIOS_SUCCESSFUL;
 362}
 363