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23
24#undef DEBUG
25
26#include <linux/jiffies.h>
27#include <linux/kernel.h>
28#include <linux/list.h>
29#include <linux/string.h>
30#include <linux/init.h>
31#include <linux/module.h>
32#include <linux/pci.h>
33#include <linux/of.h>
34
35#include <asm/types.h>
36#include <asm/io.h>
37#include <asm/irq.h>
38#include <asm/prom.h>
39#include <asm/machdep.h>
40#include <asm/pci-bridge.h>
41#include <asm/iommu.h>
42#include <asm/abs_addr.h>
43#include <asm/firmware.h>
44
45#include <asm/iseries/hv_types.h>
46#include <asm/iseries/hv_call_xm.h>
47#include <asm/iseries/mf.h>
48#include <asm/iseries/iommu.h>
49
50#include <asm/ppc-pci.h>
51
52#include "irq.h"
53#include "pci.h"
54#include "call_pci.h"
55
56#define PCI_RETRY_MAX 3
57static int limit_pci_retries = 1;
58
59
60
61
62
63#define IOMM_TABLE_MAX_ENTRIES 1024
64#define IOMM_TABLE_ENTRY_SIZE 0x0000000000400000UL
65#define BASE_IO_MEMORY 0xE000000000000000UL
66#define END_IO_MEMORY 0xEFFFFFFFFFFFFFFFUL
67
68static unsigned long max_io_memory = BASE_IO_MEMORY;
69static long current_iomm_table_entry;
70
71
72
73
74static struct device_node *iomm_table[IOMM_TABLE_MAX_ENTRIES];
75static u64 ds_addr_table[IOMM_TABLE_MAX_ENTRIES];
76
77static DEFINE_SPINLOCK(iomm_table_lock);
78
79
80
81
82static inline u64 iseries_ds_addr(struct device_node *node)
83{
84 struct pci_dn *pdn = PCI_DN(node);
85 const u32 *sbp = of_get_property(node, "linux,subbus", NULL);
86
87 return ((u64)pdn->busno << 48) + ((u64)(sbp ? *sbp : 0) << 40)
88 + ((u64)0x10 << 32);
89}
90
91
92
93
94#define BUS_VPDSIZE 1024
95
96
97
98
99#define VPD_END_OF_AREA 0x79
100#define VPD_ID_STRING 0x82
101#define VPD_VENDOR_AREA 0x84
102
103
104
105
106#define VPD_FRU_FRAME_ID 0x4649
107#define VPD_SLOT_MAP_FORMAT 0x4D46
108#define VPD_SLOT_MAP 0x534D
109
110
111
112
113struct mfg_vpd_area {
114 u16 tag;
115 u8 length;
116 u8 data1;
117 u8 data2;
118};
119#define MFG_ENTRY_SIZE 3
120
121struct slot_map {
122 u8 agent;
123 u8 secondary_agent;
124 u8 phb;
125 char card_location[3];
126 char parms[8];
127 char reserved[2];
128};
129#define SLOT_ENTRY_SIZE 16
130
131
132
133
134static void __init iseries_parse_slot_area(struct slot_map *map, int len,
135 HvAgentId agent, u8 *phb, char card[4])
136{
137
138
139
140 while (len > 0) {
141 if (map->agent == agent) {
142
143
144
145 if (*phb == 0xff)
146 *phb = map->phb;
147
148 if (map->phb == *phb) {
149 memcpy(card, &map->card_location, 3);
150 card[3] = 0;
151 break;
152 }
153 }
154
155 map = (struct slot_map *)((char *)map + SLOT_ENTRY_SIZE);
156 len -= SLOT_ENTRY_SIZE;
157 }
158}
159
160
161
162
163static void __init iseries_parse_mfg_area(struct mfg_vpd_area *area, int len,
164 HvAgentId agent, u8 *phb, u8 *frame, char card[4])
165{
166 u16 slot_map_fmt = 0;
167
168
169 while (len > 0) {
170 int mfg_tag_len = area->length;
171
172 if (area->tag == VPD_FRU_FRAME_ID)
173 *frame = area->data1;
174
175 else if (area->tag == VPD_SLOT_MAP_FORMAT)
176 slot_map_fmt = (area->data1 * 256)
177 + area->data2;
178
179 else if (area->tag == VPD_SLOT_MAP) {
180 struct slot_map *slot_map;
181
182 if (slot_map_fmt == 0x1004)
183 slot_map = (struct slot_map *)((char *)area
184 + MFG_ENTRY_SIZE + 1);
185 else
186 slot_map = (struct slot_map *)((char *)area
187 + MFG_ENTRY_SIZE);
188 iseries_parse_slot_area(slot_map, mfg_tag_len,
189 agent, phb, card);
190 }
191
192
193
194
195 area = (struct mfg_vpd_area *)((char *)area + mfg_tag_len
196 + MFG_ENTRY_SIZE);
197 len -= (mfg_tag_len + MFG_ENTRY_SIZE);
198 }
199}
200
201
202
203
204
205static u8 __init iseries_parse_phbid(u8 *area, int len)
206{
207 while (len > 0) {
208 if ((*area == 'B') && (*(area + 1) == 'U')
209 && (*(area + 2) == 'S')) {
210 area += 3;
211 while (*area == ' ')
212 area++;
213 return *area & 0x0F;
214 }
215 area++;
216 len--;
217 }
218 return 0xff;
219}
220
221
222
223
224static void __init iseries_parse_vpd(u8 *data, int data_len,
225 HvAgentId agent, u8 *frame, char card[4])
226{
227 u8 phb = 0xff;
228
229 while (data_len > 0) {
230 int len;
231 u8 tag = *data;
232
233 if (tag == VPD_END_OF_AREA)
234 break;
235 len = *(data + 1) + (*(data + 2) * 256);
236 data += 3;
237 data_len -= 3;
238 if (tag == VPD_ID_STRING)
239 phb = iseries_parse_phbid(data, len);
240 else if (tag == VPD_VENDOR_AREA)
241 iseries_parse_mfg_area((struct mfg_vpd_area *)data, len,
242 agent, &phb, frame, card);
243
244 data += len;
245 data_len -= len;
246 }
247}
248
249static int __init iseries_get_location_code(u16 bus, HvAgentId agent,
250 u8 *frame, char card[4])
251{
252 int status = 0;
253 int bus_vpd_len = 0;
254 u8 *bus_vpd = kmalloc(BUS_VPDSIZE, GFP_KERNEL);
255
256 if (bus_vpd == NULL) {
257 printk("PCI: Bus VPD Buffer allocation failure.\n");
258 return 0;
259 }
260 bus_vpd_len = HvCallPci_getBusVpd(bus, iseries_hv_addr(bus_vpd),
261 BUS_VPDSIZE);
262 if (bus_vpd_len == 0) {
263 printk("PCI: Bus VPD Buffer zero length.\n");
264 goto out_free;
265 }
266
267
268 if (*bus_vpd != VPD_ID_STRING) {
269 printk("PCI: Bus VPD Buffer missing starting tag.\n");
270 goto out_free;
271 }
272 iseries_parse_vpd(bus_vpd, bus_vpd_len, agent, frame, card);
273 status = 1;
274out_free:
275 kfree(bus_vpd);
276 return status;
277}
278
279
280
281
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283
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285
286
287
288static void __init iseries_device_information(struct pci_dev *pdev,
289 u16 bus, HvSubBusNumber subbus)
290{
291 u8 frame = 0;
292 char card[4];
293 HvAgentId agent;
294
295 agent = ISERIES_PCI_AGENTID(ISERIES_GET_DEVICE_FROM_SUBBUS(subbus),
296 ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus));
297
298 if (iseries_get_location_code(bus, agent, &frame, card)) {
299 printk(KERN_INFO "PCI: %s, Vendor %04X Frame%3d, "
300 "Card %4s 0x%04X\n", pci_name(pdev), pdev->vendor,
301 frame, card, (int)(pdev->class >> 8));
302 }
303}
304
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314
315
316
317static void __init iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
318{
319 struct resource *bar_res = &dev->resource[bar_num];
320 long bar_size = pci_resource_len(dev, bar_num);
321 struct device_node *dn = pci_device_to_OF_node(dev);
322
323
324
325
326 if (bar_size == 0)
327 return;
328
329
330
331 spin_lock(&iomm_table_lock);
332 bar_res->start = BASE_IO_MEMORY +
333 IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
334 bar_res->end = bar_res->start + bar_size - 1;
335
336
337
338 while (bar_size > 0 ) {
339 iomm_table[current_iomm_table_entry] = dn;
340 ds_addr_table[current_iomm_table_entry] =
341 iseries_ds_addr(dn) | (bar_num << 24);
342 bar_size -= IOMM_TABLE_ENTRY_SIZE;
343 ++current_iomm_table_entry;
344 }
345 max_io_memory = BASE_IO_MEMORY +
346 IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
347 spin_unlock(&iomm_table_lock);
348}
349
350
351
352
353
354
355
356
357
358
359
360
361static void __init allocate_device_bars(struct pci_dev *dev)
362{
363 int bar_num;
364
365 for (bar_num = 0; bar_num <= PCI_ROM_RESOURCE; ++bar_num)
366 iomm_table_allocate_entry(dev, bar_num);
367}
368
369
370
371
372
373
374
375
376static void pci_log_error(char *error, int bus, int subbus,
377 int agent, int hv_res)
378{
379 if (hv_res == 0x0302)
380 return;
381 printk(KERN_ERR "PCI: %s Failed: 0x%02X.%02X.%02X Rc: 0x%04X",
382 error, bus, subbus, agent, hv_res);
383}
384
385
386
387
388static struct device_node *find_device_node(int bus, int devfn)
389{
390 struct device_node *node;
391
392 for (node = NULL; (node = of_find_all_nodes(node)); ) {
393 struct pci_dn *pdn = PCI_DN(node);
394
395 if (pdn && (bus == pdn->busno) && (devfn == pdn->devfn))
396 return node;
397 }
398 return NULL;
399}
400
401
402
403
404
405
406void __init iSeries_pcibios_fixup_resources(struct pci_dev *pdev)
407{
408 const u32 *agent;
409 const u32 *sub_bus;
410 unsigned char bus = pdev->bus->number;
411 struct device_node *node;
412 int i;
413
414 node = pci_device_to_OF_node(pdev);
415 pr_debug("PCI: iSeries %s, pdev %p, node %p\n",
416 pci_name(pdev), pdev, node);
417 if (!node) {
418 printk("PCI: %s disabled, device tree entry not found !\n",
419 pci_name(pdev));
420 for (i = 0; i <= PCI_ROM_RESOURCE; i++)
421 pdev->resource[i].flags = 0;
422 return;
423 }
424 sub_bus = of_get_property(node, "linux,subbus", NULL);
425 agent = of_get_property(node, "linux,agent-id", NULL);
426 if (agent && sub_bus) {
427 u8 irq = iSeries_allocate_IRQ(bus, 0, *sub_bus);
428 int err;
429
430 err = HvCallXm_connectBusUnit(bus, *sub_bus, *agent, irq);
431 if (err)
432 pci_log_error("Connect Bus Unit",
433 bus, *sub_bus, *agent, err);
434 else {
435 err = HvCallPci_configStore8(bus, *sub_bus,
436 *agent, PCI_INTERRUPT_LINE, irq);
437 if (err)
438 pci_log_error("PciCfgStore Irq Failed!",
439 bus, *sub_bus, *agent, err);
440 else
441 pdev->irq = irq;
442 }
443 }
444
445 allocate_device_bars(pdev);
446 iseries_device_information(pdev, bus, *sub_bus);
447}
448
449
450
451
452void __init iSeries_pci_final_fixup(void)
453{
454
455 mf_display_src(0xC9000100);
456 iSeries_activate_IRQs();
457 mf_display_src(0xC9000200);
458}
459
460
461
462
463
464
465
466static u64 hv_cfg_read_func[4] = {
467 HvCallPciConfigLoad8, HvCallPciConfigLoad16,
468 HvCallPciConfigLoad32, HvCallPciConfigLoad32
469};
470
471static u64 hv_cfg_write_func[4] = {
472 HvCallPciConfigStore8, HvCallPciConfigStore16,
473 HvCallPciConfigStore32, HvCallPciConfigStore32
474};
475
476
477
478
479static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
480 int offset, int size, u32 *val)
481{
482 struct device_node *node = find_device_node(bus->number, devfn);
483 u64 fn;
484 struct HvCallPci_LoadReturn ret;
485
486 if (node == NULL)
487 return PCIBIOS_DEVICE_NOT_FOUND;
488 if (offset > 255) {
489 *val = ~0;
490 return PCIBIOS_BAD_REGISTER_NUMBER;
491 }
492
493 fn = hv_cfg_read_func[(size - 1) & 3];
494 HvCall3Ret16(fn, &ret, iseries_ds_addr(node), offset, 0);
495
496 if (ret.rc != 0) {
497 *val = ~0;
498 return PCIBIOS_DEVICE_NOT_FOUND;
499 }
500
501 *val = ret.value;
502 return 0;
503}
504
505
506
507
508
509static int iSeries_pci_write_config(struct pci_bus *bus, unsigned int devfn,
510 int offset, int size, u32 val)
511{
512 struct device_node *node = find_device_node(bus->number, devfn);
513 u64 fn;
514 u64 ret;
515
516 if (node == NULL)
517 return PCIBIOS_DEVICE_NOT_FOUND;
518 if (offset > 255)
519 return PCIBIOS_BAD_REGISTER_NUMBER;
520
521 fn = hv_cfg_write_func[(size - 1) & 3];
522 ret = HvCall4(fn, iseries_ds_addr(node), offset, val, 0);
523
524 if (ret != 0)
525 return PCIBIOS_DEVICE_NOT_FOUND;
526
527 return 0;
528}
529
530static struct pci_ops iSeries_pci_ops = {
531 .read = iSeries_pci_read_config,
532 .write = iSeries_pci_write_config
533};
534
535
536
537
538
539
540
541
542
543
544static int check_return_code(char *type, struct device_node *dn,
545 int *retry, u64 ret)
546{
547 if (ret != 0) {
548 struct pci_dn *pdn = PCI_DN(dn);
549
550 (*retry)++;
551 printk("PCI: %s: Device 0x%04X:%02X I/O Error(%2d): 0x%04X\n",
552 type, pdn->busno, pdn->devfn,
553 *retry, (int)ret);
554
555
556
557
558 if (((*retry) > PCI_RETRY_MAX) &&
559 (limit_pci_retries > 0)) {
560 mf_display_src(0xB6000103);
561 panic_timeout = 0;
562 panic("PCI: Hardware I/O Error, SRC B6000103, "
563 "Automatic Reboot Disabled.\n");
564 }
565 return -1;
566 }
567 return 0;
568}
569
570
571
572
573
574
575static inline struct device_node *xlate_iomm_address(
576 const volatile void __iomem *addr,
577 u64 *dsaptr, u64 *bar_offset, const char *func)
578{
579 unsigned long orig_addr;
580 unsigned long base_addr;
581 unsigned long ind;
582 struct device_node *dn;
583
584 orig_addr = (unsigned long __force)addr;
585 if ((orig_addr < BASE_IO_MEMORY) || (orig_addr >= max_io_memory)) {
586 static unsigned long last_jiffies;
587 static int num_printed;
588
589 if (time_after(jiffies, last_jiffies + 60 * HZ)) {
590 last_jiffies = jiffies;
591 num_printed = 0;
592 }
593 if (num_printed++ < 10)
594 printk(KERN_ERR
595 "iSeries_%s: invalid access at IO address %p\n",
596 func, addr);
597 return NULL;
598 }
599 base_addr = orig_addr - BASE_IO_MEMORY;
600 ind = base_addr / IOMM_TABLE_ENTRY_SIZE;
601 dn = iomm_table[ind];
602
603 if (dn != NULL) {
604 *dsaptr = ds_addr_table[ind];
605 *bar_offset = base_addr % IOMM_TABLE_ENTRY_SIZE;
606 } else
607 panic("PCI: Invalid PCI IO address detected!\n");
608 return dn;
609}
610
611
612
613
614
615
616static u8 iseries_readb(const volatile void __iomem *addr)
617{
618 u64 bar_offset;
619 u64 dsa;
620 int retry = 0;
621 struct HvCallPci_LoadReturn ret;
622 struct device_node *dn =
623 xlate_iomm_address(addr, &dsa, &bar_offset, "read_byte");
624
625 if (dn == NULL)
626 return 0xff;
627 do {
628 HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, bar_offset, 0);
629 } while (check_return_code("RDB", dn, &retry, ret.rc) != 0);
630
631 return ret.value;
632}
633
634static u16 iseries_readw_be(const volatile void __iomem *addr)
635{
636 u64 bar_offset;
637 u64 dsa;
638 int retry = 0;
639 struct HvCallPci_LoadReturn ret;
640 struct device_node *dn =
641 xlate_iomm_address(addr, &dsa, &bar_offset, "read_word");
642
643 if (dn == NULL)
644 return 0xffff;
645 do {
646 HvCall3Ret16(HvCallPciBarLoad16, &ret, dsa,
647 bar_offset, 0);
648 } while (check_return_code("RDW", dn, &retry, ret.rc) != 0);
649
650 return ret.value;
651}
652
653static u32 iseries_readl_be(const volatile void __iomem *addr)
654{
655 u64 bar_offset;
656 u64 dsa;
657 int retry = 0;
658 struct HvCallPci_LoadReturn ret;
659 struct device_node *dn =
660 xlate_iomm_address(addr, &dsa, &bar_offset, "read_long");
661
662 if (dn == NULL)
663 return 0xffffffff;
664 do {
665 HvCall3Ret16(HvCallPciBarLoad32, &ret, dsa,
666 bar_offset, 0);
667 } while (check_return_code("RDL", dn, &retry, ret.rc) != 0);
668
669 return ret.value;
670}
671
672
673
674
675
676static void iseries_writeb(u8 data, volatile void __iomem *addr)
677{
678 u64 bar_offset;
679 u64 dsa;
680 int retry = 0;
681 u64 rc;
682 struct device_node *dn =
683 xlate_iomm_address(addr, &dsa, &bar_offset, "write_byte");
684
685 if (dn == NULL)
686 return;
687 do {
688 rc = HvCall4(HvCallPciBarStore8, dsa, bar_offset, data, 0);
689 } while (check_return_code("WWB", dn, &retry, rc) != 0);
690}
691
692static void iseries_writew_be(u16 data, volatile void __iomem *addr)
693{
694 u64 bar_offset;
695 u64 dsa;
696 int retry = 0;
697 u64 rc;
698 struct device_node *dn =
699 xlate_iomm_address(addr, &dsa, &bar_offset, "write_word");
700
701 if (dn == NULL)
702 return;
703 do {
704 rc = HvCall4(HvCallPciBarStore16, dsa, bar_offset, data, 0);
705 } while (check_return_code("WWW", dn, &retry, rc) != 0);
706}
707
708static void iseries_writel_be(u32 data, volatile void __iomem *addr)
709{
710 u64 bar_offset;
711 u64 dsa;
712 int retry = 0;
713 u64 rc;
714 struct device_node *dn =
715 xlate_iomm_address(addr, &dsa, &bar_offset, "write_long");
716
717 if (dn == NULL)
718 return;
719 do {
720 rc = HvCall4(HvCallPciBarStore32, dsa, bar_offset, data, 0);
721 } while (check_return_code("WWL", dn, &retry, rc) != 0);
722}
723
724static u16 iseries_readw(const volatile void __iomem *addr)
725{
726 return le16_to_cpu(iseries_readw_be(addr));
727}
728
729static u32 iseries_readl(const volatile void __iomem *addr)
730{
731 return le32_to_cpu(iseries_readl_be(addr));
732}
733
734static void iseries_writew(u16 data, volatile void __iomem *addr)
735{
736 iseries_writew_be(cpu_to_le16(data), addr);
737}
738
739static void iseries_writel(u32 data, volatile void __iomem *addr)
740{
741 iseries_writel(cpu_to_le32(data), addr);
742}
743
744static void iseries_readsb(const volatile void __iomem *addr, void *buf,
745 unsigned long count)
746{
747 u8 *dst = buf;
748 while(count-- > 0)
749 *(dst++) = iseries_readb(addr);
750}
751
752static void iseries_readsw(const volatile void __iomem *addr, void *buf,
753 unsigned long count)
754{
755 u16 *dst = buf;
756 while(count-- > 0)
757 *(dst++) = iseries_readw_be(addr);
758}
759
760static void iseries_readsl(const volatile void __iomem *addr, void *buf,
761 unsigned long count)
762{
763 u32 *dst = buf;
764 while(count-- > 0)
765 *(dst++) = iseries_readl_be(addr);
766}
767
768static void iseries_writesb(volatile void __iomem *addr, const void *buf,
769 unsigned long count)
770{
771 const u8 *src = buf;
772 while(count-- > 0)
773 iseries_writeb(*(src++), addr);
774}
775
776static void iseries_writesw(volatile void __iomem *addr, const void *buf,
777 unsigned long count)
778{
779 const u16 *src = buf;
780 while(count-- > 0)
781 iseries_writew_be(*(src++), addr);
782}
783
784static void iseries_writesl(volatile void __iomem *addr, const void *buf,
785 unsigned long count)
786{
787 const u32 *src = buf;
788 while(count-- > 0)
789 iseries_writel_be(*(src++), addr);
790}
791
792static void iseries_memset_io(volatile void __iomem *addr, int c,
793 unsigned long n)
794{
795 volatile char __iomem *d = addr;
796
797 while (n-- > 0)
798 iseries_writeb(c, d++);
799}
800
801static void iseries_memcpy_fromio(void *dest, const volatile void __iomem *src,
802 unsigned long n)
803{
804 char *d = dest;
805 const volatile char __iomem *s = src;
806
807 while (n-- > 0)
808 *d++ = iseries_readb(s++);
809}
810
811static void iseries_memcpy_toio(volatile void __iomem *dest, const void *src,
812 unsigned long n)
813{
814 const char *s = src;
815 volatile char __iomem *d = dest;
816
817 while (n-- > 0)
818 iseries_writeb(*s++, d++);
819}
820
821
822
823
824
825
826
827
828
829
830
831static struct ppc_pci_io __initdata iseries_pci_io = {
832 .readb = iseries_readb,
833 .readw = iseries_readw,
834 .readl = iseries_readl,
835 .readw_be = iseries_readw_be,
836 .readl_be = iseries_readl_be,
837 .writeb = iseries_writeb,
838 .writew = iseries_writew,
839 .writel = iseries_writel,
840 .writew_be = iseries_writew_be,
841 .writel_be = iseries_writel_be,
842 .readsb = iseries_readsb,
843 .readsw = iseries_readsw,
844 .readsl = iseries_readsl,
845 .writesb = iseries_writesb,
846 .writesw = iseries_writesw,
847 .writesl = iseries_writesl,
848 .memset_io = iseries_memset_io,
849 .memcpy_fromio = iseries_memcpy_fromio,
850 .memcpy_toio = iseries_memcpy_toio,
851};
852
853
854
855
856
857
858
859
860
861
862void __init iSeries_pcibios_init(void)
863{
864 struct pci_controller *phb;
865 struct device_node *root = of_find_node_by_path("/");
866 struct device_node *node = NULL;
867
868
869 ppc_pci_io = iseries_pci_io;
870
871 pci_probe_only = 1;
872
873
874
875
876 pci_io_base = 0;
877
878 if (root == NULL) {
879 printk(KERN_CRIT "iSeries_pcibios_init: can't find root "
880 "of device tree\n");
881 return;
882 }
883 while ((node = of_get_next_child(root, node)) != NULL) {
884 HvBusNumber bus;
885 const u32 *busp;
886
887 if ((node->type == NULL) || (strcmp(node->type, "pci") != 0))
888 continue;
889
890 busp = of_get_property(node, "bus-range", NULL);
891 if (busp == NULL)
892 continue;
893 bus = *busp;
894 printk("bus %d appears to exist\n", bus);
895 phb = pcibios_alloc_controller(node);
896 if (phb == NULL)
897 continue;
898
899 phb->global_number = 0;
900
901 phb->first_busno = bus;
902 phb->last_busno = bus;
903 phb->ops = &iSeries_pci_ops;
904 phb->io_base_virt = (void __iomem *)_IO_BASE;
905 phb->io_resource.flags = IORESOURCE_IO;
906 phb->io_resource.start = BASE_IO_MEMORY;
907 phb->io_resource.end = END_IO_MEMORY;
908 phb->io_resource.name = "iSeries PCI IO";
909 phb->mem_resources[0].flags = IORESOURCE_MEM;
910 phb->mem_resources[0].start = BASE_IO_MEMORY;
911 phb->mem_resources[0].end = END_IO_MEMORY;
912 phb->mem_resources[0].name = "Series PCI MEM";
913 }
914
915 of_node_put(root);
916
917 pci_devs_phb_init();
918}
919
920