1#ifndef __ASM_SH_PROCESSOR_H
2#define __ASM_SH_PROCESSOR_H
3
4#include <asm/cpu-features.h>
5#include <asm/segment.h>
6#include <asm/cache.h>
7
8#ifndef __ASSEMBLY__
9
10
11
12
13
14
15
16enum cpu_type {
17
18 CPU_SH7619,
19
20
21 CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,
22
23
24 CPU_SH7705, CPU_SH7706, CPU_SH7707,
25 CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
26 CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
27 CPU_SH7720, CPU_SH7721, CPU_SH7729,
28
29
30 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
31 CPU_SH7760, CPU_SH4_202, CPU_SH4_501,
32
33
34 CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786,
35 CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3,
36
37
38 CPU_SH7343, CPU_SH7722, CPU_SH7366,
39
40
41 CPU_SH5_101, CPU_SH5_103,
42
43
44 CPU_SH_NONE
45};
46
47enum cpu_family {
48 CPU_FAMILY_SH2,
49 CPU_FAMILY_SH2A,
50 CPU_FAMILY_SH3,
51 CPU_FAMILY_SH4,
52 CPU_FAMILY_SH4A,
53 CPU_FAMILY_SH4AL_DSP,
54 CPU_FAMILY_SH5,
55 CPU_FAMILY_UNKNOWN,
56};
57
58
59
60
61
62
63struct tlb_info {
64 unsigned long long next;
65 unsigned long long first;
66 unsigned long long last;
67
68 unsigned int entries;
69 unsigned int step;
70
71 unsigned long flags;
72};
73
74struct sh_cpuinfo {
75 unsigned int type, family;
76 int cut_major, cut_minor;
77 unsigned long loops_per_jiffy;
78 unsigned long asid_cache;
79
80 struct cache_info icache;
81 struct cache_info dcache;
82 struct cache_info scache;
83
84
85 struct tlb_info itlb;
86 struct tlb_info dtlb;
87
88 unsigned long flags;
89} __attribute__ ((aligned(L1_CACHE_BYTES)));
90
91extern struct sh_cpuinfo cpu_data[];
92#define boot_cpu_data cpu_data[0]
93#define current_cpu_data cpu_data[smp_processor_id()]
94#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
95
96#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
97#define cpu_relax() barrier()
98
99
100struct seq_operations;
101
102extern struct pt_regs fake_swapper_regs;
103
104
105const char *get_cpu_subtype(struct sh_cpuinfo *c);
106extern const struct seq_operations cpuinfo_op;
107
108
109#define MODE_PIN0 (1 << 0)
110#define MODE_PIN1 (1 << 1)
111#define MODE_PIN2 (1 << 2)
112#define MODE_PIN3 (1 << 3)
113#define MODE_PIN4 (1 << 4)
114#define MODE_PIN5 (1 << 5)
115#define MODE_PIN6 (1 << 6)
116#define MODE_PIN7 (1 << 7)
117#define MODE_PIN8 (1 << 8)
118#define MODE_PIN9 (1 << 9)
119#define MODE_PIN10 (1 << 10)
120#define MODE_PIN11 (1 << 11)
121#define MODE_PIN12 (1 << 12)
122#define MODE_PIN13 (1 << 13)
123#define MODE_PIN14 (1 << 14)
124#define MODE_PIN15 (1 << 15)
125
126int generic_mode_pins(void);
127int test_mode_pin(int pin);
128
129#ifdef CONFIG_VSYSCALL
130int vsyscall_init(void);
131#else
132#define vsyscall_init() do { } while (0)
133#endif
134
135#endif
136
137#ifdef CONFIG_SUPERH32
138# include "processor_32.h"
139#else
140# include "processor_64.h"
141#endif
142
143#endif
144