linux/arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c
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   1/*
   2 * SH7785 Pinmux
   3 *
   4 *  Copyright (C) 2008  Magnus Damm
   5 *
   6 * This file is subject to the terms and conditions of the GNU General Public
   7 * License.  See the file "COPYING" in the main directory of this archive
   8 * for more details.
   9 */
  10
  11#include <linux/init.h>
  12#include <linux/kernel.h>
  13#include <linux/gpio.h>
  14#include <cpu/sh7785.h>
  15
  16enum {
  17        PINMUX_RESERVED = 0,
  18
  19        PINMUX_DATA_BEGIN,
  20        PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
  21        PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
  22        PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
  23        PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
  24        PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
  25        PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
  26        PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
  27        PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
  28        PE5_DATA, PE4_DATA, PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
  29        PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
  30        PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
  31        PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
  32        PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
  33        PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
  34        PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
  35        PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
  36        PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,
  37        PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
  38        PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA,
  39        PL7_DATA, PL6_DATA, PL5_DATA, PL4_DATA,
  40        PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA,
  41        PM1_DATA, PM0_DATA,
  42        PN7_DATA, PN6_DATA, PN5_DATA, PN4_DATA,
  43        PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA,
  44        PP5_DATA, PP4_DATA, PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA,
  45        PQ4_DATA, PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA,
  46        PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA,
  47        PINMUX_DATA_END,
  48
  49        PINMUX_INPUT_BEGIN,
  50        PA7_IN, PA6_IN, PA5_IN, PA4_IN,
  51        PA3_IN, PA2_IN, PA1_IN, PA0_IN,
  52        PB7_IN, PB6_IN, PB5_IN, PB4_IN,
  53        PB3_IN, PB2_IN, PB1_IN, PB0_IN,
  54        PC7_IN, PC6_IN, PC5_IN, PC4_IN,
  55        PC3_IN, PC2_IN, PC1_IN, PC0_IN,
  56        PD7_IN, PD6_IN, PD5_IN, PD4_IN,
  57        PD3_IN, PD2_IN, PD1_IN, PD0_IN,
  58        PE5_IN, PE4_IN, PE3_IN, PE2_IN, PE1_IN, PE0_IN,
  59        PF7_IN, PF6_IN, PF5_IN, PF4_IN,
  60        PF3_IN, PF2_IN, PF1_IN, PF0_IN,
  61        PG7_IN, PG6_IN, PG5_IN, PG4_IN,
  62        PG3_IN, PG2_IN, PG1_IN, PG0_IN,
  63        PH7_IN, PH6_IN, PH5_IN, PH4_IN,
  64        PH3_IN, PH2_IN, PH1_IN, PH0_IN,
  65        PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
  66        PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN,
  67        PK7_IN, PK6_IN, PK5_IN, PK4_IN,
  68        PK3_IN, PK2_IN, PK1_IN, PK0_IN,
  69        PL7_IN, PL6_IN, PL5_IN, PL4_IN,
  70        PL3_IN, PL2_IN, PL1_IN, PL0_IN,
  71        PM1_IN, PM0_IN,
  72        PN7_IN, PN6_IN, PN5_IN, PN4_IN,
  73        PN3_IN, PN2_IN, PN1_IN, PN0_IN,
  74        PP5_IN, PP4_IN, PP3_IN, PP2_IN, PP1_IN, PP0_IN,
  75        PQ4_IN, PQ3_IN, PQ2_IN, PQ1_IN, PQ0_IN,
  76        PR3_IN, PR2_IN, PR1_IN, PR0_IN,
  77        PINMUX_INPUT_END,
  78
  79        PINMUX_INPUT_PULLUP_BEGIN,
  80        PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
  81        PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
  82        PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
  83        PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
  84        PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
  85        PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
  86        PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
  87        PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
  88        PE5_IN_PU, PE4_IN_PU, PE3_IN_PU, PE2_IN_PU, PE1_IN_PU, PE0_IN_PU,
  89        PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
  90        PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
  91        PG7_IN_PU, PG6_IN_PU, PG5_IN_PU, PG4_IN_PU,
  92        PG3_IN_PU, PG2_IN_PU, PG1_IN_PU, PG0_IN_PU,
  93        PH7_IN_PU, PH6_IN_PU, PH5_IN_PU, PH4_IN_PU,
  94        PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
  95        PJ7_IN_PU, PJ6_IN_PU, PJ5_IN_PU, PJ4_IN_PU,
  96        PJ3_IN_PU, PJ2_IN_PU, PJ1_IN_PU, PJ0_IN_PU,
  97        PK7_IN_PU, PK6_IN_PU, PK5_IN_PU, PK4_IN_PU,
  98        PK3_IN_PU, PK2_IN_PU, PK1_IN_PU, PK0_IN_PU,
  99        PL7_IN_PU, PL6_IN_PU, PL5_IN_PU, PL4_IN_PU,
 100        PL3_IN_PU, PL2_IN_PU, PL1_IN_PU, PL0_IN_PU,
 101        PM1_IN_PU, PM0_IN_PU,
 102        PN7_IN_PU, PN6_IN_PU, PN5_IN_PU, PN4_IN_PU,
 103        PN3_IN_PU, PN2_IN_PU, PN1_IN_PU, PN0_IN_PU,
 104        PP5_IN_PU, PP4_IN_PU, PP3_IN_PU, PP2_IN_PU, PP1_IN_PU, PP0_IN_PU,
 105        PQ4_IN_PU, PQ3_IN_PU, PQ2_IN_PU, PQ1_IN_PU, PQ0_IN_PU,
 106        PR3_IN_PU, PR2_IN_PU, PR1_IN_PU, PR0_IN_PU,
 107        PINMUX_INPUT_PULLUP_END,
 108
 109        PINMUX_OUTPUT_BEGIN,
 110        PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
 111        PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
 112        PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
 113        PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
 114        PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
 115        PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
 116        PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
 117        PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
 118        PE5_OUT, PE4_OUT, PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
 119        PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
 120        PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
 121        PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
 122        PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
 123        PH7_OUT, PH6_OUT, PH5_OUT, PH4_OUT,
 124        PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
 125        PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
 126        PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT,
 127        PK7_OUT, PK6_OUT, PK5_OUT, PK4_OUT,
 128        PK3_OUT, PK2_OUT, PK1_OUT, PK0_OUT,
 129        PL7_OUT, PL6_OUT, PL5_OUT, PL4_OUT,
 130        PL3_OUT, PL2_OUT, PL1_OUT, PL0_OUT,
 131        PM1_OUT, PM0_OUT,
 132        PN7_OUT, PN6_OUT, PN5_OUT, PN4_OUT,
 133        PN3_OUT, PN2_OUT, PN1_OUT, PN0_OUT,
 134        PP5_OUT, PP4_OUT, PP3_OUT, PP2_OUT, PP1_OUT, PP0_OUT,
 135        PQ4_OUT, PQ3_OUT, PQ2_OUT, PQ1_OUT, PQ0_OUT,
 136        PR3_OUT, PR2_OUT, PR1_OUT, PR0_OUT,
 137        PINMUX_OUTPUT_END,
 138
 139        PINMUX_FUNCTION_BEGIN,
 140        PA7_FN, PA6_FN, PA5_FN, PA4_FN,
 141        PA3_FN, PA2_FN, PA1_FN, PA0_FN,
 142        PB7_FN, PB6_FN, PB5_FN, PB4_FN,
 143        PB3_FN, PB2_FN, PB1_FN, PB0_FN,
 144        PC7_FN, PC6_FN, PC5_FN, PC4_FN,
 145        PC3_FN, PC2_FN, PC1_FN, PC0_FN,
 146        PD7_FN, PD6_FN, PD5_FN, PD4_FN,
 147        PD3_FN, PD2_FN, PD1_FN, PD0_FN,
 148        PE5_FN, PE4_FN, PE3_FN, PE2_FN, PE1_FN, PE0_FN,
 149        PF7_FN, PF6_FN, PF5_FN, PF4_FN,
 150        PF3_FN, PF2_FN, PF1_FN, PF0_FN,
 151        PG7_FN, PG6_FN, PG5_FN, PG4_FN,
 152        PG3_FN, PG2_FN, PG1_FN, PG0_FN,
 153        PH7_FN, PH6_FN, PH5_FN, PH4_FN,
 154        PH3_FN, PH2_FN, PH1_FN, PH0_FN,
 155        PJ7_FN, PJ6_FN, PJ5_FN, PJ4_FN,
 156        PJ3_FN, PJ2_FN, PJ1_FN, PJ0_FN,
 157        PK7_FN, PK6_FN, PK5_FN, PK4_FN,
 158        PK3_FN, PK2_FN, PK1_FN, PK0_FN,
 159        PL7_FN, PL6_FN, PL5_FN, PL4_FN,
 160        PL3_FN, PL2_FN, PL1_FN, PL0_FN,
 161        PM1_FN, PM0_FN,
 162        PN7_FN, PN6_FN, PN5_FN, PN4_FN,
 163        PN3_FN, PN2_FN, PN1_FN, PN0_FN,
 164        PP5_FN, PP4_FN, PP3_FN, PP2_FN, PP1_FN, PP0_FN,
 165        PQ4_FN, PQ3_FN, PQ2_FN, PQ1_FN, PQ0_FN,
 166        PR3_FN, PR2_FN, PR1_FN, PR0_FN,
 167        P1MSEL15_0, P1MSEL15_1,
 168        P1MSEL14_0, P1MSEL14_1,
 169        P1MSEL13_0, P1MSEL13_1,
 170        P1MSEL12_0, P1MSEL12_1,
 171        P1MSEL11_0, P1MSEL11_1,
 172        P1MSEL10_0, P1MSEL10_1,
 173        P1MSEL9_0, P1MSEL9_1,
 174        P1MSEL8_0, P1MSEL8_1,
 175        P1MSEL7_0, P1MSEL7_1,
 176        P1MSEL6_0, P1MSEL6_1,
 177        P1MSEL5_0,
 178        P1MSEL4_0, P1MSEL4_1,
 179        P1MSEL3_0, P1MSEL3_1,
 180        P1MSEL2_0, P1MSEL2_1,
 181        P1MSEL1_0, P1MSEL1_1,
 182        P1MSEL0_0, P1MSEL0_1,
 183        P2MSEL2_0, P2MSEL2_1,
 184        P2MSEL1_0, P2MSEL1_1,
 185        P2MSEL0_0, P2MSEL0_1,
 186        PINMUX_FUNCTION_END,
 187
 188        PINMUX_MARK_BEGIN,
 189        D63_AD31_MARK,
 190        D62_AD30_MARK,
 191        D61_AD29_MARK,
 192        D60_AD28_MARK,
 193        D59_AD27_MARK,
 194        D58_AD26_MARK,
 195        D57_AD25_MARK,
 196        D56_AD24_MARK,
 197        D55_AD23_MARK,
 198        D54_AD22_MARK,
 199        D53_AD21_MARK,
 200        D52_AD20_MARK,
 201        D51_AD19_MARK,
 202        D50_AD18_MARK,
 203        D49_AD17_DB5_MARK,
 204        D48_AD16_DB4_MARK,
 205        D47_AD15_DB3_MARK,
 206        D46_AD14_DB2_MARK,
 207        D45_AD13_DB1_MARK,
 208        D44_AD12_DB0_MARK,
 209        D43_AD11_DG5_MARK,
 210        D42_AD10_DG4_MARK,
 211        D41_AD9_DG3_MARK,
 212        D40_AD8_DG2_MARK,
 213        D39_AD7_DG1_MARK,
 214        D38_AD6_DG0_MARK,
 215        D37_AD5_DR5_MARK,
 216        D36_AD4_DR4_MARK,
 217        D35_AD3_DR3_MARK,
 218        D34_AD2_DR2_MARK,
 219        D33_AD1_DR1_MARK,
 220        D32_AD0_DR0_MARK,
 221        REQ1_MARK,
 222        REQ2_MARK,
 223        REQ3_MARK,
 224        GNT1_MARK,
 225        GNT2_MARK,
 226        GNT3_MARK,
 227        MMCCLK_MARK,
 228        D31_MARK,
 229        D30_MARK,
 230        D29_MARK,
 231        D28_MARK,
 232        D27_MARK,
 233        D26_MARK,
 234        D25_MARK,
 235        D24_MARK,
 236        D23_MARK,
 237        D22_MARK,
 238        D21_MARK,
 239        D20_MARK,
 240        D19_MARK,
 241        D18_MARK,
 242        D17_MARK,
 243        D16_MARK,
 244        SCIF1_SCK_MARK,
 245        SCIF1_RXD_MARK,
 246        SCIF1_TXD_MARK,
 247        SCIF0_CTS_MARK,
 248        INTD_MARK,
 249        FCE_MARK,
 250        SCIF0_RTS_MARK,
 251        HSPI_CS_MARK,
 252        FSE_MARK,
 253        SCIF0_SCK_MARK,
 254        HSPI_CLK_MARK,
 255        FRE_MARK,
 256        SCIF0_RXD_MARK,
 257        HSPI_RX_MARK,
 258        FRB_MARK,
 259        SCIF0_TXD_MARK,
 260        HSPI_TX_MARK,
 261        FWE_MARK,
 262        SCIF5_TXD_MARK,
 263        HAC1_SYNC_MARK,
 264        SSI1_WS_MARK,
 265        SIOF_TXD_PJ_MARK,
 266        HAC0_SDOUT_MARK,
 267        SSI0_SDATA_MARK,
 268        SIOF_RXD_PJ_MARK,
 269        HAC0_SDIN_MARK,
 270        SSI0_SCK_MARK,
 271        SIOF_SYNC_PJ_MARK,
 272        HAC0_SYNC_MARK,
 273        SSI0_WS_MARK,
 274        SIOF_MCLK_PJ_MARK,
 275        HAC_RES_MARK,
 276        SIOF_SCK_PJ_MARK,
 277        HAC0_BITCLK_MARK,
 278        SSI0_CLK_MARK,
 279        HAC1_BITCLK_MARK,
 280        SSI1_CLK_MARK,
 281        TCLK_MARK,
 282        IOIS16_MARK,
 283        STATUS0_MARK,
 284        DRAK0_PK3_MARK,
 285        STATUS1_MARK,
 286        DRAK1_PK2_MARK,
 287        DACK2_MARK,
 288        SCIF2_TXD_MARK,
 289        MMCCMD_MARK,
 290        SIOF_TXD_PK_MARK,
 291        DACK3_MARK,
 292        SCIF2_SCK_MARK,
 293        MMCDAT_MARK,
 294        SIOF_SCK_PK_MARK,
 295        DREQ0_MARK,
 296        DREQ1_MARK,
 297        DRAK0_PK1_MARK,
 298        DRAK1_PK0_MARK,
 299        DREQ2_MARK,
 300        INTB_MARK,
 301        DREQ3_MARK,
 302        INTC_MARK,
 303        DRAK2_MARK,
 304        CE2A_MARK,
 305        IRL4_MARK,
 306        FD4_MARK,
 307        IRL5_MARK,
 308        FD5_MARK,
 309        IRL6_MARK,
 310        FD6_MARK,
 311        IRL7_MARK,
 312        FD7_MARK,
 313        DRAK3_MARK,
 314        CE2B_MARK,
 315        BREQ_BSACK_MARK,
 316        BACK_BSREQ_MARK,
 317        SCIF5_RXD_MARK,
 318        HAC1_SDIN_MARK,
 319        SSI1_SCK_MARK,
 320        SCIF5_SCK_MARK,
 321        HAC1_SDOUT_MARK,
 322        SSI1_SDATA_MARK,
 323        SCIF3_TXD_MARK,
 324        FCLE_MARK,
 325        SCIF3_RXD_MARK,
 326        FALE_MARK,
 327        SCIF3_SCK_MARK,
 328        FD0_MARK,
 329        SCIF4_TXD_MARK,
 330        FD1_MARK,
 331        SCIF4_RXD_MARK,
 332        FD2_MARK,
 333        SCIF4_SCK_MARK,
 334        FD3_MARK,
 335        DEVSEL_DCLKOUT_MARK,
 336        STOP_CDE_MARK,
 337        LOCK_ODDF_MARK,
 338        TRDY_DISPL_MARK,
 339        IRDY_HSYNC_MARK,
 340        PCIFRAME_VSYNC_MARK,
 341        INTA_MARK,
 342        GNT0_GNTIN_MARK,
 343        REQ0_REQOUT_MARK,
 344        PERR_MARK,
 345        SERR_MARK,
 346        WE7_CBE3_MARK,
 347        WE6_CBE2_MARK,
 348        WE5_CBE1_MARK,
 349        WE4_CBE0_MARK,
 350        SCIF2_RXD_MARK,
 351        SIOF_RXD_MARK,
 352        MRESETOUT_MARK,
 353        IRQOUT_MARK,
 354        PINMUX_MARK_END,
 355};
 356
 357static pinmux_enum_t pinmux_data[] = {
 358
 359        /* PA GPIO */
 360        PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
 361        PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
 362        PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
 363        PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
 364        PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
 365        PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
 366        PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
 367        PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
 368
 369        /* PB GPIO */
 370        PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
 371        PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
 372        PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
 373        PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
 374        PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
 375        PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
 376        PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
 377        PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
 378
 379        /* PC GPIO */
 380        PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
 381        PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
 382        PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
 383        PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
 384        PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
 385        PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
 386        PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
 387        PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
 388
 389        /* PD GPIO */
 390        PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
 391        PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
 392        PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
 393        PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
 394        PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
 395        PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
 396        PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
 397        PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
 398
 399        /* PE GPIO */
 400        PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT, PE5_IN_PU),
 401        PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT, PE4_IN_PU),
 402        PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT, PE3_IN_PU),
 403        PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT, PE2_IN_PU),
 404        PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT, PE1_IN_PU),
 405        PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT, PE0_IN_PU),
 406
 407        /* PF GPIO */
 408        PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
 409        PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
 410        PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
 411        PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
 412        PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
 413        PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
 414        PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
 415        PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
 416
 417        /* PG GPIO */
 418        PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
 419        PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
 420        PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
 421        PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT, PG4_IN_PU),
 422        PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT, PG3_IN_PU),
 423        PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT, PG2_IN_PU),
 424        PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT, PG1_IN_PU),
 425        PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT, PG0_IN_PU),
 426
 427        /* PH GPIO */
 428        PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT, PH7_IN_PU),
 429        PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT, PH6_IN_PU),
 430        PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
 431        PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
 432        PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
 433        PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
 434        PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
 435        PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
 436
 437        /* PJ GPIO */
 438        PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT, PJ7_IN_PU),
 439        PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT, PJ6_IN_PU),
 440        PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT, PJ5_IN_PU),
 441        PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT, PJ4_IN_PU),
 442        PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT, PJ3_IN_PU),
 443        PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT, PJ2_IN_PU),
 444        PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT, PJ1_IN_PU),
 445        PINMUX_DATA(PJ0_DATA, PJ0_IN, PJ0_OUT, PJ0_IN_PU),
 446
 447        /* PK GPIO */
 448        PINMUX_DATA(PK7_DATA, PK7_IN, PK7_OUT, PK7_IN_PU),
 449        PINMUX_DATA(PK6_DATA, PK6_IN, PK6_OUT, PK6_IN_PU),
 450        PINMUX_DATA(PK5_DATA, PK5_IN, PK5_OUT, PK5_IN_PU),
 451        PINMUX_DATA(PK4_DATA, PK4_IN, PK4_OUT, PK4_IN_PU),
 452        PINMUX_DATA(PK3_DATA, PK3_IN, PK3_OUT, PK3_IN_PU),
 453        PINMUX_DATA(PK2_DATA, PK2_IN, PK2_OUT, PK2_IN_PU),
 454        PINMUX_DATA(PK1_DATA, PK1_IN, PK1_OUT, PK1_IN_PU),
 455        PINMUX_DATA(PK0_DATA, PK0_IN, PK0_OUT, PK0_IN_PU),
 456
 457        /* PL GPIO */
 458        PINMUX_DATA(PL7_DATA, PL7_IN, PL7_OUT, PL7_IN_PU),
 459        PINMUX_DATA(PL6_DATA, PL6_IN, PL6_OUT, PL6_IN_PU),
 460        PINMUX_DATA(PL5_DATA, PL5_IN, PL5_OUT, PL5_IN_PU),
 461        PINMUX_DATA(PL4_DATA, PL4_IN, PL4_OUT, PL4_IN_PU),
 462        PINMUX_DATA(PL3_DATA, PL3_IN, PL3_OUT, PL3_IN_PU),
 463        PINMUX_DATA(PL2_DATA, PL2_IN, PL2_OUT, PL2_IN_PU),
 464        PINMUX_DATA(PL1_DATA, PL1_IN, PL1_OUT, PL1_IN_PU),
 465        PINMUX_DATA(PL0_DATA, PL0_IN, PL0_OUT, PL0_IN_PU),
 466
 467        /* PM GPIO */
 468        PINMUX_DATA(PM1_DATA, PM1_IN, PM1_OUT, PM1_IN_PU),
 469        PINMUX_DATA(PM0_DATA, PM0_IN, PM0_OUT, PM0_IN_PU),
 470
 471        /* PN GPIO */
 472        PINMUX_DATA(PN7_DATA, PN7_IN, PN7_OUT, PN7_IN_PU),
 473        PINMUX_DATA(PN6_DATA, PN6_IN, PN6_OUT, PN6_IN_PU),
 474        PINMUX_DATA(PN5_DATA, PN5_IN, PN5_OUT, PN5_IN_PU),
 475        PINMUX_DATA(PN4_DATA, PN4_IN, PN4_OUT, PN4_IN_PU),
 476        PINMUX_DATA(PN3_DATA, PN3_IN, PN3_OUT, PN3_IN_PU),
 477        PINMUX_DATA(PN2_DATA, PN2_IN, PN2_OUT, PN2_IN_PU),
 478        PINMUX_DATA(PN1_DATA, PN1_IN, PN1_OUT, PN1_IN_PU),
 479        PINMUX_DATA(PN0_DATA, PN0_IN, PN0_OUT, PN0_IN_PU),
 480
 481        /* PP GPIO */
 482        PINMUX_DATA(PP5_DATA, PP5_IN, PP5_OUT, PP5_IN_PU),
 483        PINMUX_DATA(PP4_DATA, PP4_IN, PP4_OUT, PP4_IN_PU),
 484        PINMUX_DATA(PP3_DATA, PP3_IN, PP3_OUT, PP3_IN_PU),
 485        PINMUX_DATA(PP2_DATA, PP2_IN, PP2_OUT, PP2_IN_PU),
 486        PINMUX_DATA(PP1_DATA, PP1_IN, PP1_OUT, PP1_IN_PU),
 487        PINMUX_DATA(PP0_DATA, PP0_IN, PP0_OUT, PP0_IN_PU),
 488
 489        /* PQ GPIO */
 490        PINMUX_DATA(PQ4_DATA, PQ4_IN, PQ4_OUT, PQ4_IN_PU),
 491        PINMUX_DATA(PQ3_DATA, PQ3_IN, PQ3_OUT, PQ3_IN_PU),
 492        PINMUX_DATA(PQ2_DATA, PQ2_IN, PQ2_OUT, PQ2_IN_PU),
 493        PINMUX_DATA(PQ1_DATA, PQ1_IN, PQ1_OUT, PQ1_IN_PU),
 494        PINMUX_DATA(PQ0_DATA, PQ0_IN, PQ0_OUT, PQ0_IN_PU),
 495
 496        /* PR GPIO */
 497        PINMUX_DATA(PR3_DATA, PR3_IN, PR3_OUT, PR3_IN_PU),
 498        PINMUX_DATA(PR2_DATA, PR2_IN, PR2_OUT, PR2_IN_PU),
 499        PINMUX_DATA(PR1_DATA, PR1_IN, PR1_OUT, PR1_IN_PU),
 500        PINMUX_DATA(PR0_DATA, PR0_IN, PR0_OUT, PR0_IN_PU),
 501
 502        /* PA FN */
 503        PINMUX_DATA(D63_AD31_MARK, PA7_FN),
 504        PINMUX_DATA(D62_AD30_MARK, PA6_FN),
 505        PINMUX_DATA(D61_AD29_MARK, PA5_FN),
 506        PINMUX_DATA(D60_AD28_MARK, PA4_FN),
 507        PINMUX_DATA(D59_AD27_MARK, PA3_FN),
 508        PINMUX_DATA(D58_AD26_MARK, PA2_FN),
 509        PINMUX_DATA(D57_AD25_MARK, PA1_FN),
 510        PINMUX_DATA(D56_AD24_MARK, PA0_FN),
 511
 512        /* PB FN */
 513        PINMUX_DATA(D55_AD23_MARK, PB7_FN),
 514        PINMUX_DATA(D54_AD22_MARK, PB6_FN),
 515        PINMUX_DATA(D53_AD21_MARK, PB5_FN),
 516        PINMUX_DATA(D52_AD20_MARK, PB4_FN),
 517        PINMUX_DATA(D51_AD19_MARK, PB3_FN),
 518        PINMUX_DATA(D50_AD18_MARK, PB2_FN),
 519        PINMUX_DATA(D49_AD17_DB5_MARK, PB1_FN),
 520        PINMUX_DATA(D48_AD16_DB4_MARK, PB0_FN),
 521
 522        /* PC FN */
 523        PINMUX_DATA(D47_AD15_DB3_MARK, PC7_FN),
 524        PINMUX_DATA(D46_AD14_DB2_MARK, PC6_FN),
 525        PINMUX_DATA(D45_AD13_DB1_MARK, PC5_FN),
 526        PINMUX_DATA(D44_AD12_DB0_MARK, PC4_FN),
 527        PINMUX_DATA(D43_AD11_DG5_MARK, PC3_FN),
 528        PINMUX_DATA(D42_AD10_DG4_MARK, PC2_FN),
 529        PINMUX_DATA(D41_AD9_DG3_MARK, PC1_FN),
 530        PINMUX_DATA(D40_AD8_DG2_MARK, PC0_FN),
 531
 532        /* PD FN */
 533        PINMUX_DATA(D39_AD7_DG1_MARK, PD7_FN),
 534        PINMUX_DATA(D38_AD6_DG0_MARK, PD6_FN),
 535        PINMUX_DATA(D37_AD5_DR5_MARK, PD5_FN),
 536        PINMUX_DATA(D36_AD4_DR4_MARK, PD4_FN),
 537        PINMUX_DATA(D35_AD3_DR3_MARK, PD3_FN),
 538        PINMUX_DATA(D34_AD2_DR2_MARK, PD2_FN),
 539        PINMUX_DATA(D33_AD1_DR1_MARK, PD1_FN),
 540        PINMUX_DATA(D32_AD0_DR0_MARK, PD0_FN),
 541
 542        /* PE FN */
 543        PINMUX_DATA(REQ1_MARK, PE5_FN),
 544        PINMUX_DATA(REQ2_MARK, PE4_FN),
 545        PINMUX_DATA(REQ3_MARK, P2MSEL0_0, PE3_FN),
 546        PINMUX_DATA(GNT1_MARK, PE2_FN),
 547        PINMUX_DATA(GNT2_MARK, PE1_FN),
 548        PINMUX_DATA(GNT3_MARK, P2MSEL0_0, PE0_FN),
 549        PINMUX_DATA(MMCCLK_MARK, P2MSEL0_1, PE0_FN),
 550
 551        /* PF FN */
 552        PINMUX_DATA(D31_MARK, PF7_FN),
 553        PINMUX_DATA(D30_MARK, PF6_FN),
 554        PINMUX_DATA(D29_MARK, PF5_FN),
 555        PINMUX_DATA(D28_MARK, PF4_FN),
 556        PINMUX_DATA(D27_MARK, PF3_FN),
 557        PINMUX_DATA(D26_MARK, PF2_FN),
 558        PINMUX_DATA(D25_MARK, PF1_FN),
 559        PINMUX_DATA(D24_MARK, PF0_FN),
 560
 561        /* PF FN */
 562        PINMUX_DATA(D23_MARK, PG7_FN),
 563        PINMUX_DATA(D22_MARK, PG6_FN),
 564        PINMUX_DATA(D21_MARK, PG5_FN),
 565        PINMUX_DATA(D20_MARK, PG4_FN),
 566        PINMUX_DATA(D19_MARK, PG3_FN),
 567        PINMUX_DATA(D18_MARK, PG2_FN),
 568        PINMUX_DATA(D17_MARK, PG1_FN),
 569        PINMUX_DATA(D16_MARK, PG0_FN),
 570
 571        /* PH FN */
 572        PINMUX_DATA(SCIF1_SCK_MARK, PH7_FN),
 573        PINMUX_DATA(SCIF1_RXD_MARK, PH6_FN),
 574        PINMUX_DATA(SCIF1_TXD_MARK, PH5_FN),
 575        PINMUX_DATA(SCIF0_CTS_MARK, PH4_FN),
 576        PINMUX_DATA(INTD_MARK, P1MSEL7_1, PH4_FN),
 577        PINMUX_DATA(FCE_MARK, P1MSEL8_1, P1MSEL7_0, PH4_FN),
 578        PINMUX_DATA(SCIF0_RTS_MARK, P1MSEL8_0, P1MSEL7_0, PH3_FN),
 579        PINMUX_DATA(HSPI_CS_MARK, P1MSEL8_0, P1MSEL7_1, PH3_FN),
 580        PINMUX_DATA(FSE_MARK, P1MSEL8_1, P1MSEL7_0, PH3_FN),
 581        PINMUX_DATA(SCIF0_SCK_MARK, P1MSEL8_0, P1MSEL7_0, PH2_FN),
 582        PINMUX_DATA(HSPI_CLK_MARK, P1MSEL8_0, P1MSEL7_1, PH2_FN),
 583        PINMUX_DATA(FRE_MARK, P1MSEL8_1, P1MSEL7_0, PH2_FN),
 584        PINMUX_DATA(SCIF0_RXD_MARK, P1MSEL8_0, P1MSEL7_0, PH1_FN),
 585        PINMUX_DATA(HSPI_RX_MARK, P1MSEL8_0, P1MSEL7_1, PH1_FN),
 586        PINMUX_DATA(FRB_MARK, P1MSEL8_1, P1MSEL7_0, PH1_FN),
 587        PINMUX_DATA(SCIF0_TXD_MARK, P1MSEL8_0, P1MSEL7_0, PH0_FN),
 588        PINMUX_DATA(HSPI_TX_MARK, P1MSEL8_0, P1MSEL7_1, PH0_FN),
 589        PINMUX_DATA(FWE_MARK, P1MSEL8_1, P1MSEL7_0, PH0_FN),
 590
 591        /* PJ FN */
 592        PINMUX_DATA(SCIF5_TXD_MARK, P1MSEL2_0, P1MSEL1_0, PJ7_FN),
 593        PINMUX_DATA(HAC1_SYNC_MARK, P1MSEL2_0, P1MSEL1_1, PJ7_FN),
 594        PINMUX_DATA(SSI1_WS_MARK, P1MSEL2_1, P1MSEL1_0, PJ7_FN),
 595        PINMUX_DATA(SIOF_TXD_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ6_FN),
 596        PINMUX_DATA(HAC0_SDOUT_MARK, P1MSEL4_0, P1MSEL3_1, PJ6_FN),
 597        PINMUX_DATA(SSI0_SDATA_MARK, P1MSEL4_1, P1MSEL3_0, PJ6_FN),
 598        PINMUX_DATA(SIOF_RXD_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ5_FN),
 599        PINMUX_DATA(HAC0_SDIN_MARK, P1MSEL4_0, P1MSEL3_1, PJ5_FN),
 600        PINMUX_DATA(SSI0_SCK_MARK, P1MSEL4_1, P1MSEL3_0, PJ5_FN),
 601        PINMUX_DATA(SIOF_SYNC_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ4_FN),
 602        PINMUX_DATA(HAC0_SYNC_MARK, P1MSEL4_0, P1MSEL3_1, PJ4_FN),
 603        PINMUX_DATA(SSI0_WS_MARK, P1MSEL4_1, P1MSEL3_0, PJ4_FN),
 604        PINMUX_DATA(SIOF_MCLK_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ3_FN),
 605        PINMUX_DATA(HAC_RES_MARK, P1MSEL4_0, P1MSEL3_1, PJ3_FN),
 606        PINMUX_DATA(SIOF_SCK_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ2_FN),
 607        PINMUX_DATA(HAC0_BITCLK_MARK, P1MSEL4_0, P1MSEL3_1, PJ2_FN),
 608        PINMUX_DATA(SSI0_CLK_MARK, P1MSEL4_1, P1MSEL3_0, PJ2_FN),
 609        PINMUX_DATA(HAC1_BITCLK_MARK, P1MSEL2_0, PJ1_FN),
 610        PINMUX_DATA(SSI1_CLK_MARK, P1MSEL2_1, P1MSEL1_0, PJ1_FN),
 611        PINMUX_DATA(TCLK_MARK, P1MSEL9_0, PJ0_FN),
 612        PINMUX_DATA(IOIS16_MARK, P1MSEL9_1, PJ0_FN),
 613
 614        /* PK FN */
 615        PINMUX_DATA(STATUS0_MARK, P1MSEL15_0, PK7_FN),
 616        PINMUX_DATA(DRAK0_PK3_MARK, P1MSEL15_1, PK7_FN),
 617        PINMUX_DATA(STATUS1_MARK, P1MSEL15_0, PK6_FN),
 618        PINMUX_DATA(DRAK1_PK2_MARK, P1MSEL15_1, PK6_FN),
 619        PINMUX_DATA(DACK2_MARK, P1MSEL12_0, P1MSEL11_0, PK5_FN),
 620        PINMUX_DATA(SCIF2_TXD_MARK, P1MSEL12_1, P1MSEL11_0, PK5_FN),
 621        PINMUX_DATA(MMCCMD_MARK, P1MSEL12_1, P1MSEL11_1, PK5_FN),
 622        PINMUX_DATA(SIOF_TXD_PK_MARK, P2MSEL1_1,
 623                    P1MSEL12_0, P1MSEL11_1, PK5_FN),
 624        PINMUX_DATA(DACK3_MARK, P1MSEL12_0, P1MSEL11_0, PK4_FN),
 625        PINMUX_DATA(SCIF2_SCK_MARK, P1MSEL12_1, P1MSEL11_0, PK4_FN),
 626        PINMUX_DATA(MMCDAT_MARK, P1MSEL12_1, P1MSEL11_1, PK4_FN),
 627        PINMUX_DATA(SIOF_SCK_PK_MARK, P2MSEL1_1,
 628                    P1MSEL12_0, P1MSEL11_1, PK4_FN),
 629        PINMUX_DATA(DREQ0_MARK, PK3_FN),
 630        PINMUX_DATA(DREQ1_MARK, PK2_FN),
 631        PINMUX_DATA(DRAK0_PK1_MARK, PK1_FN),
 632        PINMUX_DATA(DRAK1_PK0_MARK, PK0_FN),
 633
 634        /* PL FN */
 635        PINMUX_DATA(DREQ2_MARK, P1MSEL13_0, PL7_FN),
 636        PINMUX_DATA(INTB_MARK, P1MSEL13_1, PL7_FN),
 637        PINMUX_DATA(DREQ3_MARK, P1MSEL13_0, PL6_FN),
 638        PINMUX_DATA(INTC_MARK, P1MSEL13_1, PL6_FN),
 639        PINMUX_DATA(DRAK2_MARK, P1MSEL10_0, PL5_FN),
 640        PINMUX_DATA(CE2A_MARK, P1MSEL10_1, PL5_FN),
 641        PINMUX_DATA(IRL4_MARK, P1MSEL14_0, PL4_FN),
 642        PINMUX_DATA(FD4_MARK, P1MSEL14_1, PL4_FN),
 643        PINMUX_DATA(IRL5_MARK, P1MSEL14_0, PL3_FN),
 644        PINMUX_DATA(FD5_MARK, P1MSEL14_1, PL3_FN),
 645        PINMUX_DATA(IRL6_MARK, P1MSEL14_0, PL2_FN),
 646        PINMUX_DATA(FD6_MARK, P1MSEL14_1, PL2_FN),
 647        PINMUX_DATA(IRL7_MARK, P1MSEL14_0, PL1_FN),
 648        PINMUX_DATA(FD7_MARK, P1MSEL14_1, PL1_FN),
 649        PINMUX_DATA(DRAK3_MARK, P1MSEL10_0, PL0_FN),
 650        PINMUX_DATA(CE2B_MARK, P1MSEL10_1, PL0_FN),
 651
 652        /* PM FN */
 653        PINMUX_DATA(BREQ_BSACK_MARK, PM1_FN),
 654        PINMUX_DATA(BACK_BSREQ_MARK, PM0_FN),
 655
 656        /* PN FN */
 657        PINMUX_DATA(SCIF5_RXD_MARK, P1MSEL2_0, P1MSEL1_0, PN7_FN),
 658        PINMUX_DATA(HAC1_SDIN_MARK, P1MSEL2_0, P1MSEL1_1, PN7_FN),
 659        PINMUX_DATA(SSI1_SCK_MARK, P1MSEL2_1, P1MSEL1_0, PN7_FN),
 660        PINMUX_DATA(SCIF5_SCK_MARK, P1MSEL2_0, P1MSEL1_0, PN6_FN),
 661        PINMUX_DATA(HAC1_SDOUT_MARK, P1MSEL2_0, P1MSEL1_1, PN6_FN),
 662        PINMUX_DATA(SSI1_SDATA_MARK, P1MSEL2_1, P1MSEL1_0, PN6_FN),
 663        PINMUX_DATA(SCIF3_TXD_MARK, P1MSEL0_0, PN5_FN),
 664        PINMUX_DATA(FCLE_MARK, P1MSEL0_1, PN5_FN),
 665        PINMUX_DATA(SCIF3_RXD_MARK, P1MSEL0_0, PN4_FN),
 666        PINMUX_DATA(FALE_MARK, P1MSEL0_1, PN4_FN),
 667        PINMUX_DATA(SCIF3_SCK_MARK, P1MSEL0_0, PN3_FN),
 668        PINMUX_DATA(FD0_MARK, P1MSEL0_1, PN3_FN),
 669        PINMUX_DATA(SCIF4_TXD_MARK, P1MSEL0_0, PN2_FN),
 670        PINMUX_DATA(FD1_MARK, P1MSEL0_1, PN2_FN),
 671        PINMUX_DATA(SCIF4_RXD_MARK, P1MSEL0_0, PN1_FN),
 672        PINMUX_DATA(FD2_MARK, P1MSEL0_1, PN1_FN),
 673        PINMUX_DATA(SCIF4_SCK_MARK, P1MSEL0_0, PN0_FN),
 674        PINMUX_DATA(FD3_MARK, P1MSEL0_1, PN0_FN),
 675
 676        /* PP FN */
 677        PINMUX_DATA(DEVSEL_DCLKOUT_MARK, PP5_FN),
 678        PINMUX_DATA(STOP_CDE_MARK, PP4_FN),
 679        PINMUX_DATA(LOCK_ODDF_MARK, PP3_FN),
 680        PINMUX_DATA(TRDY_DISPL_MARK, PP2_FN),
 681        PINMUX_DATA(IRDY_HSYNC_MARK, PP1_FN),
 682        PINMUX_DATA(PCIFRAME_VSYNC_MARK, PP0_FN),
 683
 684        /* PQ FN */
 685        PINMUX_DATA(INTA_MARK, PQ4_FN),
 686        PINMUX_DATA(GNT0_GNTIN_MARK, PQ3_FN),
 687        PINMUX_DATA(REQ0_REQOUT_MARK, PQ2_FN),
 688        PINMUX_DATA(PERR_MARK, PQ1_FN),
 689        PINMUX_DATA(SERR_MARK, PQ0_FN),
 690
 691        /* PR FN */
 692        PINMUX_DATA(WE7_CBE3_MARK, PR3_FN),
 693        PINMUX_DATA(WE6_CBE2_MARK, PR2_FN),
 694        PINMUX_DATA(WE5_CBE1_MARK, PR1_FN),
 695        PINMUX_DATA(WE4_CBE0_MARK, PR0_FN),
 696
 697        /* MISC FN */
 698        PINMUX_DATA(SCIF2_RXD_MARK, P1MSEL6_0, P1MSEL5_0),
 699        PINMUX_DATA(SIOF_RXD_MARK, P2MSEL1_1, P1MSEL6_1, P1MSEL5_0),
 700        PINMUX_DATA(MRESETOUT_MARK, P2MSEL2_0),
 701        PINMUX_DATA(IRQOUT_MARK, P2MSEL2_1),
 702};
 703
 704static struct pinmux_gpio pinmux_gpios[] = {
 705        /* PA */
 706        PINMUX_GPIO(GPIO_PA7, PA7_DATA),
 707        PINMUX_GPIO(GPIO_PA6, PA6_DATA),
 708        PINMUX_GPIO(GPIO_PA5, PA5_DATA),
 709        PINMUX_GPIO(GPIO_PA4, PA4_DATA),
 710        PINMUX_GPIO(GPIO_PA3, PA3_DATA),
 711        PINMUX_GPIO(GPIO_PA2, PA2_DATA),
 712        PINMUX_GPIO(GPIO_PA1, PA1_DATA),
 713        PINMUX_GPIO(GPIO_PA0, PA0_DATA),
 714
 715        /* PB */
 716        PINMUX_GPIO(GPIO_PB7, PB7_DATA),
 717        PINMUX_GPIO(GPIO_PB6, PB6_DATA),
 718        PINMUX_GPIO(GPIO_PB5, PB5_DATA),
 719        PINMUX_GPIO(GPIO_PB4, PB4_DATA),
 720        PINMUX_GPIO(GPIO_PB3, PB3_DATA),
 721        PINMUX_GPIO(GPIO_PB2, PB2_DATA),
 722        PINMUX_GPIO(GPIO_PB1, PB1_DATA),
 723        PINMUX_GPIO(GPIO_PB0, PB0_DATA),
 724
 725        /* PC */
 726        PINMUX_GPIO(GPIO_PC7, PC7_DATA),
 727        PINMUX_GPIO(GPIO_PC6, PC6_DATA),
 728        PINMUX_GPIO(GPIO_PC5, PC5_DATA),
 729        PINMUX_GPIO(GPIO_PC4, PC4_DATA),
 730        PINMUX_GPIO(GPIO_PC3, PC3_DATA),
 731        PINMUX_GPIO(GPIO_PC2, PC2_DATA),
 732        PINMUX_GPIO(GPIO_PC1, PC1_DATA),
 733        PINMUX_GPIO(GPIO_PC0, PC0_DATA),
 734
 735        /* PD */
 736        PINMUX_GPIO(GPIO_PD7, PD7_DATA),
 737        PINMUX_GPIO(GPIO_PD6, PD6_DATA),
 738        PINMUX_GPIO(GPIO_PD5, PD5_DATA),
 739        PINMUX_GPIO(GPIO_PD4, PD4_DATA),
 740        PINMUX_GPIO(GPIO_PD3, PD3_DATA),
 741        PINMUX_GPIO(GPIO_PD2, PD2_DATA),
 742        PINMUX_GPIO(GPIO_PD1, PD1_DATA),
 743        PINMUX_GPIO(GPIO_PD0, PD0_DATA),
 744
 745        /* PE */
 746        PINMUX_GPIO(GPIO_PE5, PE5_DATA),
 747        PINMUX_GPIO(GPIO_PE4, PE4_DATA),
 748        PINMUX_GPIO(GPIO_PE3, PE3_DATA),
 749        PINMUX_GPIO(GPIO_PE2, PE2_DATA),
 750        PINMUX_GPIO(GPIO_PE1, PE1_DATA),
 751        PINMUX_GPIO(GPIO_PE0, PE0_DATA),
 752
 753        /* PF */
 754        PINMUX_GPIO(GPIO_PF7, PF7_DATA),
 755        PINMUX_GPIO(GPIO_PF6, PF6_DATA),
 756        PINMUX_GPIO(GPIO_PF5, PF5_DATA),
 757        PINMUX_GPIO(GPIO_PF4, PF4_DATA),
 758        PINMUX_GPIO(GPIO_PF3, PF3_DATA),
 759        PINMUX_GPIO(GPIO_PF2, PF2_DATA),
 760        PINMUX_GPIO(GPIO_PF1, PF1_DATA),
 761        PINMUX_GPIO(GPIO_PF0, PF0_DATA),
 762
 763        /* PG */
 764        PINMUX_GPIO(GPIO_PG7, PG7_DATA),
 765        PINMUX_GPIO(GPIO_PG6, PG6_DATA),
 766        PINMUX_GPIO(GPIO_PG5, PG5_DATA),
 767        PINMUX_GPIO(GPIO_PG4, PG4_DATA),
 768        PINMUX_GPIO(GPIO_PG3, PG3_DATA),
 769        PINMUX_GPIO(GPIO_PG2, PG2_DATA),
 770        PINMUX_GPIO(GPIO_PG1, PG1_DATA),
 771        PINMUX_GPIO(GPIO_PG0, PG0_DATA),
 772
 773        /* PH */
 774        PINMUX_GPIO(GPIO_PH7, PH7_DATA),
 775        PINMUX_GPIO(GPIO_PH6, PH6_DATA),
 776        PINMUX_GPIO(GPIO_PH5, PH5_DATA),
 777        PINMUX_GPIO(GPIO_PH4, PH4_DATA),
 778        PINMUX_GPIO(GPIO_PH3, PH3_DATA),
 779        PINMUX_GPIO(GPIO_PH2, PH2_DATA),
 780        PINMUX_GPIO(GPIO_PH1, PH1_DATA),
 781        PINMUX_GPIO(GPIO_PH0, PH0_DATA),
 782
 783        /* PJ */
 784        PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
 785        PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
 786        PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
 787        PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
 788        PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
 789        PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
 790        PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
 791        PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),
 792
 793        /* PK */
 794        PINMUX_GPIO(GPIO_PK7, PK7_DATA),
 795        PINMUX_GPIO(GPIO_PK6, PK6_DATA),
 796        PINMUX_GPIO(GPIO_PK5, PK5_DATA),
 797        PINMUX_GPIO(GPIO_PK4, PK4_DATA),
 798        PINMUX_GPIO(GPIO_PK3, PK3_DATA),
 799        PINMUX_GPIO(GPIO_PK2, PK2_DATA),
 800        PINMUX_GPIO(GPIO_PK1, PK1_DATA),
 801        PINMUX_GPIO(GPIO_PK0, PK0_DATA),
 802
 803        /* PL */
 804        PINMUX_GPIO(GPIO_PL7, PL7_DATA),
 805        PINMUX_GPIO(GPIO_PL6, PL6_DATA),
 806        PINMUX_GPIO(GPIO_PL5, PL5_DATA),
 807        PINMUX_GPIO(GPIO_PL4, PL4_DATA),
 808        PINMUX_GPIO(GPIO_PL3, PL3_DATA),
 809        PINMUX_GPIO(GPIO_PL2, PL2_DATA),
 810        PINMUX_GPIO(GPIO_PL1, PL1_DATA),
 811        PINMUX_GPIO(GPIO_PL0, PL0_DATA),
 812
 813        /* PM */
 814        PINMUX_GPIO(GPIO_PM1, PM1_DATA),
 815        PINMUX_GPIO(GPIO_PM0, PM0_DATA),
 816
 817        /* PN */
 818        PINMUX_GPIO(GPIO_PN7, PN7_DATA),
 819        PINMUX_GPIO(GPIO_PN6, PN6_DATA),
 820        PINMUX_GPIO(GPIO_PN5, PN5_DATA),
 821        PINMUX_GPIO(GPIO_PN4, PN4_DATA),
 822        PINMUX_GPIO(GPIO_PN3, PN3_DATA),
 823        PINMUX_GPIO(GPIO_PN2, PN2_DATA),
 824        PINMUX_GPIO(GPIO_PN1, PN1_DATA),
 825        PINMUX_GPIO(GPIO_PN0, PN0_DATA),
 826
 827        /* PP */
 828        PINMUX_GPIO(GPIO_PP5, PP5_DATA),
 829        PINMUX_GPIO(GPIO_PP4, PP4_DATA),
 830        PINMUX_GPIO(GPIO_PP3, PP3_DATA),
 831        PINMUX_GPIO(GPIO_PP2, PP2_DATA),
 832        PINMUX_GPIO(GPIO_PP1, PP1_DATA),
 833        PINMUX_GPIO(GPIO_PP0, PP0_DATA),
 834
 835        /* PQ */
 836        PINMUX_GPIO(GPIO_PQ4, PQ4_DATA),
 837        PINMUX_GPIO(GPIO_PQ3, PQ3_DATA),
 838        PINMUX_GPIO(GPIO_PQ2, PQ2_DATA),
 839        PINMUX_GPIO(GPIO_PQ1, PQ1_DATA),
 840        PINMUX_GPIO(GPIO_PQ0, PQ0_DATA),
 841
 842        /* PR */
 843        PINMUX_GPIO(GPIO_PR3, PR3_DATA),
 844        PINMUX_GPIO(GPIO_PR2, PR2_DATA),
 845        PINMUX_GPIO(GPIO_PR1, PR1_DATA),
 846        PINMUX_GPIO(GPIO_PR0, PR0_DATA),
 847
 848        /* FN */
 849        PINMUX_GPIO(GPIO_FN_D63_AD31, D63_AD31_MARK),
 850        PINMUX_GPIO(GPIO_FN_D62_AD30, D62_AD30_MARK),
 851        PINMUX_GPIO(GPIO_FN_D61_AD29, D61_AD29_MARK),
 852        PINMUX_GPIO(GPIO_FN_D60_AD28, D60_AD28_MARK),
 853        PINMUX_GPIO(GPIO_FN_D59_AD27, D59_AD27_MARK),
 854        PINMUX_GPIO(GPIO_FN_D58_AD26, D58_AD26_MARK),
 855        PINMUX_GPIO(GPIO_FN_D57_AD25, D57_AD25_MARK),
 856        PINMUX_GPIO(GPIO_FN_D56_AD24, D56_AD24_MARK),
 857        PINMUX_GPIO(GPIO_FN_D55_AD23, D55_AD23_MARK),
 858        PINMUX_GPIO(GPIO_FN_D54_AD22, D54_AD22_MARK),
 859        PINMUX_GPIO(GPIO_FN_D53_AD21, D53_AD21_MARK),
 860        PINMUX_GPIO(GPIO_FN_D52_AD20, D52_AD20_MARK),
 861        PINMUX_GPIO(GPIO_FN_D51_AD19, D51_AD19_MARK),
 862        PINMUX_GPIO(GPIO_FN_D50_AD18, D50_AD18_MARK),
 863        PINMUX_GPIO(GPIO_FN_D49_AD17_DB5, D49_AD17_DB5_MARK),
 864        PINMUX_GPIO(GPIO_FN_D48_AD16_DB4, D48_AD16_DB4_MARK),
 865        PINMUX_GPIO(GPIO_FN_D47_AD15_DB3, D47_AD15_DB3_MARK),
 866        PINMUX_GPIO(GPIO_FN_D46_AD14_DB2, D46_AD14_DB2_MARK),
 867        PINMUX_GPIO(GPIO_FN_D45_AD13_DB1, D45_AD13_DB1_MARK),
 868        PINMUX_GPIO(GPIO_FN_D44_AD12_DB0, D44_AD12_DB0_MARK),
 869        PINMUX_GPIO(GPIO_FN_D43_AD11_DG5, D43_AD11_DG5_MARK),
 870        PINMUX_GPIO(GPIO_FN_D42_AD10_DG4, D42_AD10_DG4_MARK),
 871        PINMUX_GPIO(GPIO_FN_D41_AD9_DG3, D41_AD9_DG3_MARK),
 872        PINMUX_GPIO(GPIO_FN_D40_AD8_DG2, D40_AD8_DG2_MARK),
 873        PINMUX_GPIO(GPIO_FN_D39_AD7_DG1, D39_AD7_DG1_MARK),
 874        PINMUX_GPIO(GPIO_FN_D38_AD6_DG0, D38_AD6_DG0_MARK),
 875        PINMUX_GPIO(GPIO_FN_D37_AD5_DR5, D37_AD5_DR5_MARK),
 876        PINMUX_GPIO(GPIO_FN_D36_AD4_DR4, D36_AD4_DR4_MARK),
 877        PINMUX_GPIO(GPIO_FN_D35_AD3_DR3, D35_AD3_DR3_MARK),
 878        PINMUX_GPIO(GPIO_FN_D34_AD2_DR2, D34_AD2_DR2_MARK),
 879        PINMUX_GPIO(GPIO_FN_D33_AD1_DR1, D33_AD1_DR1_MARK),
 880        PINMUX_GPIO(GPIO_FN_D32_AD0_DR0, D32_AD0_DR0_MARK),
 881        PINMUX_GPIO(GPIO_FN_REQ1, REQ1_MARK),
 882        PINMUX_GPIO(GPIO_FN_REQ2, REQ2_MARK),
 883        PINMUX_GPIO(GPIO_FN_REQ3, REQ3_MARK),
 884        PINMUX_GPIO(GPIO_FN_GNT1, GNT1_MARK),
 885        PINMUX_GPIO(GPIO_FN_GNT2, GNT2_MARK),
 886        PINMUX_GPIO(GPIO_FN_GNT3, GNT3_MARK),
 887        PINMUX_GPIO(GPIO_FN_MMCCLK, MMCCLK_MARK),
 888        PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
 889        PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
 890        PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
 891        PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
 892        PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
 893        PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
 894        PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
 895        PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
 896        PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
 897        PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
 898        PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
 899        PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
 900        PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
 901        PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
 902        PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
 903        PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
 904        PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
 905        PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
 906        PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
 907        PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
 908        PINMUX_GPIO(GPIO_FN_INTD, INTD_MARK),
 909        PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
 910        PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
 911        PINMUX_GPIO(GPIO_FN_HSPI_CS, HSPI_CS_MARK),
 912        PINMUX_GPIO(GPIO_FN_FSE, FSE_MARK),
 913        PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
 914        PINMUX_GPIO(GPIO_FN_HSPI_CLK, HSPI_CLK_MARK),
 915        PINMUX_GPIO(GPIO_FN_FRE, FRE_MARK),
 916        PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
 917        PINMUX_GPIO(GPIO_FN_HSPI_RX, HSPI_RX_MARK),
 918        PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
 919        PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
 920        PINMUX_GPIO(GPIO_FN_HSPI_TX, HSPI_TX_MARK),
 921        PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
 922        PINMUX_GPIO(GPIO_FN_SCIF5_TXD, SCIF5_TXD_MARK),
 923        PINMUX_GPIO(GPIO_FN_HAC1_SYNC, HAC1_SYNC_MARK),
 924        PINMUX_GPIO(GPIO_FN_SSI1_WS, SSI1_WS_MARK),
 925        PINMUX_GPIO(GPIO_FN_SIOF_TXD_PJ, SIOF_TXD_PJ_MARK),
 926        PINMUX_GPIO(GPIO_FN_HAC0_SDOUT, HAC0_SDOUT_MARK),
 927        PINMUX_GPIO(GPIO_FN_SSI0_SDATA, SSI0_SDATA_MARK),
 928        PINMUX_GPIO(GPIO_FN_SIOF_RXD_PJ, SIOF_RXD_PJ_MARK),
 929        PINMUX_GPIO(GPIO_FN_HAC0_SDIN, HAC0_SDIN_MARK),
 930        PINMUX_GPIO(GPIO_FN_SSI0_SCK, SSI0_SCK_MARK),
 931        PINMUX_GPIO(GPIO_FN_SIOF_SYNC_PJ, SIOF_SYNC_PJ_MARK),
 932        PINMUX_GPIO(GPIO_FN_HAC0_SYNC, HAC0_SYNC_MARK),
 933        PINMUX_GPIO(GPIO_FN_SSI0_WS, SSI0_WS_MARK),
 934        PINMUX_GPIO(GPIO_FN_SIOF_MCLK_PJ, SIOF_MCLK_PJ_MARK),
 935        PINMUX_GPIO(GPIO_FN_HAC_RES, HAC_RES_MARK),
 936        PINMUX_GPIO(GPIO_FN_SIOF_SCK_PJ, SIOF_SCK_PJ_MARK),
 937        PINMUX_GPIO(GPIO_FN_HAC0_BITCLK, HAC0_BITCLK_MARK),
 938        PINMUX_GPIO(GPIO_FN_SSI0_CLK, SSI0_CLK_MARK),
 939        PINMUX_GPIO(GPIO_FN_HAC1_BITCLK, HAC1_BITCLK_MARK),
 940        PINMUX_GPIO(GPIO_FN_SSI1_CLK, SSI1_CLK_MARK),
 941        PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
 942        PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
 943        PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
 944        PINMUX_GPIO(GPIO_FN_DRAK0_PK3, DRAK0_PK3_MARK),
 945        PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
 946        PINMUX_GPIO(GPIO_FN_DRAK1_PK2, DRAK1_PK2_MARK),
 947        PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
 948        PINMUX_GPIO(GPIO_FN_SCIF2_TXD, SCIF2_TXD_MARK),
 949        PINMUX_GPIO(GPIO_FN_MMCCMD, MMCCMD_MARK),
 950        PINMUX_GPIO(GPIO_FN_SIOF_TXD_PK, SIOF_TXD_PK_MARK),
 951        PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
 952        PINMUX_GPIO(GPIO_FN_SCIF2_SCK, SCIF2_SCK_MARK),
 953        PINMUX_GPIO(GPIO_FN_MMCDAT, MMCDAT_MARK),
 954        PINMUX_GPIO(GPIO_FN_SIOF_SCK_PK, SIOF_SCK_PK_MARK),
 955        PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
 956        PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
 957        PINMUX_GPIO(GPIO_FN_DRAK0_PK1, DRAK0_PK1_MARK),
 958        PINMUX_GPIO(GPIO_FN_DRAK1_PK0, DRAK1_PK0_MARK),
 959        PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
 960        PINMUX_GPIO(GPIO_FN_INTB, INTB_MARK),
 961        PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
 962        PINMUX_GPIO(GPIO_FN_INTC, INTC_MARK),
 963        PINMUX_GPIO(GPIO_FN_DRAK2, DRAK2_MARK),
 964        PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
 965        PINMUX_GPIO(GPIO_FN_IRL4, IRL4_MARK),
 966        PINMUX_GPIO(GPIO_FN_FD4, FD4_MARK),
 967        PINMUX_GPIO(GPIO_FN_IRL5, IRL5_MARK),
 968        PINMUX_GPIO(GPIO_FN_FD5, FD5_MARK),
 969        PINMUX_GPIO(GPIO_FN_IRL6, IRL6_MARK),
 970        PINMUX_GPIO(GPIO_FN_FD6, FD6_MARK),
 971        PINMUX_GPIO(GPIO_FN_IRL7, IRL7_MARK),
 972        PINMUX_GPIO(GPIO_FN_FD7, FD7_MARK),
 973        PINMUX_GPIO(GPIO_FN_DRAK3, DRAK3_MARK),
 974        PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
 975        PINMUX_GPIO(GPIO_FN_BREQ_BSACK, BREQ_BSACK_MARK),
 976        PINMUX_GPIO(GPIO_FN_BACK_BSREQ, BACK_BSREQ_MARK),
 977        PINMUX_GPIO(GPIO_FN_SCIF5_RXD, SCIF5_RXD_MARK),
 978        PINMUX_GPIO(GPIO_FN_HAC1_SDIN, HAC1_SDIN_MARK),
 979        PINMUX_GPIO(GPIO_FN_SSI1_SCK, SSI1_SCK_MARK),
 980        PINMUX_GPIO(GPIO_FN_SCIF5_SCK, SCIF5_SCK_MARK),
 981        PINMUX_GPIO(GPIO_FN_HAC1_SDOUT, HAC1_SDOUT_MARK),
 982        PINMUX_GPIO(GPIO_FN_SSI1_SDATA, SSI1_SDATA_MARK),
 983        PINMUX_GPIO(GPIO_FN_SCIF3_TXD, SCIF3_TXD_MARK),
 984        PINMUX_GPIO(GPIO_FN_FCLE, FCLE_MARK),
 985        PINMUX_GPIO(GPIO_FN_SCIF3_RXD, SCIF3_RXD_MARK),
 986        PINMUX_GPIO(GPIO_FN_FALE, FALE_MARK),
 987        PINMUX_GPIO(GPIO_FN_SCIF3_SCK, SCIF3_SCK_MARK),
 988        PINMUX_GPIO(GPIO_FN_FD0, FD0_MARK),
 989        PINMUX_GPIO(GPIO_FN_SCIF4_TXD, SCIF4_TXD_MARK),
 990        PINMUX_GPIO(GPIO_FN_FD1, FD1_MARK),
 991        PINMUX_GPIO(GPIO_FN_SCIF4_RXD, SCIF4_RXD_MARK),
 992        PINMUX_GPIO(GPIO_FN_FD2, FD2_MARK),
 993        PINMUX_GPIO(GPIO_FN_SCIF4_SCK, SCIF4_SCK_MARK),
 994        PINMUX_GPIO(GPIO_FN_FD3, FD3_MARK),
 995        PINMUX_GPIO(GPIO_FN_DEVSEL_DCLKOUT, DEVSEL_DCLKOUT_MARK),
 996        PINMUX_GPIO(GPIO_FN_STOP_CDE, STOP_CDE_MARK),
 997        PINMUX_GPIO(GPIO_FN_LOCK_ODDF, LOCK_ODDF_MARK),
 998        PINMUX_GPIO(GPIO_FN_TRDY_DISPL, TRDY_DISPL_MARK),
 999        PINMUX_GPIO(GPIO_FN_IRDY_HSYNC, IRDY_HSYNC_MARK),
1000        PINMUX_GPIO(GPIO_FN_PCIFRAME_VSYNC, PCIFRAME_VSYNC_MARK),
1001        PINMUX_GPIO(GPIO_FN_INTA, INTA_MARK),
1002        PINMUX_GPIO(GPIO_FN_GNT0_GNTIN, GNT0_GNTIN_MARK),
1003        PINMUX_GPIO(GPIO_FN_REQ0_REQOUT, REQ0_REQOUT_MARK),
1004        PINMUX_GPIO(GPIO_FN_PERR, PERR_MARK),
1005        PINMUX_GPIO(GPIO_FN_SERR, SERR_MARK),
1006        PINMUX_GPIO(GPIO_FN_WE7_CBE3, WE7_CBE3_MARK),
1007        PINMUX_GPIO(GPIO_FN_WE6_CBE2, WE6_CBE2_MARK),
1008        PINMUX_GPIO(GPIO_FN_WE5_CBE1, WE5_CBE1_MARK),
1009        PINMUX_GPIO(GPIO_FN_WE4_CBE0, WE4_CBE0_MARK),
1010        PINMUX_GPIO(GPIO_FN_SCIF2_RXD, SCIF2_RXD_MARK),
1011        PINMUX_GPIO(GPIO_FN_SIOF_RXD, SIOF_RXD_MARK),
1012        PINMUX_GPIO(GPIO_FN_MRESETOUT, MRESETOUT_MARK),
1013        PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
1014};
1015
1016static struct pinmux_cfg_reg pinmux_config_regs[] = {
1017        { PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2) {
1018                PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
1019                PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
1020                PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
1021                PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
1022                PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
1023                PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
1024                PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
1025                PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU }
1026        },
1027        { PINMUX_CFG_REG("PBCR", 0xffe70002, 16, 2) {
1028                PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
1029                PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
1030                PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
1031                PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
1032                PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
1033                PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
1034                PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
1035                PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU }
1036        },
1037        { PINMUX_CFG_REG("PCCR", 0xffe70004, 16, 2) {
1038                PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
1039                PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
1040                PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
1041                PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
1042                PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
1043                PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
1044                PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
1045                PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU }
1046        },
1047        { PINMUX_CFG_REG("PDCR", 0xffe70006, 16, 2) {
1048                PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
1049                PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
1050                PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
1051                PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
1052                PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
1053                PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
1054                PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
1055                PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU }
1056        },
1057        { PINMUX_CFG_REG("PECR", 0xffe70008, 16, 2) {
1058                0, 0, 0, 0,
1059                0, 0, 0, 0,
1060                PE5_FN, PE5_OUT, PE5_IN, PE5_IN_PU,
1061                PE4_FN, PE4_OUT, PE4_IN, PE4_IN_PU,
1062                PE3_FN, PE3_OUT, PE3_IN, PE3_IN_PU,
1063                PE2_FN, PE2_OUT, PE2_IN, PE2_IN_PU,
1064                PE1_FN, PE1_OUT, PE1_IN, PE1_IN_PU,
1065                PE0_FN, PE0_OUT, PE0_IN, PE0_IN_PU }
1066        },
1067        { PINMUX_CFG_REG("PFCR", 0xffe7000a, 16, 2) {
1068                PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
1069                PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
1070                PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
1071                PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
1072                PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
1073                PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
1074                PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
1075                PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU }
1076        },
1077        { PINMUX_CFG_REG("PGCR", 0xffe7000c, 16, 2) {
1078                PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
1079                PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
1080                PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
1081                PG4_FN, PG4_OUT, PG4_IN, PG4_IN_PU,
1082                PG3_FN, PG3_OUT, PG3_IN, PG3_IN_PU,
1083                PG2_FN, PG2_OUT, PG2_IN, PG2_IN_PU,
1084                PG1_FN, PG1_OUT, PG1_IN, PG1_IN_PU,
1085                PG0_FN, PG0_OUT, PG0_IN, PG0_IN_PU }
1086        },
1087        { PINMUX_CFG_REG("PHCR", 0xffe7000e, 16, 2) {
1088                PH7_FN, PH7_OUT, PH7_IN, PH7_IN_PU,
1089                PH6_FN, PH6_OUT, PH6_IN, PH6_IN_PU,
1090                PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
1091                PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
1092                PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
1093                PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
1094                PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
1095                PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU }
1096        },
1097        { PINMUX_CFG_REG("PJCR", 0xffe70010, 16, 2) {
1098                PJ7_FN, PJ7_OUT, PJ7_IN, PJ7_IN_PU,
1099                PJ6_FN, PJ6_OUT, PJ6_IN, PJ6_IN_PU,
1100                PJ5_FN, PJ5_OUT, PJ5_IN, PJ5_IN_PU,
1101                PJ4_FN, PJ4_OUT, PJ4_IN, PJ4_IN_PU,
1102                PJ3_FN, PJ3_OUT, PJ3_IN, PJ3_IN_PU,
1103                PJ2_FN, PJ2_OUT, PJ2_IN, PJ2_IN_PU,
1104                PJ1_FN, PJ1_OUT, PJ1_IN, PJ1_IN_PU,
1105                PJ0_FN, PJ0_OUT, PJ0_IN, PJ0_IN_PU }
1106        },
1107        { PINMUX_CFG_REG("PKCR", 0xffe70012, 16, 2) {
1108                PK7_FN, PK7_OUT, PK7_IN, PK7_IN_PU,
1109                PK6_FN, PK6_OUT, PK6_IN, PK6_IN_PU,
1110                PK5_FN, PK5_OUT, PK5_IN, PK5_IN_PU,
1111                PK4_FN, PK4_OUT, PK4_IN, PK4_IN_PU,
1112                PK3_FN, PK3_OUT, PK3_IN, PK3_IN_PU,
1113                PK2_FN, PK2_OUT, PK2_IN, PK2_IN_PU,
1114                PK1_FN, PK1_OUT, PK1_IN, PK1_IN_PU,
1115                PK0_FN, PK0_OUT, PK0_IN, PK0_IN_PU }
1116        },
1117        { PINMUX_CFG_REG("PLCR", 0xffe70014, 16, 2) {
1118                PL7_FN, PL7_OUT, PL7_IN, PL7_IN_PU,
1119                PL6_FN, PL6_OUT, PL6_IN, PL6_IN_PU,
1120                PL5_FN, PL5_OUT, PL5_IN, PL5_IN_PU,
1121                PL4_FN, PL4_OUT, PL4_IN, PL4_IN_PU,
1122                PL3_FN, PL3_OUT, PL3_IN, PL3_IN_PU,
1123                PL2_FN, PL2_OUT, PL2_IN, PL2_IN_PU,
1124                PL1_FN, PL1_OUT, PL1_IN, PL1_IN_PU,
1125                PL0_FN, PL0_OUT, PL0_IN, PL0_IN_PU }
1126        },
1127        { PINMUX_CFG_REG("PMCR", 0xffe70016, 16, 2) {
1128                0, 0, 0, 0,
1129                0, 0, 0, 0,
1130                0, 0, 0, 0,
1131                0, 0, 0, 0,
1132                0, 0, 0, 0,
1133                0, 0, 0, 0,
1134                PM1_FN, PM1_OUT, PM1_IN, PM1_IN_PU,
1135                PM0_FN, PM0_OUT, PM0_IN, PM0_IN_PU }
1136        },
1137        { PINMUX_CFG_REG("PNCR", 0xffe70018, 16, 2) {
1138                PN7_FN, PN7_OUT, PN7_IN, PN7_IN_PU,
1139                PN6_FN, PN6_OUT, PN6_IN, PN6_IN_PU,
1140                PN5_FN, PN5_OUT, PN5_IN, PN5_IN_PU,
1141                PN4_FN, PN4_OUT, PN4_IN, PN4_IN_PU,
1142                PN3_FN, PN3_OUT, PN3_IN, PN3_IN_PU,
1143                PN2_FN, PN2_OUT, PN2_IN, PN2_IN_PU,
1144                PN1_FN, PN1_OUT, PN1_IN, PN1_IN_PU,
1145                PN0_FN, PN0_OUT, PN0_IN, PN0_IN_PU }
1146        },
1147        { PINMUX_CFG_REG("PPCR", 0xffe7001a, 16, 2) {
1148                0, 0, 0, 0,
1149                0, 0, 0, 0,
1150                PP5_FN, PP5_OUT, PP5_IN, PP5_IN_PU,
1151                PP4_FN, PP4_OUT, PP4_IN, PP4_IN_PU,
1152                PP3_FN, PP3_OUT, PP3_IN, PP3_IN_PU,
1153                PP2_FN, PP2_OUT, PP2_IN, PP2_IN_PU,
1154                PP1_FN, PP1_OUT, PP1_IN, PP1_IN_PU,
1155                PP0_FN, PP0_OUT, PP0_IN, PP0_IN_PU }
1156        },
1157        { PINMUX_CFG_REG("PQCR", 0xffe7001c, 16, 2) {
1158                0, 0, 0, 0,
1159                0, 0, 0, 0,
1160                0, 0, 0, 0,
1161                PQ4_FN, PQ4_OUT, PQ4_IN, PQ4_IN_PU,
1162                PQ3_FN, PQ3_OUT, PQ3_IN, PQ3_IN_PU,
1163                PQ2_FN, PQ2_OUT, PQ2_IN, PQ2_IN_PU,
1164                PQ1_FN, PQ1_OUT, PQ1_IN, PQ1_IN_PU,
1165                PQ0_FN, PQ0_OUT, PQ0_IN, PQ0_IN_PU }
1166        },
1167        { PINMUX_CFG_REG("PRCR", 0xffe7001e, 16, 2) {
1168                0, 0, 0, 0,
1169                0, 0, 0, 0,
1170                0, 0, 0, 0,
1171                0, 0, 0, 0,
1172                PR3_FN, PR3_OUT, PR3_IN, PR3_IN_PU,
1173                PR2_FN, PR2_OUT, PR2_IN, PR2_IN_PU,
1174                PR1_FN, PR1_OUT, PR1_IN, PR1_IN_PU,
1175                PR0_FN, PR0_OUT, PR0_IN, PR0_IN_PU }
1176        },
1177        { PINMUX_CFG_REG("P1MSELR", 0xffe70080, 16, 1) {
1178                P1MSEL15_0, P1MSEL15_1,
1179                P1MSEL14_0, P1MSEL14_1,
1180                P1MSEL13_0, P1MSEL13_1,
1181                P1MSEL12_0, P1MSEL12_1,
1182                P1MSEL11_0, P1MSEL11_1,
1183                P1MSEL10_0, P1MSEL10_1,
1184                P1MSEL9_0, P1MSEL9_1,
1185                P1MSEL8_0, P1MSEL8_1,
1186                P1MSEL7_0, P1MSEL7_1,
1187                P1MSEL6_0, P1MSEL6_1,
1188                P1MSEL5_0, 0,
1189                P1MSEL4_0, P1MSEL4_1,
1190                P1MSEL3_0, P1MSEL3_1,
1191                P1MSEL2_0, P1MSEL2_1,
1192                P1MSEL1_0, P1MSEL1_1,
1193                P1MSEL0_0, P1MSEL0_1 }
1194        },
1195        { PINMUX_CFG_REG("P2MSELR", 0xffe70082, 16, 1) {
1196                0, 0,
1197                0, 0,
1198                0, 0,
1199                0, 0,
1200                0, 0,
1201                0, 0,
1202                0, 0,
1203                0, 0,
1204                0, 0,
1205                0, 0,
1206                0, 0,
1207                0, 0,
1208                0, 0,
1209                P2MSEL2_0, P2MSEL2_1,
1210                P2MSEL1_0, P2MSEL1_1,
1211                P2MSEL0_0, P2MSEL0_1 }
1212        },
1213        {}
1214};
1215
1216static struct pinmux_data_reg pinmux_data_regs[] = {
1217        { PINMUX_DATA_REG("PADR", 0xffe70020, 8) {
1218                PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
1219                PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
1220        },
1221        { PINMUX_DATA_REG("PBDR", 0xffe70022, 8) {
1222                PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
1223                PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
1224        },
1225        { PINMUX_DATA_REG("PCDR", 0xffe70024, 8) {
1226                PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
1227                PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
1228        },
1229        { PINMUX_DATA_REG("PDDR", 0xffe70026, 8) {
1230                PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
1231                PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
1232        },
1233        { PINMUX_DATA_REG("PEDR", 0xffe70028, 8) {
1234                0, 0, PE5_DATA, PE4_DATA,
1235                PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
1236        },
1237        { PINMUX_DATA_REG("PFDR", 0xffe7002a, 8) {
1238                PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
1239                PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
1240        },
1241        { PINMUX_DATA_REG("PGDR", 0xffe7002c, 8) {
1242                PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
1243                PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }
1244        },
1245        { PINMUX_DATA_REG("PHDR", 0xffe7002e, 8) {
1246                PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
1247                PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA }
1248        },
1249        { PINMUX_DATA_REG("PJDR", 0xffe70030, 8) {
1250                PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
1251                PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }
1252        },
1253        { PINMUX_DATA_REG("PKDR", 0xffe70032, 8) {
1254                PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
1255                PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA }
1256        },
1257        { PINMUX_DATA_REG("PLDR", 0xffe70034, 8) {
1258                PL7_DATA, PL6_DATA, PL5_DATA, PL4_DATA,
1259                PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA }
1260        },
1261        { PINMUX_DATA_REG("PMDR", 0xffe70036, 8) {
1262                0, 0, 0, 0,
1263                0, 0, PM1_DATA, PM0_DATA }
1264        },
1265        { PINMUX_DATA_REG("PNDR", 0xffe70038, 8) {
1266                PN7_DATA, PN6_DATA, PN5_DATA, PN4_DATA,
1267                PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA }
1268        },
1269        { PINMUX_DATA_REG("PPDR", 0xffe7003a, 8) {
1270                0, 0, PP5_DATA, PP4_DATA,
1271                PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA }
1272        },
1273        { PINMUX_DATA_REG("PQDR", 0xffe7003c, 8) {
1274                0, 0, 0, PQ4_DATA,
1275                PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA }
1276        },
1277        { PINMUX_DATA_REG("PRDR", 0xffe7003e, 8) {
1278                0, 0, 0, 0,
1279                PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA }
1280        },
1281        { },
1282};
1283
1284static struct pinmux_info sh7785_pinmux_info = {
1285        .name = "sh7785_pfc",
1286        .reserved_id = PINMUX_RESERVED,
1287        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1288        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1289        .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1290        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1291        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1292        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1293
1294        .first_gpio = GPIO_PA7,
1295        .last_gpio = GPIO_FN_IRQOUT,
1296
1297        .gpios = pinmux_gpios,
1298        .cfg_regs = pinmux_config_regs,
1299        .data_regs = pinmux_data_regs,
1300
1301        .gpio_data = pinmux_data,
1302        .gpio_data_size = ARRAY_SIZE(pinmux_data),
1303};
1304
1305static int __init plat_pinmux_setup(void)
1306{
1307        return register_pinmux(&sh7785_pinmux_info);
1308}
1309
1310arch_initcall(plat_pinmux_setup);
1311