LXR linux/arch/sparc/kernel/vmlinux.lds.S

   1/* ld script for sparc32/sparc64 kernel */
   2
   3#include <asm-generic/vmlinux.lds.h>
   4
   5#include <asm/page.h>
   6#include <asm/thread_info.h>
   7
   8#ifdef CONFIG_SPARC32
   9#define INITIAL_ADDRESS  0x10000 + SIZEOF_HEADERS
  10#define TEXTSTART       0xf0004000
  11
  12#define SMP_CACHE_BYTES_SHIFT 5
  13
  14#else
  15#define SMP_CACHE_BYTES_SHIFT 6
  16#define INITIAL_ADDRESS 0x4000
  17#define TEXTSTART      0x0000000000404000
  18
  19#endif
  20
  21#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
  22
  23#ifdef CONFIG_SPARC32
  24OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
  25OUTPUT_ARCH(sparc)
  26ENTRY(_start)
  27jiffies = jiffies_64 + 4;
  28#else
  29/* sparc64 */
  30OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
  31OUTPUT_ARCH(sparc:v9a)
  32ENTRY(_start)
  33jiffies = jiffies_64;
  34#endif
  35
  36SECTIONS
  37{
  38        /* swapper_low_pmd_dir is sparc64 only */
  39        swapper_low_pmd_dir = 0x0000000000402000;
  40        . = INITIAL_ADDRESS;
  41        .text TEXTSTART :
  42        {
  43                _text = .;
  44                HEAD_TEXT
  45                TEXT_TEXT
  46                SCHED_TEXT
  47                LOCK_TEXT
  48                KPROBES_TEXT
  49                *(.gnu.warning)
  50        } = 0
  51        _etext = .;
  52
  53        RO_DATA(PAGE_SIZE)
  54        .data1 : {
  55                *(.data1)
  56        }
  57        RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE)
  58
  59        /* End of data section */
  60        _edata = .;
  61
  62        .fixup : {
  63                __start___fixup = .;
  64                *(.fixup)
  65                __stop___fixup = .;
  66        }
  67        EXCEPTION_TABLE(16)
  68        NOTES
  69
  70        . = ALIGN(PAGE_SIZE);
  71        __init_begin = ALIGN(PAGE_SIZE);
  72        INIT_TEXT_SECTION(PAGE_SIZE)
  73        __init_text_end = .;
  74        INIT_DATA_SECTION(16)
  75
  76        . = ALIGN(4);
  77        .tsb_ldquad_phys_patch : {
  78                __tsb_ldquad_phys_patch = .;
  79                *(.tsb_ldquad_phys_patch)
  80                __tsb_ldquad_phys_patch_end = .;
  81        }
  82
  83        .tsb_phys_patch : {
  84                __tsb_phys_patch = .;
  85                *(.tsb_phys_patch)
  86                __tsb_phys_patch_end = .;
  87        }
  88
  89        .cpuid_patch : {
  90                __cpuid_patch = .;
  91                *(.cpuid_patch)
  92                __cpuid_patch_end = .;
  93        }
  94
  95        .sun4v_1insn_patch : {
  96                __sun4v_1insn_patch = .;
  97                *(.sun4v_1insn_patch)
  98                __sun4v_1insn_patch_end = .;
  99        }
 100        .sun4v_2insn_patch : {
 101                __sun4v_2insn_patch = .;
 102                *(.sun4v_2insn_patch)
 103                __sun4v_2insn_patch_end = .;
 104        }
 105
 106        PERCPU(PAGE_SIZE)
 107
 108        . = ALIGN(PAGE_SIZE);
 109        __init_end = .;
 110        BSS_SECTION(0, 0, 0)
 111        _end = . ;
 112
 113        STABS_DEBUG
 114        DWARF_DEBUG
 115
 116        DISCARDS
 117}
 118