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8
9enum pstate {
10 HW_PSTATE_INVALID = 0xff,
11 HW_PSTATE_0 = 0,
12 HW_PSTATE_1 = 1,
13 HW_PSTATE_2 = 2,
14 HW_PSTATE_3 = 3,
15 HW_PSTATE_4 = 4,
16 HW_PSTATE_5 = 5,
17 HW_PSTATE_6 = 6,
18 HW_PSTATE_7 = 7,
19};
20
21struct powernow_k8_data {
22 unsigned int cpu;
23
24 u32 numps;
25 u32 batps;
26 u32 max_hw_pstate;
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30
31 u32 rvo;
32 u32 irt;
33 u32 vidmvs;
34 u32 vstable;
35 u32 plllock;
36 u32 exttype;
37
38
39 u32 currvid;
40 u32 currfid;
41 enum pstate currpstate;
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45
46 struct cpufreq_frequency_table *powernow_table;
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49
50 struct acpi_processor_performance acpi_data;
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54
55 struct cpumask *available_cores;
56};
57
58
59
60#define CPUID_PROCESSOR_SIGNATURE 1
61#define CPUID_XFAM 0x0ff00000
62#define CPUID_XFAM_K8 0
63#define CPUID_XMOD 0x000f0000
64#define CPUID_XMOD_REV_MASK 0x000c0000
65#define CPUID_XFAM_10H 0x00100000
66#define CPUID_USE_XFAM_XMOD 0x00000f00
67#define CPUID_GET_MAX_CAPABILITIES 0x80000000
68#define CPUID_FREQ_VOLT_CAPABILITIES 0x80000007
69#define P_STATE_TRANSITION_CAPABLE 6
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75
76#define MSR_FIDVID_CTL 0xc0010041
77#define MSR_FIDVID_STATUS 0xc0010042
78
79
80#define MSR_C_LO_INIT_FID_VID 0x00010000
81#define MSR_C_LO_NEW_VID 0x00003f00
82#define MSR_C_LO_NEW_FID 0x0000003f
83#define MSR_C_LO_VID_SHIFT 8
84
85
86#define MSR_C_HI_STP_GNT_TO 0x000fffff
87
88
89#define MSR_S_LO_CHANGE_PENDING 0x80000000
90#define MSR_S_LO_MAX_RAMP_VID 0x3f000000
91#define MSR_S_LO_MAX_FID 0x003f0000
92#define MSR_S_LO_START_FID 0x00003f00
93#define MSR_S_LO_CURRENT_FID 0x0000003f
94
95
96#define MSR_S_HI_MIN_WORKING_VID 0x3f000000
97#define MSR_S_HI_MAX_WORKING_VID 0x003f0000
98#define MSR_S_HI_START_VID 0x00003f00
99#define MSR_S_HI_CURRENT_VID 0x0000003f
100#define MSR_C_HI_STP_GNT_BENIGN 0x00000001
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102
103
104#define USE_HW_PSTATE 0x00000080
105#define HW_PSTATE_MASK 0x00000007
106#define HW_PSTATE_VALID_MASK 0x80000000
107#define HW_PSTATE_MAX_MASK 0x000000f0
108#define HW_PSTATE_MAX_SHIFT 4
109#define MSR_PSTATE_DEF_BASE 0xc0010064
110#define MSR_PSTATE_STATUS 0xc0010063
111#define MSR_PSTATE_CTRL 0xc0010062
112#define MSR_PSTATE_CUR_LIMIT 0xc0010061
113
114
115#define CPU_OPTERON 0
116#define CPU_HW_PSTATE 1
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132
133#define LO_FID_TABLE_TOP 7
134#define HI_FID_TABLE_BOTTOM 8
135
136#define LO_VCOFREQ_TABLE_TOP 1400
137#define HI_VCOFREQ_TABLE_BOTTOM 1600
138
139#define MIN_FREQ_RESOLUTION 200
140
141#define MAX_FID 0x2a
142#define LEAST_VID 0x3e
143
144#define MIN_FREQ 800
145#define MAX_FREQ 5000
146
147#define INVALID_FID_MASK 0xffffffc0
148#define INVALID_VID_MASK 0xffffffc0
149
150#define VID_OFF 0x3f
151
152#define STOP_GRANT_5NS 1
153
154#define PLL_LOCK_CONVERSION (1000/5)
155
156#define MAXIMUM_VID_STEPS 1
157#define VST_UNITS_20US 20
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164#define IRT_SHIFT 30
165#define RVO_SHIFT 28
166#define EXT_TYPE_SHIFT 27
167#define PLL_L_SHIFT 20
168#define MVS_SHIFT 18
169#define VST_SHIFT 11
170#define VID_SHIFT 6
171#define IRT_MASK 3
172#define RVO_MASK 3
173#define EXT_TYPE_MASK 1
174#define PLL_L_MASK 0x7f
175#define MVS_MASK 3
176#define VST_MASK 0x7f
177#define VID_MASK 0x1f
178#define FID_MASK 0x1f
179#define EXT_VID_MASK 0x3f
180#define EXT_FID_MASK 0x3f
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190
191#define PSB_ID_STRING "AMDK7PNOW!"
192#define PSB_ID_STRING_LEN 10
193
194#define PSB_VERSION_1_4 0x14
195
196struct psb_s {
197 u8 signature[10];
198 u8 tableversion;
199 u8 flags1;
200 u16 vstable;
201 u8 flags2;
202 u8 num_tables;
203 u32 cpuid;
204 u8 plllocktime;
205 u8 maxfid;
206 u8 maxvid;
207 u8 numps;
208};
209
210
211struct pst_s {
212 u8 fid;
213 u8 vid;
214};
215
216#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "powernow-k8", msg)
217
218static int core_voltage_pre_transition(struct powernow_k8_data *data,
219 u32 reqvid, u32 regfid);
220static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid);
221static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid);
222
223static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index);
224
225static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
226static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
227