1#include <linux/errno.h>
2#include <linux/kernel.h>
3#include <linux/mm.h>
4#include <linux/smp.h>
5#include <linux/prctl.h>
6#include <linux/slab.h>
7#include <linux/sched.h>
8#include <linux/module.h>
9#include <linux/pm.h>
10#include <linux/clockchips.h>
11#include <linux/random.h>
12#include <trace/events/power.h>
13#include <asm/system.h>
14#include <asm/apic.h>
15#include <asm/syscalls.h>
16#include <asm/idle.h>
17#include <asm/uaccess.h>
18#include <asm/i387.h>
19#include <asm/ds.h>
20
21unsigned long idle_halt;
22EXPORT_SYMBOL(idle_halt);
23unsigned long idle_nomwait;
24EXPORT_SYMBOL(idle_nomwait);
25
26struct kmem_cache *task_xstate_cachep;
27
28int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
29{
30 *dst = *src;
31 if (src->thread.xstate) {
32 dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
33 GFP_KERNEL);
34 if (!dst->thread.xstate)
35 return -ENOMEM;
36 WARN_ON((unsigned long)dst->thread.xstate & 15);
37 memcpy(dst->thread.xstate, src->thread.xstate, xstate_size);
38 }
39 return 0;
40}
41
42void free_thread_xstate(struct task_struct *tsk)
43{
44 if (tsk->thread.xstate) {
45 kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
46 tsk->thread.xstate = NULL;
47 }
48
49 WARN(tsk->thread.ds_ctx, "leaking DS context\n");
50}
51
52void free_thread_info(struct thread_info *ti)
53{
54 free_thread_xstate(ti->task);
55 free_pages((unsigned long)ti, get_order(THREAD_SIZE));
56}
57
58void arch_task_cache_init(void)
59{
60 task_xstate_cachep =
61 kmem_cache_create("task_xstate", xstate_size,
62 __alignof__(union thread_xstate),
63 SLAB_PANIC | SLAB_NOTRACK, NULL);
64}
65
66
67
68
69void exit_thread(void)
70{
71 struct task_struct *me = current;
72 struct thread_struct *t = &me->thread;
73 unsigned long *bp = t->io_bitmap_ptr;
74
75 if (bp) {
76 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
77
78 t->io_bitmap_ptr = NULL;
79 clear_thread_flag(TIF_IO_BITMAP);
80
81
82
83 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
84 t->io_bitmap_max = 0;
85 put_cpu();
86 kfree(bp);
87 }
88}
89
90void flush_thread(void)
91{
92 struct task_struct *tsk = current;
93
94#ifdef CONFIG_X86_64
95 if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) {
96 clear_tsk_thread_flag(tsk, TIF_ABI_PENDING);
97 if (test_tsk_thread_flag(tsk, TIF_IA32)) {
98 clear_tsk_thread_flag(tsk, TIF_IA32);
99 } else {
100 set_tsk_thread_flag(tsk, TIF_IA32);
101 current_thread_info()->status |= TS_COMPAT;
102 }
103 }
104#endif
105
106 clear_tsk_thread_flag(tsk, TIF_DEBUG);
107
108 tsk->thread.debugreg0 = 0;
109 tsk->thread.debugreg1 = 0;
110 tsk->thread.debugreg2 = 0;
111 tsk->thread.debugreg3 = 0;
112 tsk->thread.debugreg6 = 0;
113 tsk->thread.debugreg7 = 0;
114 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
115
116
117
118 tsk->fpu_counter = 0;
119 clear_fpu(tsk);
120 clear_used_math();
121}
122
123static void hard_disable_TSC(void)
124{
125 write_cr4(read_cr4() | X86_CR4_TSD);
126}
127
128void disable_TSC(void)
129{
130 preempt_disable();
131 if (!test_and_set_thread_flag(TIF_NOTSC))
132
133
134
135
136 hard_disable_TSC();
137 preempt_enable();
138}
139
140static void hard_enable_TSC(void)
141{
142 write_cr4(read_cr4() & ~X86_CR4_TSD);
143}
144
145static void enable_TSC(void)
146{
147 preempt_disable();
148 if (test_and_clear_thread_flag(TIF_NOTSC))
149
150
151
152
153 hard_enable_TSC();
154 preempt_enable();
155}
156
157int get_tsc_mode(unsigned long adr)
158{
159 unsigned int val;
160
161 if (test_thread_flag(TIF_NOTSC))
162 val = PR_TSC_SIGSEGV;
163 else
164 val = PR_TSC_ENABLE;
165
166 return put_user(val, (unsigned int __user *)adr);
167}
168
169int set_tsc_mode(unsigned int val)
170{
171 if (val == PR_TSC_SIGSEGV)
172 disable_TSC();
173 else if (val == PR_TSC_ENABLE)
174 enable_TSC();
175 else
176 return -EINVAL;
177
178 return 0;
179}
180
181void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
182 struct tss_struct *tss)
183{
184 struct thread_struct *prev, *next;
185
186 prev = &prev_p->thread;
187 next = &next_p->thread;
188
189 if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
190 test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
191 ds_switch_to(prev_p, next_p);
192 else if (next->debugctlmsr != prev->debugctlmsr)
193 update_debugctlmsr(next->debugctlmsr);
194
195 if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
196 set_debugreg(next->debugreg0, 0);
197 set_debugreg(next->debugreg1, 1);
198 set_debugreg(next->debugreg2, 2);
199 set_debugreg(next->debugreg3, 3);
200
201 set_debugreg(next->debugreg6, 6);
202 set_debugreg(next->debugreg7, 7);
203 }
204
205 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
206 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
207
208 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
209 hard_disable_TSC();
210 else
211 hard_enable_TSC();
212 }
213
214 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
215
216
217
218
219 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
220 max(prev->io_bitmap_max, next->io_bitmap_max));
221 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
222
223
224
225 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
226 }
227}
228
229int sys_fork(struct pt_regs *regs)
230{
231 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
232}
233
234
235
236
237
238
239
240
241
242
243
244int sys_vfork(struct pt_regs *regs)
245{
246 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
247 NULL, NULL);
248}
249
250
251
252
253
254unsigned long boot_option_idle_override = 0;
255EXPORT_SYMBOL(boot_option_idle_override);
256
257
258
259
260void (*pm_idle)(void);
261EXPORT_SYMBOL(pm_idle);
262
263#ifdef CONFIG_X86_32
264
265
266
267
268static int hlt_counter;
269void disable_hlt(void)
270{
271 hlt_counter++;
272}
273EXPORT_SYMBOL(disable_hlt);
274
275void enable_hlt(void)
276{
277 hlt_counter--;
278}
279EXPORT_SYMBOL(enable_hlt);
280
281static inline int hlt_use_halt(void)
282{
283 return (!hlt_counter && boot_cpu_data.hlt_works_ok);
284}
285#else
286static inline int hlt_use_halt(void)
287{
288 return 1;
289}
290#endif
291
292
293
294
295
296void default_idle(void)
297{
298 if (hlt_use_halt()) {
299 trace_power_start(POWER_CSTATE, 1);
300 current_thread_info()->status &= ~TS_POLLING;
301
302
303
304
305 smp_mb();
306
307 if (!need_resched())
308 safe_halt();
309 else
310 local_irq_enable();
311 current_thread_info()->status |= TS_POLLING;
312 } else {
313 local_irq_enable();
314
315 cpu_relax();
316 }
317}
318#ifdef CONFIG_APM_MODULE
319EXPORT_SYMBOL(default_idle);
320#endif
321
322void stop_this_cpu(void *dummy)
323{
324 local_irq_disable();
325
326
327
328 set_cpu_online(smp_processor_id(), false);
329 disable_local_APIC();
330
331 for (;;) {
332 if (hlt_works(smp_processor_id()))
333 halt();
334 }
335}
336
337static void do_nothing(void *unused)
338{
339}
340
341
342
343
344
345
346
347
348
349void cpu_idle_wait(void)
350{
351 smp_mb();
352
353 smp_call_function(do_nothing, NULL, 1);
354}
355EXPORT_SYMBOL_GPL(cpu_idle_wait);
356
357
358
359
360
361
362
363
364
365
366
367void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
368{
369 trace_power_start(POWER_CSTATE, (ax>>4)+1);
370 if (!need_resched()) {
371 if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
372 clflush((void *)¤t_thread_info()->flags);
373
374 __monitor((void *)¤t_thread_info()->flags, 0, 0);
375 smp_mb();
376 if (!need_resched())
377 __mwait(ax, cx);
378 }
379}
380
381
382static void mwait_idle(void)
383{
384 if (!need_resched()) {
385 trace_power_start(POWER_CSTATE, 1);
386 if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
387 clflush((void *)¤t_thread_info()->flags);
388
389 __monitor((void *)¤t_thread_info()->flags, 0, 0);
390 smp_mb();
391 if (!need_resched())
392 __sti_mwait(0, 0);
393 else
394 local_irq_enable();
395 } else
396 local_irq_enable();
397}
398
399
400
401
402
403
404static void poll_idle(void)
405{
406 trace_power_start(POWER_CSTATE, 0);
407 local_irq_enable();
408 while (!need_resched())
409 cpu_relax();
410 trace_power_end(0);
411}
412
413
414
415
416
417
418
419
420
421
422
423
424
425static int __cpuinitdata force_mwait;
426
427#define MWAIT_INFO 0x05
428#define MWAIT_ECX_EXTENDED_INFO 0x01
429#define MWAIT_EDX_C1 0xf0
430
431static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
432{
433 u32 eax, ebx, ecx, edx;
434
435 if (force_mwait)
436 return 1;
437
438 if (c->cpuid_level < MWAIT_INFO)
439 return 0;
440
441 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
442
443 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
444 return 1;
445
446
447
448
449
450 return (edx & MWAIT_EDX_C1);
451}
452
453
454
455
456static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
457{
458 if (c->x86_vendor != X86_VENDOR_AMD)
459 return 0;
460
461 if (c->x86 < 0x0F)
462 return 0;
463
464
465 if (c->x86 == 0x0f && c->x86_model < 0x40)
466 return 0;
467
468 return 1;
469}
470
471static cpumask_var_t c1e_mask;
472static int c1e_detected;
473
474void c1e_remove_cpu(int cpu)
475{
476 if (c1e_mask != NULL)
477 cpumask_clear_cpu(cpu, c1e_mask);
478}
479
480
481
482
483
484
485static void c1e_idle(void)
486{
487 if (need_resched())
488 return;
489
490 if (!c1e_detected) {
491 u32 lo, hi;
492
493 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
494 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
495 c1e_detected = 1;
496 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
497 mark_tsc_unstable("TSC halt in AMD C1E");
498 printk(KERN_INFO "System has AMD C1E enabled\n");
499 set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);
500 }
501 }
502
503 if (c1e_detected) {
504 int cpu = smp_processor_id();
505
506 if (!cpumask_test_cpu(cpu, c1e_mask)) {
507 cpumask_set_cpu(cpu, c1e_mask);
508
509
510
511 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
512 &cpu);
513 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
514 cpu);
515 }
516 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
517
518 default_idle();
519
520
521
522
523
524 local_irq_disable();
525 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
526 local_irq_enable();
527 } else
528 default_idle();
529}
530
531void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
532{
533#ifdef CONFIG_SMP
534 if (pm_idle == poll_idle && smp_num_siblings > 1) {
535 printk(KERN_WARNING "WARNING: polling idle and HT enabled,"
536 " performance may degrade.\n");
537 }
538#endif
539 if (pm_idle)
540 return;
541
542 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
543
544
545
546 printk(KERN_INFO "using mwait in idle threads.\n");
547 pm_idle = mwait_idle;
548 } else if (check_c1e_idle(c)) {
549 printk(KERN_INFO "using C1E aware idle routine\n");
550 pm_idle = c1e_idle;
551 } else
552 pm_idle = default_idle;
553}
554
555void __init init_c1e_mask(void)
556{
557
558 if (pm_idle == c1e_idle)
559 zalloc_cpumask_var(&c1e_mask, GFP_KERNEL);
560}
561
562static int __init idle_setup(char *str)
563{
564 if (!str)
565 return -EINVAL;
566
567 if (!strcmp(str, "poll")) {
568 printk("using polling idle threads.\n");
569 pm_idle = poll_idle;
570 } else if (!strcmp(str, "mwait"))
571 force_mwait = 1;
572 else if (!strcmp(str, "halt")) {
573
574
575
576
577
578
579
580 pm_idle = default_idle;
581 idle_halt = 1;
582 return 0;
583 } else if (!strcmp(str, "nomwait")) {
584
585
586
587
588
589
590 idle_nomwait = 1;
591 return 0;
592 } else
593 return -1;
594
595 boot_option_idle_override = 1;
596 return 0;
597}
598early_param("idle", idle_setup);
599
600unsigned long arch_align_stack(unsigned long sp)
601{
602 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
603 sp -= get_random_int() % 8192;
604 return sp & ~0xf;
605}
606
607unsigned long arch_randomize_brk(struct mm_struct *mm)
608{
609 unsigned long range_end = mm->brk + 0x02000000;
610 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
611}
612
613