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15#include <linux/init.h>
16#include <linux/pci_ids.h>
17#include <linux/pci_regs.h>
18
19#include <asm/apic.h>
20#include <asm/pci-direct.h>
21#include <asm/io.h>
22#include <asm/paravirt.h>
23#include <asm/setup.h>
24
25#if defined CONFIG_PCI && defined CONFIG_PARAVIRT
26
27
28
29
30
31
32static unsigned long vsmp_save_fl(void)
33{
34 unsigned long flags = native_save_fl();
35
36 if (!(flags & X86_EFLAGS_IF) || (flags & X86_EFLAGS_AC))
37 flags &= ~X86_EFLAGS_IF;
38 return flags;
39}
40PV_CALLEE_SAVE_REGS_THUNK(vsmp_save_fl);
41
42static void vsmp_restore_fl(unsigned long flags)
43{
44 if (flags & X86_EFLAGS_IF)
45 flags &= ~X86_EFLAGS_AC;
46 else
47 flags |= X86_EFLAGS_AC;
48 native_restore_fl(flags);
49}
50PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl);
51
52static void vsmp_irq_disable(void)
53{
54 unsigned long flags = native_save_fl();
55
56 native_restore_fl((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC);
57}
58PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable);
59
60static void vsmp_irq_enable(void)
61{
62 unsigned long flags = native_save_fl();
63
64 native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC));
65}
66PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_enable);
67
68static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf,
69 unsigned long addr, unsigned len)
70{
71 switch (type) {
72 case PARAVIRT_PATCH(pv_irq_ops.irq_enable):
73 case PARAVIRT_PATCH(pv_irq_ops.irq_disable):
74 case PARAVIRT_PATCH(pv_irq_ops.save_fl):
75 case PARAVIRT_PATCH(pv_irq_ops.restore_fl):
76 return paravirt_patch_default(type, clobbers, ibuf, addr, len);
77 default:
78 return native_patch(type, clobbers, ibuf, addr, len);
79 }
80
81}
82
83static void __init set_vsmp_pv_ops(void)
84{
85 void __iomem *address;
86 unsigned int cap, ctl, cfg;
87
88
89 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
90 address = early_ioremap(cfg, 8);
91 cap = readl(address);
92 ctl = readl(address + 4);
93 printk(KERN_INFO "vSMP CTL: capabilities:0x%08x control:0x%08x\n",
94 cap, ctl);
95 if (cap & ctl & (1 << 4)) {
96
97 pv_irq_ops.irq_disable = PV_CALLEE_SAVE(vsmp_irq_disable);
98 pv_irq_ops.irq_enable = PV_CALLEE_SAVE(vsmp_irq_enable);
99 pv_irq_ops.save_fl = PV_CALLEE_SAVE(vsmp_save_fl);
100 pv_irq_ops.restore_fl = PV_CALLEE_SAVE(vsmp_restore_fl);
101 pv_init_ops.patch = vsmp_patch;
102
103 ctl &= ~(1 << 4);
104 writel(ctl, address + 4);
105 ctl = readl(address + 4);
106 printk(KERN_INFO "vSMP CTL: control set to:0x%08x\n", ctl);
107 }
108
109 early_iounmap(address, 8);
110}
111#else
112static void __init set_vsmp_pv_ops(void)
113{
114}
115#endif
116
117#ifdef CONFIG_PCI
118static int is_vsmp = -1;
119
120static void __init detect_vsmp_box(void)
121{
122 is_vsmp = 0;
123
124 if (!early_pci_allowed())
125 return;
126
127
128 if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) ==
129 (PCI_VENDOR_ID_SCALEMP | (PCI_DEVICE_ID_SCALEMP_VSMP_CTL << 16)))
130 is_vsmp = 1;
131}
132
133int is_vsmp_box(void)
134{
135 if (is_vsmp != -1)
136 return is_vsmp;
137 else {
138 WARN_ON_ONCE(1);
139 return 0;
140 }
141}
142
143#else
144static void __init detect_vsmp_box(void)
145{
146}
147int is_vsmp_box(void)
148{
149 return 0;
150}
151#endif
152void __init vsmp_init(void)
153{
154 detect_vsmp_box();
155 if (!is_vsmp_box())
156 return;
157
158 set_vsmp_pv_ops();
159 return;
160}
161