LXR linux/crypto/async_tx/async

   1/*
   2 * memory fill offload engine support
   3 *
   4 * Copyright © 2006, Intel Corporation.
   5 *
   6 *      Dan Williams <dan.j.williams@intel.com>
   7 *
   8 *      with architecture considerations by:
   9 *      Neil Brown <neilb@suse.de>
  10 *      Jeff Garzik <jeff@garzik.org>
  11 *
  12 * This program is free software; you can redistribute it and/or modify it
  13 * under the terms and conditions of the GNU General Public License,
  14 * version 2, as published by the Free Software Foundation.
  15 *
  16 * This program is distributed in the hope it will be useful, but WITHOUT
  17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19 * more details.
  20 *
  21 * You should have received a copy of the GNU General Public License along with
  22 * this program; if not, write to the Free Software Foundation, Inc.,
  23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  24 *
  25 */
  26#include <linux/kernel.h>
  27#include <linux/interrupt.h>
  28#include <linux/mm.h>
  29#include <linux/dma-mapping.h>
  30#include <linux/async_tx.h>
  31
  32/**
  33 * async_memset - attempt to fill memory with a dma engine.
  34 * @dest: destination page
  35 * @val: fill value
  36 * @offset: offset in pages to start transaction
  37 * @len: length in bytes
  38 *
  39 * honored flags: ASYNC_TX_ACK
  40 */
  41struct dma_async_tx_descriptor *
  42async_memset(struct page *dest, int val, unsigned int offset, size_t len,
  43             struct async_submit_ctl *submit)
  44{
  45        struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMSET,
  46                                                      &dest, 1, NULL, 0, len);
  47        struct dma_device *device = chan ? chan->device : NULL;
  48        struct dma_async_tx_descriptor *tx = NULL;
  49
  50        if (device && is_dma_fill_aligned(device, offset, 0, len)) {
  51                dma_addr_t dma_dest;
  52                unsigned long dma_prep_flags = 0;
  53
  54                if (submit->cb_fn)
  55                        dma_prep_flags |= DMA_PREP_INTERRUPT;
  56                if (submit->flags & ASYNC_TX_FENCE)
  57                        dma_prep_flags |= DMA_PREP_FENCE;
  58                dma_dest = dma_map_page(device->dev, dest, offset, len,
  59                                        DMA_FROM_DEVICE);
  60
  61                tx = device->device_prep_dma_memset(chan, dma_dest, val, len,
  62                                                    dma_prep_flags);
  63        }
  64
  65        if (tx) {
  66                pr_debug("%s: (async) len: %zu\n", __func__, len);
  67                async_tx_submit(chan, tx, submit);
  68        } else { /* run the memset synchronously */
  69                void *dest_buf;
  70                pr_debug("%s: (sync) len: %zu\n", __func__, len);
  71
  72                dest_buf = page_address(dest) + offset;
  73
  74                /* wait for any prerequisite operations */
  75                async_tx_quiesce(&submit->depend_tx);
  76
  77                memset(dest_buf, val, len);
  78
  79                async_tx_sync_epilog(submit);
  80        }
  81
  82        return tx;
  83}
  84EXPORT_SYMBOL_GPL(async_memset);
  85
  86MODULE_AUTHOR("Intel Corporation");
  87MODULE_DESCRIPTION("asynchronous memset api");
  88MODULE_LICENSE("GPL");
  89