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51#include <linux/async.h>
52#include <linux/kernel.h>
53#include <linux/module.h>
54#include <linux/pci.h>
55#include <linux/init.h>
56#include <linux/blkdev.h>
57#include <linux/delay.h>
58#include <scsi/scsi_host.h>
59#include <linux/ata.h>
60#include <linux/libata.h>
61#include <linux/platform_device.h>
62
63#define DRV_NAME "pata_legacy"
64#define DRV_VERSION "0.6.5"
65
66#define NR_HOST 6
67
68static int all;
69module_param(all, int, 0444);
70MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)");
71
72struct legacy_data {
73 unsigned long timing;
74 u8 clock[2];
75 u8 last;
76 int fast;
77 struct platform_device *platform_dev;
78
79};
80
81enum controller {
82 BIOS = 0,
83 SNOOP = 1,
84 PDC20230 = 2,
85 HT6560A = 3,
86 HT6560B = 4,
87 OPTI611A = 5,
88 OPTI46X = 6,
89 QDI6500 = 7,
90 QDI6580 = 8,
91 QDI6580DP = 9,
92 W83759A = 10,
93
94 UNKNOWN = -1
95};
96
97
98struct legacy_probe {
99 unsigned char *name;
100 unsigned long port;
101 unsigned int irq;
102 unsigned int slot;
103 enum controller type;
104 unsigned long private;
105};
106
107struct legacy_controller {
108 const char *name;
109 struct ata_port_operations *ops;
110 unsigned int pio_mask;
111 unsigned int flags;
112 unsigned int pflags;
113 int (*setup)(struct platform_device *, struct legacy_probe *probe,
114 struct legacy_data *data);
115};
116
117static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
118
119static struct legacy_probe probe_list[NR_HOST];
120static struct legacy_data legacy_data[NR_HOST];
121static struct ata_host *legacy_host[NR_HOST];
122static int nr_legacy_host;
123
124
125static int probe_all;
126static int ht6560a;
127static int ht6560b;
128static int opti82c611a;
129static int opti82c46x;
130static int qdi;
131static int winbond;
132
133static int autospeed;
134static int pio_mask = ATA_PIO4;
135static int iordy_mask = 0xFFFFFFFF;
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152static int legacy_probe_add(unsigned long port, unsigned int irq,
153 enum controller type, unsigned long private)
154{
155 struct legacy_probe *lp = &probe_list[0];
156 int i;
157 struct legacy_probe *free = NULL;
158
159 for (i = 0; i < NR_HOST; i++) {
160 if (lp->port == 0 && free == NULL)
161 free = lp;
162
163 if (lp->port == port || legacy_port[i] == port) {
164 free = lp;
165 break;
166 }
167 lp++;
168 }
169 if (free == NULL) {
170 printk(KERN_ERR "pata_legacy: Too many interfaces.\n");
171 return -1;
172 }
173
174 free->port = port;
175 free->irq = irq;
176 free->type = type;
177 free->private = private;
178 return 0;
179}
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195static int legacy_set_mode(struct ata_link *link, struct ata_device **unused)
196{
197 struct ata_device *dev;
198
199 ata_for_each_dev(dev, link, ENABLED) {
200 ata_dev_printk(dev, KERN_INFO, "configured for PIO\n");
201 dev->pio_mode = XFER_PIO_0;
202 dev->xfer_mode = XFER_PIO_0;
203 dev->xfer_shift = ATA_SHIFT_PIO;
204 dev->flags |= ATA_DFLAG_PIO;
205 }
206 return 0;
207}
208
209static struct scsi_host_template legacy_sht = {
210 ATA_PIO_SHT(DRV_NAME),
211};
212
213static const struct ata_port_operations legacy_base_port_ops = {
214 .inherits = &ata_sff_port_ops,
215 .cable_detect = ata_cable_40wire,
216};
217
218
219
220
221
222
223
224
225
226static struct ata_port_operations simple_port_ops = {
227 .inherits = &legacy_base_port_ops,
228 .sff_data_xfer = ata_sff_data_xfer_noirq,
229};
230
231static struct ata_port_operations legacy_port_ops = {
232 .inherits = &legacy_base_port_ops,
233 .sff_data_xfer = ata_sff_data_xfer_noirq,
234 .set_mode = legacy_set_mode,
235};
236
237
238
239
240
241
242
243
244
245
246static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev)
247{
248 int tries = 5;
249 int pio = adev->pio_mode - XFER_PIO_0;
250 u8 rt;
251 unsigned long flags;
252
253
254
255 local_irq_save(flags);
256
257
258 do {
259 inb(0x1F5);
260 outb(inb(0x1F2) | 0x80, 0x1F2);
261 inb(0x1F2);
262 inb(0x3F6);
263 inb(0x3F6);
264 inb(0x1F2);
265 inb(0x1F2);
266 }
267 while ((inb(0x1F2) & 0x80) && --tries);
268
269 local_irq_restore(flags);
270
271 outb(inb(0x1F4) & 0x07, 0x1F4);
272
273 rt = inb(0x1F3);
274 rt &= 0x07 << (3 * adev->devno);
275 if (pio)
276 rt |= (1 + 3 * pio) << (3 * adev->devno);
277
278 udelay(100);
279 outb(inb(0x1F2) | 0x01, 0x1F2);
280 udelay(100);
281 inb(0x1F5);
282
283}
284
285static unsigned int pdc_data_xfer_vlb(struct ata_device *dev,
286 unsigned char *buf, unsigned int buflen, int rw)
287{
288 int slop = buflen & 3;
289 struct ata_port *ap = dev->link->ap;
290
291
292 if (ata_id_has_dword_io(dev->id) && (slop == 0 || slop == 3)
293 && (ap->pflags & ATA_PFLAG_PIO32)) {
294 unsigned long flags;
295
296 local_irq_save(flags);
297
298
299 ioread8(ap->ioaddr.nsect_addr);
300 ioread8(ap->ioaddr.nsect_addr);
301 ioread8(ap->ioaddr.nsect_addr);
302
303
304 if (rw == READ)
305 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
306 else
307 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
308
309 if (unlikely(slop)) {
310 __le32 pad;
311 if (rw == READ) {
312 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
313 memcpy(buf + buflen - slop, &pad, slop);
314 } else {
315 memcpy(&pad, buf + buflen - slop, slop);
316 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
317 }
318 buflen += 4 - slop;
319 }
320 local_irq_restore(flags);
321 } else
322 buflen = ata_sff_data_xfer_noirq(dev, buf, buflen, rw);
323
324 return buflen;
325}
326
327static struct ata_port_operations pdc20230_port_ops = {
328 .inherits = &legacy_base_port_ops,
329 .set_piomode = pdc20230_set_piomode,
330 .sff_data_xfer = pdc_data_xfer_vlb,
331};
332
333
334
335
336
337
338
339
340static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev)
341{
342 u8 active, recover;
343 struct ata_timing t;
344
345
346 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
347
348 active = clamp_val(t.active, 2, 15);
349 recover = clamp_val(t.recover, 4, 15);
350
351 inb(0x3E6);
352 inb(0x3E6);
353 inb(0x3E6);
354 inb(0x3E6);
355
356 iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
357 ioread8(ap->ioaddr.status_addr);
358}
359
360static struct ata_port_operations ht6560a_port_ops = {
361 .inherits = &legacy_base_port_ops,
362 .set_piomode = ht6560a_set_piomode,
363};
364
365
366
367
368
369
370
371
372
373
374static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev)
375{
376 u8 active, recover;
377 struct ata_timing t;
378
379
380 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
381
382 active = clamp_val(t.active, 2, 15);
383 recover = clamp_val(t.recover, 2, 16);
384 recover &= 0x15;
385
386 inb(0x3E6);
387 inb(0x3E6);
388 inb(0x3E6);
389 inb(0x3E6);
390
391 iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
392
393 if (adev->class != ATA_DEV_ATA) {
394 u8 rconf = inb(0x3E6);
395 if (rconf & 0x24) {
396 rconf &= ~0x24;
397 outb(rconf, 0x3E6);
398 }
399 }
400 ioread8(ap->ioaddr.status_addr);
401}
402
403static struct ata_port_operations ht6560b_port_ops = {
404 .inherits = &legacy_base_port_ops,
405 .set_piomode = ht6560b_set_piomode,
406};
407
408
409
410
411
412
413
414
415
416
417
418
419static u8 opti_syscfg(u8 reg)
420{
421 unsigned long flags;
422 u8 r;
423
424
425 local_irq_save(flags);
426 outb(reg, 0x22);
427 r = inb(0x24);
428 local_irq_restore(flags);
429 return r;
430}
431
432
433
434
435
436
437
438static void opti82c611a_set_piomode(struct ata_port *ap,
439 struct ata_device *adev)
440{
441 u8 active, recover, setup;
442 struct ata_timing t;
443 struct ata_device *pair = ata_dev_pair(adev);
444 int clock;
445 int khz[4] = { 50000, 40000, 33000, 25000 };
446 u8 rc;
447
448
449 ioread16(ap->ioaddr.error_addr);
450 ioread16(ap->ioaddr.error_addr);
451 iowrite8(3, ap->ioaddr.nsect_addr);
452
453
454 clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03];
455
456
457 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
458
459
460 if (pair) {
461 struct ata_timing tp;
462 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
463
464 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
465 }
466
467 active = clamp_val(t.active, 2, 17) - 2;
468 recover = clamp_val(t.recover, 1, 16) - 1;
469 setup = clamp_val(t.setup, 1, 4) - 1;
470
471
472 rc = ioread8(ap->ioaddr.lbal_addr);
473 rc &= 0x7F;
474 rc |= (adev->devno << 7);
475 iowrite8(rc, ap->ioaddr.lbal_addr);
476
477
478 iowrite8(active << 4 | recover, ap->ioaddr.error_addr);
479
480
481
482 rc = ioread8(ap->ioaddr.device_addr);
483 rc &= 0xC0;
484 rc |= adev->devno;
485 rc |= (setup << 4) | 0x04;
486 iowrite8(rc, ap->ioaddr.device_addr);
487
488
489 iowrite8(active << 4 | recover, ap->ioaddr.data_addr);
490
491
492 rc = ioread8(ap->ioaddr.lbal_addr);
493 rc &= 0x73;
494 rc |= 0x84;
495 iowrite8(rc, ap->ioaddr.lbal_addr);
496
497
498 iowrite8(0x83, ap->ioaddr.nsect_addr);
499}
500
501
502static struct ata_port_operations opti82c611a_port_ops = {
503 .inherits = &legacy_base_port_ops,
504 .set_piomode = opti82c611a_set_piomode,
505};
506
507
508
509
510
511
512
513
514static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev)
515{
516 u8 active, recover, setup;
517 struct ata_timing t;
518 struct ata_device *pair = ata_dev_pair(adev);
519 int clock;
520 int khz[4] = { 50000, 40000, 33000, 25000 };
521 u8 rc;
522 u8 sysclk;
523
524
525 sysclk = opti_syscfg(0xAC) & 0xC0;
526
527
528 ioread16(ap->ioaddr.error_addr);
529 ioread16(ap->ioaddr.error_addr);
530 iowrite8(3, ap->ioaddr.nsect_addr);
531
532
533 clock = 1000000000 / khz[sysclk];
534
535
536 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
537
538
539 if (pair) {
540 struct ata_timing tp;
541 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
542
543 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
544 }
545
546 active = clamp_val(t.active, 2, 17) - 2;
547 recover = clamp_val(t.recover, 1, 16) - 1;
548 setup = clamp_val(t.setup, 1, 4) - 1;
549
550
551 rc = ioread8(ap->ioaddr.lbal_addr);
552 rc &= 0x7F;
553 rc |= (adev->devno << 7);
554 iowrite8(rc, ap->ioaddr.lbal_addr);
555
556
557 iowrite8(active << 4 | recover, ap->ioaddr.error_addr);
558
559
560
561 rc = ioread8(ap->ioaddr.device_addr);
562 rc &= 0xC0;
563 rc |= adev->devno;
564 rc |= (setup << 4) | 0x04;
565 iowrite8(rc, ap->ioaddr.device_addr);
566
567
568 iowrite8(active << 4 | recover, ap->ioaddr.data_addr);
569
570
571 rc = ioread8(ap->ioaddr.lbal_addr);
572 rc &= 0x73;
573 rc |= 0x84;
574 iowrite8(rc, ap->ioaddr.lbal_addr);
575
576
577 iowrite8(0x83, ap->ioaddr.nsect_addr);
578
579
580 ap->host->private_data = ap;
581}
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598static unsigned int opti82c46x_qc_issue(struct ata_queued_cmd *qc)
599{
600 struct ata_port *ap = qc->ap;
601 struct ata_device *adev = qc->dev;
602
603
604
605 if (ap->host->private_data != ap->host
606 && ap->host->private_data != NULL)
607 opti82c46x_set_piomode(ap, adev);
608
609 return ata_sff_qc_issue(qc);
610}
611
612static struct ata_port_operations opti82c46x_port_ops = {
613 .inherits = &legacy_base_port_ops,
614 .set_piomode = opti82c46x_set_piomode,
615 .qc_issue = opti82c46x_qc_issue,
616};
617
618static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev)
619{
620 struct ata_timing t;
621 struct legacy_data *ld_qdi = ap->host->private_data;
622 int active, recovery;
623 u8 timing;
624
625
626 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
627
628 if (ld_qdi->fast) {
629 active = 8 - clamp_val(t.active, 1, 8);
630 recovery = 18 - clamp_val(t.recover, 3, 18);
631 } else {
632 active = 9 - clamp_val(t.active, 2, 9);
633 recovery = 15 - clamp_val(t.recover, 0, 15);
634 }
635 timing = (recovery << 4) | active | 0x08;
636
637 ld_qdi->clock[adev->devno] = timing;
638
639 outb(timing, ld_qdi->timing);
640}
641
642
643
644
645
646
647
648
649
650
651static void qdi6580dp_set_piomode(struct ata_port *ap, struct ata_device *adev)
652{
653 struct ata_timing t;
654 struct legacy_data *ld_qdi = ap->host->private_data;
655 int active, recovery;
656 u8 timing;
657
658
659 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
660
661 if (ld_qdi->fast) {
662 active = 8 - clamp_val(t.active, 1, 8);
663 recovery = 18 - clamp_val(t.recover, 3, 18);
664 } else {
665 active = 9 - clamp_val(t.active, 2, 9);
666 recovery = 15 - clamp_val(t.recover, 0, 15);
667 }
668 timing = (recovery << 4) | active | 0x08;
669
670 ld_qdi->clock[adev->devno] = timing;
671
672 outb(timing, ld_qdi->timing + 2 * ap->port_no);
673
674 if (adev->class != ATA_DEV_ATA)
675 outb(0x5F, ld_qdi->timing + 3);
676}
677
678
679
680
681
682
683
684
685
686
687
688static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev)
689{
690 struct ata_timing t;
691 struct legacy_data *ld_qdi = ap->host->private_data;
692 int active, recovery;
693 u8 timing;
694
695
696 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
697
698 if (ld_qdi->fast) {
699 active = 8 - clamp_val(t.active, 1, 8);
700 recovery = 18 - clamp_val(t.recover, 3, 18);
701 } else {
702 active = 9 - clamp_val(t.active, 2, 9);
703 recovery = 15 - clamp_val(t.recover, 0, 15);
704 }
705 timing = (recovery << 4) | active | 0x08;
706 ld_qdi->clock[adev->devno] = timing;
707 outb(timing, ld_qdi->timing + 2 * adev->devno);
708
709 if (adev->class != ATA_DEV_ATA)
710 outb(0x5F, ld_qdi->timing + 3);
711}
712
713
714
715
716
717
718
719
720
721static unsigned int qdi_qc_issue(struct ata_queued_cmd *qc)
722{
723 struct ata_port *ap = qc->ap;
724 struct ata_device *adev = qc->dev;
725 struct legacy_data *ld_qdi = ap->host->private_data;
726
727 if (ld_qdi->clock[adev->devno] != ld_qdi->last) {
728 if (adev->pio_mode) {
729 ld_qdi->last = ld_qdi->clock[adev->devno];
730 outb(ld_qdi->clock[adev->devno], ld_qdi->timing +
731 2 * ap->port_no);
732 }
733 }
734 return ata_sff_qc_issue(qc);
735}
736
737static unsigned int vlb32_data_xfer(struct ata_device *adev, unsigned char *buf,
738 unsigned int buflen, int rw)
739{
740 struct ata_port *ap = adev->link->ap;
741 int slop = buflen & 3;
742
743 if (ata_id_has_dword_io(adev->id) && (slop == 0 || slop == 3)
744 && (ap->pflags & ATA_PFLAG_PIO32)) {
745 if (rw == WRITE)
746 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
747 else
748 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
749
750 if (unlikely(slop)) {
751 __le32 pad;
752 if (rw == WRITE) {
753 memcpy(&pad, buf + buflen - slop, slop);
754 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
755 } else {
756 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
757 memcpy(buf + buflen - slop, &pad, slop);
758 }
759 }
760 return (buflen + 3) & ~3;
761 } else
762 return ata_sff_data_xfer(adev, buf, buflen, rw);
763}
764
765static int qdi_port(struct platform_device *dev,
766 struct legacy_probe *lp, struct legacy_data *ld)
767{
768 if (devm_request_region(&dev->dev, lp->private, 4, "qdi") == NULL)
769 return -EBUSY;
770 ld->timing = lp->private;
771 return 0;
772}
773
774static struct ata_port_operations qdi6500_port_ops = {
775 .inherits = &legacy_base_port_ops,
776 .set_piomode = qdi6500_set_piomode,
777 .qc_issue = qdi_qc_issue,
778 .sff_data_xfer = vlb32_data_xfer,
779};
780
781static struct ata_port_operations qdi6580_port_ops = {
782 .inherits = &legacy_base_port_ops,
783 .set_piomode = qdi6580_set_piomode,
784 .sff_data_xfer = vlb32_data_xfer,
785};
786
787static struct ata_port_operations qdi6580dp_port_ops = {
788 .inherits = &legacy_base_port_ops,
789 .set_piomode = qdi6580dp_set_piomode,
790 .sff_data_xfer = vlb32_data_xfer,
791};
792
793static DEFINE_SPINLOCK(winbond_lock);
794
795static void winbond_writecfg(unsigned long port, u8 reg, u8 val)
796{
797 unsigned long flags;
798 spin_lock_irqsave(&winbond_lock, flags);
799 outb(reg, port + 0x01);
800 outb(val, port + 0x02);
801 spin_unlock_irqrestore(&winbond_lock, flags);
802}
803
804static u8 winbond_readcfg(unsigned long port, u8 reg)
805{
806 u8 val;
807
808 unsigned long flags;
809 spin_lock_irqsave(&winbond_lock, flags);
810 outb(reg, port + 0x01);
811 val = inb(port + 0x02);
812 spin_unlock_irqrestore(&winbond_lock, flags);
813
814 return val;
815}
816
817static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev)
818{
819 struct ata_timing t;
820 struct legacy_data *ld_winbond = ap->host->private_data;
821 int active, recovery;
822 u8 reg;
823 int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);
824
825 reg = winbond_readcfg(ld_winbond->timing, 0x81);
826
827
828 if (reg & 0x40)
829 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
830 else
831 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
832
833 active = (clamp_val(t.active, 3, 17) - 1) & 0x0F;
834 recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F;
835 timing = (active << 4) | recovery;
836 winbond_writecfg(ld_winbond->timing, timing, reg);
837
838
839
840 reg = 0x35;
841 if (adev->class != ATA_DEV_ATA)
842 reg |= 0x08;
843 if (!ata_pio_need_iordy(adev))
844 reg |= 0x02;
845 reg |= (clamp_val(t.setup, 0, 3) << 6);
846 winbond_writecfg(ld_winbond->timing, timing + 1, reg);
847}
848
849static int winbond_port(struct platform_device *dev,
850 struct legacy_probe *lp, struct legacy_data *ld)
851{
852 if (devm_request_region(&dev->dev, lp->private, 4, "winbond") == NULL)
853 return -EBUSY;
854 ld->timing = lp->private;
855 return 0;
856}
857
858static struct ata_port_operations winbond_port_ops = {
859 .inherits = &legacy_base_port_ops,
860 .set_piomode = winbond_set_piomode,
861 .sff_data_xfer = vlb32_data_xfer,
862};
863
864static struct legacy_controller controllers[] = {
865 {"BIOS", &legacy_port_ops, 0x1F,
866 ATA_FLAG_NO_IORDY, 0, NULL },
867 {"Snooping", &simple_port_ops, 0x1F,
868 0, 0, NULL },
869 {"PDC20230", &pdc20230_port_ops, 0x7,
870 ATA_FLAG_NO_IORDY,
871 ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, NULL },
872 {"HT6560A", &ht6560a_port_ops, 0x07,
873 ATA_FLAG_NO_IORDY, 0, NULL },
874 {"HT6560B", &ht6560b_port_ops, 0x1F,
875 ATA_FLAG_NO_IORDY, 0, NULL },
876 {"OPTI82C611A", &opti82c611a_port_ops, 0x0F,
877 0, 0, NULL },
878 {"OPTI82C46X", &opti82c46x_port_ops, 0x0F,
879 0, 0, NULL },
880 {"QDI6500", &qdi6500_port_ops, 0x07,
881 ATA_FLAG_NO_IORDY,
882 ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
883 {"QDI6580", &qdi6580_port_ops, 0x1F,
884 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
885 {"QDI6580DP", &qdi6580dp_port_ops, 0x1F,
886 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
887 {"W83759A", &winbond_port_ops, 0x1F,
888 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE,
889 winbond_port }
890};
891
892
893
894
895
896
897
898
899
900static __init int probe_chip_type(struct legacy_probe *probe)
901{
902 int mask = 1 << probe->slot;
903
904 if (winbond && (probe->port == 0x1F0 || probe->port == 0x170)) {
905 u8 reg = winbond_readcfg(winbond, 0x81);
906 reg |= 0x80;
907 winbond_writecfg(winbond, 0x81, reg);
908 reg = winbond_readcfg(winbond, 0x83);
909 reg |= 0xF0;
910 winbond_writecfg(winbond, 0x83, reg);
911 reg = winbond_readcfg(winbond, 0x85);
912 reg |= 0xF0;
913 winbond_writecfg(winbond, 0x85, reg);
914
915 reg = winbond_readcfg(winbond, 0x81);
916
917 if (reg & mask)
918 return W83759A;
919 }
920 if (probe->port == 0x1F0) {
921 unsigned long flags;
922 local_irq_save(flags);
923
924 outb(inb(0x1F2) | 0x80, 0x1F2);
925 inb(0x1F5);
926 inb(0x1F2);
927 inb(0x3F6);
928 inb(0x3F6);
929 inb(0x1F2);
930 inb(0x1F2);
931
932 if ((inb(0x1F2) & 0x80) == 0) {
933
934 printk(KERN_INFO "PDC20230-C/20630 VLB ATA controller"
935 " detected.\n");
936 udelay(100);
937 inb(0x1F5);
938 local_irq_restore(flags);
939 return PDC20230;
940 } else {
941 outb(0x55, 0x1F2);
942 inb(0x1F2);
943 inb(0x1F2);
944 if (inb(0x1F2) == 0x00)
945 printk(KERN_INFO "PDC20230-B VLB ATA "
946 "controller detected.\n");
947 local_irq_restore(flags);
948 return BIOS;
949 }
950 local_irq_restore(flags);
951 }
952
953 if (ht6560a & mask)
954 return HT6560A;
955 if (ht6560b & mask)
956 return HT6560B;
957 if (opti82c611a & mask)
958 return OPTI611A;
959 if (opti82c46x & mask)
960 return OPTI46X;
961 if (autospeed & mask)
962 return SNOOP;
963 return BIOS;
964}
965
966
967
968
969
970
971
972
973
974
975static __init int legacy_init_one(struct legacy_probe *probe)
976{
977 struct legacy_controller *controller = &controllers[probe->type];
978 int pio_modes = controller->pio_mask;
979 unsigned long io = probe->port;
980 u32 mask = (1 << probe->slot);
981 struct ata_port_operations *ops = controller->ops;
982 struct legacy_data *ld = &legacy_data[probe->slot];
983 struct ata_host *host = NULL;
984 struct ata_port *ap;
985 struct platform_device *pdev;
986 struct ata_device *dev;
987 void __iomem *io_addr, *ctrl_addr;
988 u32 iordy = (iordy_mask & mask) ? 0: ATA_FLAG_NO_IORDY;
989 int ret;
990
991 iordy |= controller->flags;
992
993 pdev = platform_device_register_simple(DRV_NAME, probe->slot, NULL, 0);
994 if (IS_ERR(pdev))
995 return PTR_ERR(pdev);
996
997 ret = -EBUSY;
998 if (devm_request_region(&pdev->dev, io, 8, "pata_legacy") == NULL ||
999 devm_request_region(&pdev->dev, io + 0x0206, 1,
1000 "pata_legacy") == NULL)
1001 goto fail;
1002
1003 ret = -ENOMEM;
1004 io_addr = devm_ioport_map(&pdev->dev, io, 8);
1005 ctrl_addr = devm_ioport_map(&pdev->dev, io + 0x0206, 1);
1006 if (!io_addr || !ctrl_addr)
1007 goto fail;
1008 if (controller->setup)
1009 if (controller->setup(pdev, probe, ld) < 0)
1010 goto fail;
1011 host = ata_host_alloc(&pdev->dev, 1);
1012 if (!host)
1013 goto fail;
1014 ap = host->ports[0];
1015
1016 ap->ops = ops;
1017 ap->pio_mask = pio_modes;
1018 ap->flags |= ATA_FLAG_SLAVE_POSS | iordy;
1019 ap->pflags |= controller->pflags;
1020 ap->ioaddr.cmd_addr = io_addr;
1021 ap->ioaddr.altstatus_addr = ctrl_addr;
1022 ap->ioaddr.ctl_addr = ctrl_addr;
1023 ata_sff_std_ports(&ap->ioaddr);
1024 ap->host->private_data = ld;
1025
1026 ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io, io + 0x0206);
1027
1028 ret = ata_host_activate(host, probe->irq, ata_sff_interrupt, 0,
1029 &legacy_sht);
1030 if (ret)
1031 goto fail;
1032 async_synchronize_full();
1033 ld->platform_dev = pdev;
1034
1035
1036
1037 ret = -ENODEV;
1038 ata_for_each_dev(dev, &ap->link, ALL) {
1039 if (!ata_dev_absent(dev)) {
1040 legacy_host[probe->slot] = host;
1041 ld->platform_dev = pdev;
1042 return 0;
1043 }
1044 }
1045 ata_host_detach(host);
1046fail:
1047 platform_device_unregister(pdev);
1048 return ret;
1049}
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064static void __init legacy_check_special_cases(struct pci_dev *p, int *primary,
1065 int *secondary)
1066{
1067
1068 if (p->vendor == 0x1078 && p->device == 0x0000) {
1069 *primary = *secondary = 1;
1070 return;
1071 }
1072
1073 if (p->vendor == 0x1078 && p->device == 0x0002) {
1074 *primary = *secondary = 1;
1075 return;
1076 }
1077
1078 if (p->vendor == 0x8086 && p->device == 0x1234) {
1079 u16 r;
1080 pci_read_config_word(p, 0x6C, &r);
1081 if (r & 0x8000) {
1082
1083 if (r & 0x4000)
1084 *secondary = 1;
1085 else
1086 *primary = 1;
1087 }
1088 return;
1089 }
1090}
1091
1092static __init void probe_opti_vlb(void)
1093{
1094
1095 static const char *optis[4] = {
1096 "3/463MV", "5MV",
1097 "5MVA", "5MVB"
1098 };
1099 u8 chans = 1;
1100 u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6;
1101
1102 opti82c46x = 3;
1103 printk(KERN_INFO DRV_NAME ": Opti 82C46%s chipset support.\n",
1104 optis[ctrl]);
1105 if (ctrl == 3)
1106 chans = (opti_syscfg(0x3F) & 0x20) ? 2 : 1;
1107 ctrl = opti_syscfg(0xAC);
1108
1109
1110 if (ctrl & 8) {
1111 if (chans == 2) {
1112 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1113 legacy_probe_add(0x170, 15, OPTI46X, 0);
1114 }
1115 if (ctrl & 4)
1116 legacy_probe_add(0x170, 15, OPTI46X, 0);
1117 else
1118 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1119 } else
1120 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1121}
1122
1123static __init void qdi65_identify_port(u8 r, u8 res, unsigned long port)
1124{
1125 static const unsigned long ide_port[2] = { 0x170, 0x1F0 };
1126
1127 if ((r & 0xF0) == 0xC0) {
1128
1129 if (r & 8)
1130
1131 return;
1132 legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),
1133 QDI6500, port);
1134 }
1135 if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) {
1136
1137 if (!request_region(port + 2 , 2, "pata_qdi")) {
1138 release_region(port, 2);
1139 return;
1140 }
1141 res = inb(port + 3);
1142
1143 if (res & 1)
1144 legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),
1145 QDI6580, port);
1146 else {
1147 legacy_probe_add(0x1F0, 14, QDI6580DP, port);
1148
1149 legacy_probe_add(0x170, 15, QDI6580DP, port + 2);
1150 }
1151 release_region(port + 2, 2);
1152 }
1153}
1154
1155static __init void probe_qdi_vlb(void)
1156{
1157 unsigned long flags;
1158 static const unsigned long qd_port[2] = { 0x30, 0xB0 };
1159 int i;
1160
1161
1162
1163
1164
1165 for (i = 0; i < 2; i++) {
1166 unsigned long port = qd_port[i];
1167 u8 r, res;
1168
1169
1170 if (request_region(port, 2, "pata_qdi")) {
1171
1172 local_irq_save(flags);
1173
1174
1175 r = inb(port);
1176 udelay(1);
1177 outb(0x19, port);
1178 udelay(1);
1179 res = inb(port);
1180 udelay(1);
1181 outb(r, port);
1182 udelay(1);
1183 local_irq_restore(flags);
1184
1185
1186 if (res == 0x19) {
1187 release_region(port, 2);
1188 continue;
1189 }
1190
1191 r = inb(port + 1);
1192 udelay(1);
1193
1194 if ((r & 2) >> 1 == i)
1195 qdi65_identify_port(r, res, port);
1196 release_region(port, 2);
1197 }
1198 }
1199}
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211static __init int legacy_init(void)
1212{
1213 int i;
1214 int ct = 0;
1215 int primary = 0;
1216 int secondary = 0;
1217 int pci_present = 0;
1218 struct legacy_probe *pl = &probe_list[0];
1219 int slot = 0;
1220
1221 struct pci_dev *p = NULL;
1222
1223 for_each_pci_dev(p) {
1224 int r;
1225
1226
1227
1228 for (r = 0; r < 6; r++) {
1229 if (pci_resource_start(p, r) == 0x1f0)
1230 primary = 1;
1231 if (pci_resource_start(p, r) == 0x170)
1232 secondary = 1;
1233 }
1234
1235 legacy_check_special_cases(p, &primary, &secondary);
1236
1237
1238
1239 pci_present = 1;
1240 }
1241
1242 if (winbond == 1)
1243 winbond = 0x130;
1244
1245 if (primary == 0 || all)
1246 legacy_probe_add(0x1F0, 14, UNKNOWN, 0);
1247 if (secondary == 0 || all)
1248 legacy_probe_add(0x170, 15, UNKNOWN, 0);
1249
1250 if (probe_all || !pci_present) {
1251
1252 legacy_probe_add(0x1E8, 11, UNKNOWN, 0);
1253 legacy_probe_add(0x168, 10, UNKNOWN, 0);
1254 legacy_probe_add(0x1E0, 8, UNKNOWN, 0);
1255 legacy_probe_add(0x160, 12, UNKNOWN, 0);
1256 }
1257
1258 if (opti82c46x)
1259 probe_opti_vlb();
1260 if (qdi)
1261 probe_qdi_vlb();
1262
1263 for (i = 0; i < NR_HOST; i++, pl++) {
1264 if (pl->port == 0)
1265 continue;
1266 if (pl->type == UNKNOWN)
1267 pl->type = probe_chip_type(pl);
1268 pl->slot = slot++;
1269 if (legacy_init_one(pl) == 0)
1270 ct++;
1271 }
1272 if (ct != 0)
1273 return 0;
1274 return -ENODEV;
1275}
1276
1277static __exit void legacy_exit(void)
1278{
1279 int i;
1280
1281 for (i = 0; i < nr_legacy_host; i++) {
1282 struct legacy_data *ld = &legacy_data[i];
1283 ata_host_detach(legacy_host[i]);
1284 platform_device_unregister(ld->platform_dev);
1285 }
1286}
1287
1288MODULE_AUTHOR("Alan Cox");
1289MODULE_DESCRIPTION("low-level driver for legacy ATA");
1290MODULE_LICENSE("GPL");
1291MODULE_VERSION(DRV_VERSION);
1292
1293module_param(probe_all, int, 0);
1294module_param(autospeed, int, 0);
1295module_param(ht6560a, int, 0);
1296module_param(ht6560b, int, 0);
1297module_param(opti82c611a, int, 0);
1298module_param(opti82c46x, int, 0);
1299module_param(qdi, int, 0);
1300module_param(pio_mask, int, 0);
1301module_param(iordy_mask, int, 0);
1302
1303module_init(legacy_init);
1304module_exit(legacy_exit);
1305