linux/drivers/atm/eni.h
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   1/* drivers/atm/eni.h - Efficient Networks ENI155P device driver declarations */
   2 
   3/* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
   4 
   5 
   6#ifndef DRIVER_ATM_ENI_H
   7#define DRIVER_ATM_ENI_H
   8
   9#include <linux/atm.h>
  10#include <linux/atmdev.h>
  11#include <linux/sonet.h>
  12#include <linux/skbuff.h>
  13#include <linux/time.h>
  14#include <linux/pci.h>
  15#include <linux/spinlock.h>
  16#include <asm/atomic.h>
  17
  18#include "midway.h"
  19
  20
  21#define DEV_LABEL       "eni"
  22
  23#define UBR_BUFFER      (128*1024)      /* UBR buffer size */
  24
  25#define RX_DMA_BUF        8             /* burst and skip a few things */
  26#define TX_DMA_BUF      100             /* should be enough for 64 kB */
  27
  28#define DEFAULT_RX_MULT 300             /* max_sdu*3 */
  29#define DEFAULT_TX_MULT 300             /* max_sdu*3 */
  30
  31#define ENI_ZEROES_SIZE   4             /* need that many DMA-able zero bytes */
  32
  33
  34struct eni_free {
  35        void __iomem *start;            /* counting in bytes */
  36        int order;
  37};
  38
  39struct eni_tx {
  40        void __iomem *send;             /* base, 0 if unused */
  41        int prescaler;                  /* shaping prescaler */
  42        int resolution;                 /* shaping divider */
  43        unsigned long tx_pos;           /* current TX write position */
  44        unsigned long words;            /* size of TX queue */
  45        int index;                      /* TX channel number */
  46        int reserved;                   /* reserved peak cell rate */
  47        int shaping;                    /* shaped peak cell rate */
  48        struct sk_buff_head backlog;    /* queue of waiting TX buffers */
  49};
  50
  51struct eni_vcc {
  52        int (*rx)(struct atm_vcc *vcc); /* RX function, NULL if none */
  53        void __iomem *recv;             /* receive buffer */
  54        unsigned long words;            /* its size in words */
  55        unsigned long descr;            /* next descriptor (RX) */
  56        unsigned long rx_pos;           /* current RX descriptor pos */
  57        struct eni_tx *tx;              /* TXer, NULL if none */
  58        int rxing;                      /* number of pending PDUs */
  59        int servicing;                  /* number of waiting VCs (0 or 1) */
  60        int txing;                      /* number of pending TX bytes */
  61        ktime_t timestamp;              /* for RX timing */
  62        struct atm_vcc *next;           /* next pending RX */
  63        struct sk_buff *last;           /* last PDU being DMAed (used to carry
  64                                           discard information) */
  65};
  66
  67struct eni_dev {
  68        /*-------------------------------- spinlock */
  69        spinlock_t lock;                /* sync with interrupt */
  70        struct tasklet_struct task;     /* tasklet for interrupt work */
  71        u32 events;                     /* pending events */
  72        /*-------------------------------- base pointers into Midway address
  73                                           space */
  74        void __iomem *phy;              /* PHY interface chip registers */
  75        void __iomem *reg;              /* register base */
  76        void __iomem *ram;              /* RAM base */
  77        void __iomem *vci;              /* VCI table */
  78        void __iomem *rx_dma;           /* RX DMA queue */
  79        void __iomem *tx_dma;           /* TX DMA queue */
  80        void __iomem *service;          /* service list */
  81        /*-------------------------------- TX part */
  82        struct eni_tx tx[NR_CHAN];      /* TX channels */
  83        struct eni_tx *ubr;             /* UBR channel */
  84        struct sk_buff_head tx_queue;   /* PDUs currently being TX DMAed*/
  85        wait_queue_head_t tx_wait;      /* for close */
  86        int tx_bw;                      /* remaining bandwidth */
  87        u32 dma[TX_DMA_BUF*2];          /* DMA request scratch area */
  88        int tx_mult;                    /* buffer size multiplier (percent) */
  89        /*-------------------------------- RX part */
  90        u32 serv_read;                  /* host service read index */
  91        struct atm_vcc *fast,*last_fast;/* queues of VCCs with pending PDUs */
  92        struct atm_vcc *slow,*last_slow;
  93        struct atm_vcc **rx_map;        /* for fast lookups */
  94        struct sk_buff_head rx_queue;   /* PDUs currently being RX-DMAed */
  95        wait_queue_head_t rx_wait;      /* for close */
  96        int rx_mult;                    /* buffer size multiplier (percent) */
  97        /*-------------------------------- statistics */
  98        unsigned long lost;             /* number of lost cells (RX) */
  99        /*-------------------------------- memory management */
 100        unsigned long base_diff;        /* virtual-real base address */
 101        int free_len;                   /* free list length */
 102        struct eni_free *free_list;     /* free list */
 103        int free_list_size;             /* maximum size of free list */
 104        /*-------------------------------- ENI links */
 105        struct atm_dev *more;           /* other ENI devices */
 106        /*-------------------------------- general information */
 107        int mem;                        /* RAM on board (in bytes) */
 108        int asic;                       /* PCI interface type, 0 for FPGA */
 109        unsigned int irq;               /* IRQ */
 110        struct pci_dev *pci_dev;        /* PCI stuff */
 111};
 112
 113
 114#define ENI_DEV(d) ((struct eni_dev *) (d)->dev_data)
 115#define ENI_VCC(d) ((struct eni_vcc *) (d)->dev_data)
 116
 117
 118struct eni_skb_prv {
 119        struct atm_skb_data _;          /* reserved */
 120        unsigned long pos;              /* position of next descriptor */
 121        int size;                       /* PDU size in reassembly buffer */
 122        dma_addr_t paddr;               /* DMA handle */
 123};
 124
 125#define ENI_PRV_SIZE(skb) (((struct eni_skb_prv *) (skb)->cb)->size)
 126#define ENI_PRV_POS(skb) (((struct eni_skb_prv *) (skb)->cb)->pos)
 127#define ENI_PRV_PADDR(skb) (((struct eni_skb_prv *) (skb)->cb)->paddr)
 128
 129#endif
 130