1
2
3
4
5
6#include <linux/module.h>
7#include <linux/kernel.h>
8#include <linux/mm.h>
9#include <linux/pci.h>
10#include <linux/errno.h>
11#include <linux/atm.h>
12#include <linux/atmdev.h>
13#include <linux/sonet.h>
14#include <linux/skbuff.h>
15#include <linux/netdevice.h>
16#include <linux/delay.h>
17#include <linux/uio.h>
18#include <linux/init.h>
19#include <linux/dma-mapping.h>
20#include <linux/atm_zatm.h>
21#include <linux/capability.h>
22#include <linux/bitops.h>
23#include <linux/wait.h>
24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/string.h>
27#include <asm/io.h>
28#include <asm/atomic.h>
29#include <asm/uaccess.h>
30
31#include "uPD98401.h"
32#include "uPD98402.h"
33#include "zeprom.h"
34#include "zatm.h"
35
36
37
38
39
40
41
42
43
44
45
46
47
48#define ZATM_COPPER 1
49
50#if 0
51#define DPRINTK(format,args...) printk(KERN_DEBUG format,##args)
52#else
53#define DPRINTK(format,args...)
54#endif
55
56#ifndef CONFIG_ATM_ZATM_DEBUG
57
58
59#define NULLCHECK(x)
60
61#define EVENT(s,a,b)
62
63
64static void event_dump(void)
65{
66}
67
68
69#else
70
71
72
73
74
75
76#define NULLCHECK(x) \
77 if ((unsigned long) (x) < 0x30) printk(KERN_CRIT #x "==0x%x\n", (int) (x))
78
79
80
81
82
83
84#define EV 64
85
86static const char *ev[EV];
87static unsigned long ev_a[EV],ev_b[EV];
88static int ec = 0;
89
90
91static void EVENT(const char *s,unsigned long a,unsigned long b)
92{
93 ev[ec] = s;
94 ev_a[ec] = a;
95 ev_b[ec] = b;
96 ec = (ec+1) % EV;
97}
98
99
100static void event_dump(void)
101{
102 int n,i;
103
104 printk(KERN_NOTICE "----- event dump follows -----\n");
105 for (n = 0; n < EV; n++) {
106 i = (ec+n) % EV;
107 printk(KERN_NOTICE);
108 printk(ev[i] ? ev[i] : "(null)",ev_a[i],ev_b[i]);
109 }
110 printk(KERN_NOTICE "----- event dump ends here -----\n");
111}
112
113
114#endif
115
116
117#define RING_BUSY 1
118
119
120static struct atm_dev *zatm_boards = NULL;
121static unsigned long dummy[2] = {0,0};
122
123
124#define zin_n(r) inl(zatm_dev->base+r*4)
125#define zin(r) inl(zatm_dev->base+uPD98401_##r*4)
126#define zout(v,r) outl(v,zatm_dev->base+uPD98401_##r*4)
127#define zwait while (zin(CMR) & uPD98401_BUSY)
128
129
130static const int mbx_entries[NR_MBX] = { 1024,1024,1024,1024 };
131static const int mbx_esize[NR_MBX] = { 16,16,4,4 };
132
133#define MBX_SIZE(i) (mbx_entries[i]*mbx_esize[i])
134
135
136
137
138
139static void zpokel(struct zatm_dev *zatm_dev,u32 value,u32 addr)
140{
141 zwait;
142 zout(value,CER);
143 zout(uPD98401_IND_ACC | uPD98401_IA_BALL |
144 (uPD98401_IA_TGT_CM << uPD98401_IA_TGT_SHIFT) | addr,CMR);
145}
146
147
148static u32 zpeekl(struct zatm_dev *zatm_dev,u32 addr)
149{
150 zwait;
151 zout(uPD98401_IND_ACC | uPD98401_IA_BALL | uPD98401_IA_RW |
152 (uPD98401_IA_TGT_CM << uPD98401_IA_TGT_SHIFT) | addr,CMR);
153 zwait;
154 return zin(CER);
155}
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170struct rx_buffer_head {
171 u32 buffer;
172 u32 link;
173 struct sk_buff *skb;
174};
175
176
177static void refill_pool(struct atm_dev *dev,int pool)
178{
179 struct zatm_dev *zatm_dev;
180 struct sk_buff *skb;
181 struct rx_buffer_head *first;
182 unsigned long flags;
183 int align,offset,free,count,size;
184
185 EVENT("refill_pool\n",0,0);
186 zatm_dev = ZATM_DEV(dev);
187 size = (64 << (pool <= ZATM_AAL5_POOL_BASE ? 0 :
188 pool-ZATM_AAL5_POOL_BASE))+sizeof(struct rx_buffer_head);
189 if (size < PAGE_SIZE) {
190 align = 32;
191 offset = sizeof(struct rx_buffer_head);
192 }
193 else {
194 align = 4096;
195 offset = zatm_dev->pool_info[pool].offset+
196 sizeof(struct rx_buffer_head);
197 }
198 size += align;
199 spin_lock_irqsave(&zatm_dev->lock, flags);
200 free = zpeekl(zatm_dev,zatm_dev->pool_base+2*pool) &
201 uPD98401_RXFP_REMAIN;
202 spin_unlock_irqrestore(&zatm_dev->lock, flags);
203 if (free >= zatm_dev->pool_info[pool].low_water) return;
204 EVENT("starting ... POOL: 0x%x, 0x%x\n",
205 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool),
206 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool+1));
207 EVENT("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
208 count = 0;
209 first = NULL;
210 while (free < zatm_dev->pool_info[pool].high_water) {
211 struct rx_buffer_head *head;
212
213 skb = alloc_skb(size,GFP_ATOMIC);
214 if (!skb) {
215 printk(KERN_WARNING DEV_LABEL "(Itf %d): got no new "
216 "skb (%d) with %d free\n",dev->number,size,free);
217 break;
218 }
219 skb_reserve(skb,(unsigned char *) ((((unsigned long) skb->data+
220 align+offset-1) & ~(unsigned long) (align-1))-offset)-
221 skb->data);
222 head = (struct rx_buffer_head *) skb->data;
223 skb_reserve(skb,sizeof(struct rx_buffer_head));
224 if (!first) first = head;
225 count++;
226 head->buffer = virt_to_bus(skb->data);
227 head->link = 0;
228 head->skb = skb;
229 EVENT("enq skb 0x%08lx/0x%08lx\n",(unsigned long) skb,
230 (unsigned long) head);
231 spin_lock_irqsave(&zatm_dev->lock, flags);
232 if (zatm_dev->last_free[pool])
233 ((struct rx_buffer_head *) (zatm_dev->last_free[pool]->
234 data))[-1].link = virt_to_bus(head);
235 zatm_dev->last_free[pool] = skb;
236 skb_queue_tail(&zatm_dev->pool[pool],skb);
237 spin_unlock_irqrestore(&zatm_dev->lock, flags);
238 free++;
239 }
240 if (first) {
241 spin_lock_irqsave(&zatm_dev->lock, flags);
242 zwait;
243 zout(virt_to_bus(first),CER);
244 zout(uPD98401_ADD_BAT | (pool << uPD98401_POOL_SHIFT) | count,
245 CMR);
246 spin_unlock_irqrestore(&zatm_dev->lock, flags);
247 EVENT ("POOL: 0x%x, 0x%x\n",
248 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool),
249 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool+1));
250 EVENT("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
251 }
252}
253
254
255static void drain_free(struct atm_dev *dev,int pool)
256{
257 skb_queue_purge(&ZATM_DEV(dev)->pool[pool]);
258}
259
260
261static int pool_index(int max_pdu)
262{
263 int i;
264
265 if (max_pdu % ATM_CELL_PAYLOAD)
266 printk(KERN_ERR DEV_LABEL ": driver error in pool_index: "
267 "max_pdu is %d\n",max_pdu);
268 if (max_pdu > 65536) return -1;
269 for (i = 0; (64 << i) < max_pdu; i++);
270 return i+ZATM_AAL5_POOL_BASE;
271}
272
273
274
275
276
277static void use_pool(struct atm_dev *dev,int pool)
278{
279 struct zatm_dev *zatm_dev;
280 unsigned long flags;
281 int size;
282
283 zatm_dev = ZATM_DEV(dev);
284 if (!(zatm_dev->pool_info[pool].ref_count++)) {
285 skb_queue_head_init(&zatm_dev->pool[pool]);
286 size = pool-ZATM_AAL5_POOL_BASE;
287 if (size < 0) size = 0;
288 else if (size > 10) size = 10;
289 spin_lock_irqsave(&zatm_dev->lock, flags);
290 zpokel(zatm_dev,((zatm_dev->pool_info[pool].low_water/4) <<
291 uPD98401_RXFP_ALERT_SHIFT) |
292 (1 << uPD98401_RXFP_BTSZ_SHIFT) |
293 (size << uPD98401_RXFP_BFSZ_SHIFT),
294 zatm_dev->pool_base+pool*2);
295 zpokel(zatm_dev,(unsigned long) dummy,zatm_dev->pool_base+
296 pool*2+1);
297 spin_unlock_irqrestore(&zatm_dev->lock, flags);
298 zatm_dev->last_free[pool] = NULL;
299 refill_pool(dev,pool);
300 }
301 DPRINTK("pool %d: %d\n",pool,zatm_dev->pool_info[pool].ref_count);
302}
303
304
305static void unuse_pool(struct atm_dev *dev,int pool)
306{
307 if (!(--ZATM_DEV(dev)->pool_info[pool].ref_count))
308 drain_free(dev,pool);
309}
310
311
312
313
314#if 0
315static void exception(struct atm_vcc *vcc)
316{
317 static int count = 0;
318 struct zatm_dev *zatm_dev = ZATM_DEV(vcc->dev);
319 struct zatm_vcc *zatm_vcc = ZATM_VCC(vcc);
320 unsigned long *qrp;
321 int i;
322
323 if (count++ > 2) return;
324 for (i = 0; i < 8; i++)
325 printk("TX%d: 0x%08lx\n",i,
326 zpeekl(zatm_dev,zatm_vcc->tx_chan*VC_SIZE/4+i));
327 for (i = 0; i < 5; i++)
328 printk("SH%d: 0x%08lx\n",i,
329 zpeekl(zatm_dev,uPD98401_IM(zatm_vcc->shaper)+16*i));
330 qrp = (unsigned long *) zpeekl(zatm_dev,zatm_vcc->tx_chan*VC_SIZE/4+
331 uPD98401_TXVC_QRP);
332 printk("qrp=0x%08lx\n",(unsigned long) qrp);
333 for (i = 0; i < 4; i++) printk("QRP[%d]: 0x%08lx",i,qrp[i]);
334}
335#endif
336
337
338static const char *err_txt[] = {
339 "No error",
340 "RX buf underflow",
341 "RX FIFO overrun",
342 "Maximum len violation",
343 "CRC error",
344 "User abort",
345 "Length violation",
346 "T1 error",
347 "Deactivated",
348 "???",
349 "???",
350 "???",
351 "???",
352 "???",
353 "???",
354 "???"
355};
356
357
358static void poll_rx(struct atm_dev *dev,int mbx)
359{
360 struct zatm_dev *zatm_dev;
361 unsigned long pos;
362 u32 x;
363 int error;
364
365 EVENT("poll_rx\n",0,0);
366 zatm_dev = ZATM_DEV(dev);
367 pos = (zatm_dev->mbx_start[mbx] & ~0xffffUL) | zin(MTA(mbx));
368 while (x = zin(MWA(mbx)), (pos & 0xffff) != x) {
369 u32 *here;
370 struct sk_buff *skb;
371 struct atm_vcc *vcc;
372 int cells,size,chan;
373
374 EVENT("MBX: host 0x%lx, nic 0x%x\n",pos,x);
375 here = (u32 *) pos;
376 if (((pos += 16) & 0xffff) == zatm_dev->mbx_end[mbx])
377 pos = zatm_dev->mbx_start[mbx];
378 cells = here[0] & uPD98401_AAL5_SIZE;
379#if 0
380printk("RX IND: 0x%x, 0x%x, 0x%x, 0x%x\n",here[0],here[1],here[2],here[3]);
381{
382unsigned long *x;
383 printk("POOL: 0x%08x, 0x%08x\n",zpeekl(zatm_dev,
384 zatm_dev->pool_base),
385 zpeekl(zatm_dev,zatm_dev->pool_base+1));
386 x = (unsigned long *) here[2];
387 printk("[0..3] = 0x%08lx, 0x%08lx, 0x%08lx, 0x%08lx\n",
388 x[0],x[1],x[2],x[3]);
389}
390#endif
391 error = 0;
392 if (here[3] & uPD98401_AAL5_ERR) {
393 error = (here[3] & uPD98401_AAL5_ES) >>
394 uPD98401_AAL5_ES_SHIFT;
395 if (error == uPD98401_AAL5_ES_DEACT ||
396 error == uPD98401_AAL5_ES_FREE) continue;
397 }
398EVENT("error code 0x%x/0x%x\n",(here[3] & uPD98401_AAL5_ES) >>
399 uPD98401_AAL5_ES_SHIFT,error);
400 skb = ((struct rx_buffer_head *) bus_to_virt(here[2]))->skb;
401 __net_timestamp(skb);
402#if 0
403printk("[-3..0] 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n",((unsigned *) skb->data)[-3],
404 ((unsigned *) skb->data)[-2],((unsigned *) skb->data)[-1],
405 ((unsigned *) skb->data)[0]);
406#endif
407 EVENT("skb 0x%lx, here 0x%lx\n",(unsigned long) skb,
408 (unsigned long) here);
409#if 0
410printk("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
411#endif
412 size = error ? 0 : ntohs(((__be16 *) skb->data)[cells*
413 ATM_CELL_PAYLOAD/sizeof(u16)-3]);
414 EVENT("got skb 0x%lx, size %d\n",(unsigned long) skb,size);
415 chan = (here[3] & uPD98401_AAL5_CHAN) >>
416 uPD98401_AAL5_CHAN_SHIFT;
417 if (chan < zatm_dev->chans && zatm_dev->rx_map[chan]) {
418 int pos;
419 vcc = zatm_dev->rx_map[chan];
420 pos = ZATM_VCC(vcc)->pool;
421 if (skb == zatm_dev->last_free[pos])
422 zatm_dev->last_free[pos] = NULL;
423 skb_unlink(skb, zatm_dev->pool + pos);
424 }
425 else {
426 printk(KERN_ERR DEV_LABEL "(itf %d): RX indication "
427 "for non-existing channel\n",dev->number);
428 size = 0;
429 vcc = NULL;
430 event_dump();
431 }
432 if (error) {
433 static unsigned long silence = 0;
434 static int last_error = 0;
435
436 if (error != last_error ||
437 time_after(jiffies, silence) || silence == 0){
438 printk(KERN_WARNING DEV_LABEL "(itf %d): "
439 "chan %d error %s\n",dev->number,chan,
440 err_txt[error]);
441 last_error = error;
442 silence = (jiffies+2*HZ)|1;
443 }
444 size = 0;
445 }
446 if (size && (size > cells*ATM_CELL_PAYLOAD-ATM_AAL5_TRAILER ||
447 size <= (cells-1)*ATM_CELL_PAYLOAD-ATM_AAL5_TRAILER)) {
448 printk(KERN_ERR DEV_LABEL "(itf %d): size %d with %d "
449 "cells\n",dev->number,size,cells);
450 size = 0;
451 event_dump();
452 }
453 if (size > ATM_MAX_AAL5_PDU) {
454 printk(KERN_ERR DEV_LABEL "(itf %d): size too big "
455 "(%d)\n",dev->number,size);
456 size = 0;
457 event_dump();
458 }
459 if (!size) {
460 dev_kfree_skb_irq(skb);
461 if (vcc) atomic_inc(&vcc->stats->rx_err);
462 continue;
463 }
464 if (!atm_charge(vcc,skb->truesize)) {
465 dev_kfree_skb_irq(skb);
466 continue;
467 }
468 skb->len = size;
469 ATM_SKB(skb)->vcc = vcc;
470 vcc->push(vcc,skb);
471 atomic_inc(&vcc->stats->rx);
472 }
473 zout(pos & 0xffff,MTA(mbx));
474#if 0
475 refill_pool(dev,zatm_vcc->pool);
476
477#endif
478}
479
480
481static int open_rx_first(struct atm_vcc *vcc)
482{
483 struct zatm_dev *zatm_dev;
484 struct zatm_vcc *zatm_vcc;
485 unsigned long flags;
486 unsigned short chan;
487 int cells;
488
489 DPRINTK("open_rx_first (0x%x)\n",inb_p(0xc053));
490 zatm_dev = ZATM_DEV(vcc->dev);
491 zatm_vcc = ZATM_VCC(vcc);
492 zatm_vcc->rx_chan = 0;
493 if (vcc->qos.rxtp.traffic_class == ATM_NONE) return 0;
494 if (vcc->qos.aal == ATM_AAL5) {
495 if (vcc->qos.rxtp.max_sdu > 65464)
496 vcc->qos.rxtp.max_sdu = 65464;
497
498
499 cells = DIV_ROUND_UP(vcc->qos.rxtp.max_sdu + ATM_AAL5_TRAILER,
500 ATM_CELL_PAYLOAD);
501 zatm_vcc->pool = pool_index(cells*ATM_CELL_PAYLOAD);
502 }
503 else {
504 cells = 1;
505 zatm_vcc->pool = ZATM_AAL0_POOL;
506 }
507 if (zatm_vcc->pool < 0) return -EMSGSIZE;
508 spin_lock_irqsave(&zatm_dev->lock, flags);
509 zwait;
510 zout(uPD98401_OPEN_CHAN,CMR);
511 zwait;
512 DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER));
513 chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT;
514 spin_unlock_irqrestore(&zatm_dev->lock, flags);
515 DPRINTK("chan is %d\n",chan);
516 if (!chan) return -EAGAIN;
517 use_pool(vcc->dev,zatm_vcc->pool);
518 DPRINTK("pool %d\n",zatm_vcc->pool);
519
520 spin_lock_irqsave(&zatm_dev->lock, flags);
521 zpokel(zatm_dev,zatm_vcc->pool << uPD98401_RXVC_POOL_SHIFT,
522 chan*VC_SIZE/4);
523 zpokel(zatm_dev,uPD98401_RXVC_OD | (vcc->qos.aal == ATM_AAL5 ?
524 uPD98401_RXVC_AR : 0) | cells,chan*VC_SIZE/4+1);
525 zpokel(zatm_dev,0,chan*VC_SIZE/4+2);
526 zatm_vcc->rx_chan = chan;
527 zatm_dev->rx_map[chan] = vcc;
528 spin_unlock_irqrestore(&zatm_dev->lock, flags);
529 return 0;
530}
531
532
533static int open_rx_second(struct atm_vcc *vcc)
534{
535 struct zatm_dev *zatm_dev;
536 struct zatm_vcc *zatm_vcc;
537 unsigned long flags;
538 int pos,shift;
539
540 DPRINTK("open_rx_second (0x%x)\n",inb_p(0xc053));
541 zatm_dev = ZATM_DEV(vcc->dev);
542 zatm_vcc = ZATM_VCC(vcc);
543 if (!zatm_vcc->rx_chan) return 0;
544 spin_lock_irqsave(&zatm_dev->lock, flags);
545
546 pos = vcc->vci >> 1;
547 shift = (1-(vcc->vci & 1)) << 4;
548 zpokel(zatm_dev,(zpeekl(zatm_dev,pos) & ~(0xffff << shift)) |
549 ((zatm_vcc->rx_chan | uPD98401_RXLT_ENBL) << shift),pos);
550 spin_unlock_irqrestore(&zatm_dev->lock, flags);
551 return 0;
552}
553
554
555static void close_rx(struct atm_vcc *vcc)
556{
557 struct zatm_dev *zatm_dev;
558 struct zatm_vcc *zatm_vcc;
559 unsigned long flags;
560 int pos,shift;
561
562 zatm_vcc = ZATM_VCC(vcc);
563 zatm_dev = ZATM_DEV(vcc->dev);
564 if (!zatm_vcc->rx_chan) return;
565 DPRINTK("close_rx\n");
566
567 if (vcc->vpi != ATM_VPI_UNSPEC && vcc->vci != ATM_VCI_UNSPEC) {
568 spin_lock_irqsave(&zatm_dev->lock, flags);
569 pos = vcc->vci >> 1;
570 shift = (1-(vcc->vci & 1)) << 4;
571 zpokel(zatm_dev,zpeekl(zatm_dev,pos) & ~(0xffff << shift),pos);
572 zwait;
573 zout(uPD98401_NOP,CMR);
574 zwait;
575 zout(uPD98401_NOP,CMR);
576 spin_unlock_irqrestore(&zatm_dev->lock, flags);
577 }
578 spin_lock_irqsave(&zatm_dev->lock, flags);
579 zwait;
580 zout(uPD98401_DEACT_CHAN | uPD98401_CHAN_RT | (zatm_vcc->rx_chan <<
581 uPD98401_CHAN_ADDR_SHIFT),CMR);
582 zwait;
583 udelay(10);
584 zout(uPD98401_CLOSE_CHAN | uPD98401_CHAN_RT | (zatm_vcc->rx_chan <<
585 uPD98401_CHAN_ADDR_SHIFT),CMR);
586 zwait;
587 if (!(zin(CMR) & uPD98401_CHAN_ADDR))
588 printk(KERN_CRIT DEV_LABEL "(itf %d): can't close RX channel "
589 "%d\n",vcc->dev->number,zatm_vcc->rx_chan);
590 spin_unlock_irqrestore(&zatm_dev->lock, flags);
591 zatm_dev->rx_map[zatm_vcc->rx_chan] = NULL;
592 zatm_vcc->rx_chan = 0;
593 unuse_pool(vcc->dev,zatm_vcc->pool);
594}
595
596
597static int start_rx(struct atm_dev *dev)
598{
599 struct zatm_dev *zatm_dev;
600 int size,i;
601
602DPRINTK("start_rx\n");
603 zatm_dev = ZATM_DEV(dev);
604 size = sizeof(struct atm_vcc *)*zatm_dev->chans;
605 zatm_dev->rx_map = kzalloc(size,GFP_KERNEL);
606 if (!zatm_dev->rx_map) return -ENOMEM;
607
608 zpokel(zatm_dev,(1 << dev->ci_range.vci_bits)-1,uPD98401_VRR);
609
610 for (i = 0; i <= ZATM_LAST_POOL; i++) {
611 zatm_dev->pool_info[i].ref_count = 0;
612 zatm_dev->pool_info[i].rqa_count = 0;
613 zatm_dev->pool_info[i].rqu_count = 0;
614 zatm_dev->pool_info[i].low_water = LOW_MARK;
615 zatm_dev->pool_info[i].high_water = HIGH_MARK;
616 zatm_dev->pool_info[i].offset = 0;
617 zatm_dev->pool_info[i].next_off = 0;
618 zatm_dev->pool_info[i].next_cnt = 0;
619 zatm_dev->pool_info[i].next_thres = OFF_CNG_THRES;
620 }
621 return 0;
622}
623
624
625
626
627
628static int do_tx(struct sk_buff *skb)
629{
630 struct atm_vcc *vcc;
631 struct zatm_dev *zatm_dev;
632 struct zatm_vcc *zatm_vcc;
633 u32 *dsc;
634 unsigned long flags;
635
636 EVENT("do_tx\n",0,0);
637 DPRINTK("sending skb %p\n",skb);
638 vcc = ATM_SKB(skb)->vcc;
639 zatm_dev = ZATM_DEV(vcc->dev);
640 zatm_vcc = ZATM_VCC(vcc);
641 EVENT("iovcnt=%d\n",skb_shinfo(skb)->nr_frags,0);
642 spin_lock_irqsave(&zatm_dev->lock, flags);
643 if (!skb_shinfo(skb)->nr_frags) {
644 if (zatm_vcc->txing == RING_ENTRIES-1) {
645 spin_unlock_irqrestore(&zatm_dev->lock, flags);
646 return RING_BUSY;
647 }
648 zatm_vcc->txing++;
649 dsc = zatm_vcc->ring+zatm_vcc->ring_curr;
650 zatm_vcc->ring_curr = (zatm_vcc->ring_curr+RING_WORDS) &
651 (RING_ENTRIES*RING_WORDS-1);
652 dsc[1] = 0;
653 dsc[2] = skb->len;
654 dsc[3] = virt_to_bus(skb->data);
655 mb();
656 dsc[0] = uPD98401_TXPD_V | uPD98401_TXPD_DP | uPD98401_TXPD_SM
657 | (vcc->qos.aal == ATM_AAL5 ? uPD98401_TXPD_AAL5 : 0 |
658 (ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ?
659 uPD98401_CLPM_1 : uPD98401_CLPM_0));
660 EVENT("dsc (0x%lx)\n",(unsigned long) dsc,0);
661 }
662 else {
663printk("NONONONOO!!!!\n");
664 dsc = NULL;
665#if 0
666 u32 *put;
667 int i;
668
669 dsc = kmalloc(uPD98401_TXPD_SIZE * 2 +
670 uPD98401_TXBD_SIZE * ATM_SKB(skb)->iovcnt, GFP_ATOMIC);
671 if (!dsc) {
672 if (vcc->pop)
673 vcc->pop(vcc, skb);
674 else
675 dev_kfree_skb_irq(skb);
676 return -EAGAIN;
677 }
678
679 put = dsc+8;
680 dsc[0] = uPD98401_TXPD_V | uPD98401_TXPD_DP |
681 (vcc->aal == ATM_AAL5 ? uPD98401_TXPD_AAL5 : 0 |
682 (ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ?
683 uPD98401_CLPM_1 : uPD98401_CLPM_0));
684 dsc[1] = 0;
685 dsc[2] = ATM_SKB(skb)->iovcnt * uPD98401_TXBD_SIZE;
686 dsc[3] = virt_to_bus(put);
687 for (i = 0; i < ATM_SKB(skb)->iovcnt; i++) {
688 *put++ = ((struct iovec *) skb->data)[i].iov_len;
689 *put++ = virt_to_bus(((struct iovec *)
690 skb->data)[i].iov_base);
691 }
692 put[-2] |= uPD98401_TXBD_LAST;
693#endif
694 }
695 ZATM_PRV_DSC(skb) = dsc;
696 skb_queue_tail(&zatm_vcc->tx_queue,skb);
697 DPRINTK("QRP=0x%08lx\n",zpeekl(zatm_dev,zatm_vcc->tx_chan*VC_SIZE/4+
698 uPD98401_TXVC_QRP));
699 zwait;
700 zout(uPD98401_TX_READY | (zatm_vcc->tx_chan <<
701 uPD98401_CHAN_ADDR_SHIFT),CMR);
702 spin_unlock_irqrestore(&zatm_dev->lock, flags);
703 EVENT("done\n",0,0);
704 return 0;
705}
706
707
708static inline void dequeue_tx(struct atm_vcc *vcc)
709{
710 struct zatm_vcc *zatm_vcc;
711 struct sk_buff *skb;
712
713 EVENT("dequeue_tx\n",0,0);
714 zatm_vcc = ZATM_VCC(vcc);
715 skb = skb_dequeue(&zatm_vcc->tx_queue);
716 if (!skb) {
717 printk(KERN_CRIT DEV_LABEL "(itf %d): dequeue_tx but not "
718 "txing\n",vcc->dev->number);
719 return;
720 }
721#if 0
722if (*ZATM_PRV_DSC(skb) != (uPD98401_TXPD_V | uPD98401_TXPD_DP |
723 uPD98401_TXPD_SM | uPD98401_TXPD_AAL5)) printk("@#*$!!!! (%08x)\n",
724 *ZATM_PRV_DSC(skb));
725#endif
726 *ZATM_PRV_DSC(skb) = 0;
727 zatm_vcc->txing--;
728 if (vcc->pop) vcc->pop(vcc,skb);
729 else dev_kfree_skb_irq(skb);
730 while ((skb = skb_dequeue(&zatm_vcc->backlog)))
731 if (do_tx(skb) == RING_BUSY) {
732 skb_queue_head(&zatm_vcc->backlog,skb);
733 break;
734 }
735 atomic_inc(&vcc->stats->tx);
736 wake_up(&zatm_vcc->tx_wait);
737}
738
739
740static void poll_tx(struct atm_dev *dev,int mbx)
741{
742 struct zatm_dev *zatm_dev;
743 unsigned long pos;
744 u32 x;
745
746 EVENT("poll_tx\n",0,0);
747 zatm_dev = ZATM_DEV(dev);
748 pos = (zatm_dev->mbx_start[mbx] & ~0xffffUL) | zin(MTA(mbx));
749 while (x = zin(MWA(mbx)), (pos & 0xffff) != x) {
750 int chan;
751
752#if 1
753 u32 data,*addr;
754
755 EVENT("MBX: host 0x%lx, nic 0x%x\n",pos,x);
756 addr = (u32 *) pos;
757 data = *addr;
758 chan = (data & uPD98401_TXI_CONN) >> uPD98401_TXI_CONN_SHIFT;
759 EVENT("addr = 0x%lx, data = 0x%08x,",(unsigned long) addr,
760 data);
761 EVENT("chan = %d\n",chan,0);
762#else
763NO !
764 chan = (zatm_dev->mbx_start[mbx][pos >> 2] & uPD98401_TXI_CONN)
765 >> uPD98401_TXI_CONN_SHIFT;
766#endif
767 if (chan < zatm_dev->chans && zatm_dev->tx_map[chan])
768 dequeue_tx(zatm_dev->tx_map[chan]);
769 else {
770 printk(KERN_CRIT DEV_LABEL "(itf %d): TX indication "
771 "for non-existing channel %d\n",dev->number,chan);
772 event_dump();
773 }
774 if (((pos += 4) & 0xffff) == zatm_dev->mbx_end[mbx])
775 pos = zatm_dev->mbx_start[mbx];
776 }
777 zout(pos & 0xffff,MTA(mbx));
778}
779
780
781
782
783
784
785static int alloc_shaper(struct atm_dev *dev,int *pcr,int min,int max,int ubr)
786{
787 struct zatm_dev *zatm_dev;
788 unsigned long flags;
789 unsigned long i,m,c;
790 int shaper;
791
792 DPRINTK("alloc_shaper (min = %d, max = %d)\n",min,max);
793 zatm_dev = ZATM_DEV(dev);
794 if (!zatm_dev->free_shapers) return -EAGAIN;
795 for (shaper = 0; !((zatm_dev->free_shapers >> shaper) & 1); shaper++);
796 zatm_dev->free_shapers &= ~1 << shaper;
797 if (ubr) {
798 c = 5;
799 i = m = 1;
800 zatm_dev->ubr_ref_cnt++;
801 zatm_dev->ubr = shaper;
802 *pcr = 0;
803 }
804 else {
805 if (min) {
806 if (min <= 255) {
807 i = min;
808 m = ATM_OC3_PCR;
809 }
810 else {
811 i = 255;
812 m = ATM_OC3_PCR*255/min;
813 }
814 }
815 else {
816 if (max > zatm_dev->tx_bw) max = zatm_dev->tx_bw;
817 if (max <= 255) {
818 i = max;
819 m = ATM_OC3_PCR;
820 }
821 else {
822 i = 255;
823 m = DIV_ROUND_UP(ATM_OC3_PCR*255, max);
824 }
825 }
826 if (i > m) {
827 printk(KERN_CRIT DEV_LABEL "shaper algorithm botched "
828 "[%d,%d] -> i=%ld,m=%ld\n",min,max,i,m);
829 m = i;
830 }
831 *pcr = i*ATM_OC3_PCR/m;
832 c = 20;
833 if ((min && *pcr < min) || (max && *pcr > max)) return -EINVAL;
834 if (zatm_dev->tx_bw < *pcr) return -EAGAIN;
835 zatm_dev->tx_bw -= *pcr;
836 }
837 spin_lock_irqsave(&zatm_dev->lock, flags);
838 DPRINTK("i = %d, m = %d, PCR = %d\n",i,m,*pcr);
839 zpokel(zatm_dev,(i << uPD98401_IM_I_SHIFT) | m,uPD98401_IM(shaper));
840 zpokel(zatm_dev,c << uPD98401_PC_C_SHIFT,uPD98401_PC(shaper));
841 zpokel(zatm_dev,0,uPD98401_X(shaper));
842 zpokel(zatm_dev,0,uPD98401_Y(shaper));
843 zpokel(zatm_dev,uPD98401_PS_E,uPD98401_PS(shaper));
844 spin_unlock_irqrestore(&zatm_dev->lock, flags);
845 return shaper;
846}
847
848
849static void dealloc_shaper(struct atm_dev *dev,int shaper)
850{
851 struct zatm_dev *zatm_dev;
852 unsigned long flags;
853
854 zatm_dev = ZATM_DEV(dev);
855 if (shaper == zatm_dev->ubr) {
856 if (--zatm_dev->ubr_ref_cnt) return;
857 zatm_dev->ubr = -1;
858 }
859 spin_lock_irqsave(&zatm_dev->lock, flags);
860 zpokel(zatm_dev,zpeekl(zatm_dev,uPD98401_PS(shaper)) & ~uPD98401_PS_E,
861 uPD98401_PS(shaper));
862 spin_unlock_irqrestore(&zatm_dev->lock, flags);
863 zatm_dev->free_shapers |= 1 << shaper;
864}
865
866
867static void close_tx(struct atm_vcc *vcc)
868{
869 struct zatm_dev *zatm_dev;
870 struct zatm_vcc *zatm_vcc;
871 unsigned long flags;
872 int chan;
873
874 zatm_vcc = ZATM_VCC(vcc);
875 zatm_dev = ZATM_DEV(vcc->dev);
876 chan = zatm_vcc->tx_chan;
877 if (!chan) return;
878 DPRINTK("close_tx\n");
879 if (skb_peek(&zatm_vcc->backlog)) {
880 printk("waiting for backlog to drain ...\n");
881 event_dump();
882 wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->backlog));
883 }
884 if (skb_peek(&zatm_vcc->tx_queue)) {
885 printk("waiting for TX queue to drain ...\n");
886 event_dump();
887 wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->tx_queue));
888 }
889 spin_lock_irqsave(&zatm_dev->lock, flags);
890#if 0
891 zwait;
892 zout(uPD98401_DEACT_CHAN | (chan << uPD98401_CHAN_ADDR_SHIFT),CMR);
893#endif
894 zwait;
895 zout(uPD98401_CLOSE_CHAN | (chan << uPD98401_CHAN_ADDR_SHIFT),CMR);
896 zwait;
897 if (!(zin(CMR) & uPD98401_CHAN_ADDR))
898 printk(KERN_CRIT DEV_LABEL "(itf %d): can't close TX channel "
899 "%d\n",vcc->dev->number,chan);
900 spin_unlock_irqrestore(&zatm_dev->lock, flags);
901 zatm_vcc->tx_chan = 0;
902 zatm_dev->tx_map[chan] = NULL;
903 if (zatm_vcc->shaper != zatm_dev->ubr) {
904 zatm_dev->tx_bw += vcc->qos.txtp.min_pcr;
905 dealloc_shaper(vcc->dev,zatm_vcc->shaper);
906 }
907 kfree(zatm_vcc->ring);
908}
909
910
911static int open_tx_first(struct atm_vcc *vcc)
912{
913 struct zatm_dev *zatm_dev;
914 struct zatm_vcc *zatm_vcc;
915 unsigned long flags;
916 u32 *loop;
917 unsigned short chan;
918 int unlimited;
919
920 DPRINTK("open_tx_first\n");
921 zatm_dev = ZATM_DEV(vcc->dev);
922 zatm_vcc = ZATM_VCC(vcc);
923 zatm_vcc->tx_chan = 0;
924 if (vcc->qos.txtp.traffic_class == ATM_NONE) return 0;
925 spin_lock_irqsave(&zatm_dev->lock, flags);
926 zwait;
927 zout(uPD98401_OPEN_CHAN,CMR);
928 zwait;
929 DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER));
930 chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT;
931 spin_unlock_irqrestore(&zatm_dev->lock, flags);
932 DPRINTK("chan is %d\n",chan);
933 if (!chan) return -EAGAIN;
934 unlimited = vcc->qos.txtp.traffic_class == ATM_UBR &&
935 (!vcc->qos.txtp.max_pcr || vcc->qos.txtp.max_pcr == ATM_MAX_PCR ||
936 vcc->qos.txtp.max_pcr >= ATM_OC3_PCR);
937 if (unlimited && zatm_dev->ubr != -1) zatm_vcc->shaper = zatm_dev->ubr;
938 else {
939 int uninitialized_var(pcr);
940
941 if (unlimited) vcc->qos.txtp.max_sdu = ATM_MAX_AAL5_PDU;
942 if ((zatm_vcc->shaper = alloc_shaper(vcc->dev,&pcr,
943 vcc->qos.txtp.min_pcr,vcc->qos.txtp.max_pcr,unlimited))
944 < 0) {
945 close_tx(vcc);
946 return zatm_vcc->shaper;
947 }
948 if (pcr > ATM_OC3_PCR) pcr = ATM_OC3_PCR;
949 vcc->qos.txtp.min_pcr = vcc->qos.txtp.max_pcr = pcr;
950 }
951 zatm_vcc->tx_chan = chan;
952 skb_queue_head_init(&zatm_vcc->tx_queue);
953 init_waitqueue_head(&zatm_vcc->tx_wait);
954
955 zatm_vcc->ring = kzalloc(RING_SIZE,GFP_KERNEL);
956 if (!zatm_vcc->ring) return -ENOMEM;
957 loop = zatm_vcc->ring+RING_ENTRIES*RING_WORDS;
958 loop[0] = uPD98401_TXPD_V;
959 loop[1] = loop[2] = 0;
960 loop[3] = virt_to_bus(zatm_vcc->ring);
961 zatm_vcc->ring_curr = 0;
962 zatm_vcc->txing = 0;
963 skb_queue_head_init(&zatm_vcc->backlog);
964 zpokel(zatm_dev,virt_to_bus(zatm_vcc->ring),
965 chan*VC_SIZE/4+uPD98401_TXVC_QRP);
966 return 0;
967}
968
969
970static int open_tx_second(struct atm_vcc *vcc)
971{
972 struct zatm_dev *zatm_dev;
973 struct zatm_vcc *zatm_vcc;
974 unsigned long flags;
975
976 DPRINTK("open_tx_second\n");
977 zatm_dev = ZATM_DEV(vcc->dev);
978 zatm_vcc = ZATM_VCC(vcc);
979 if (!zatm_vcc->tx_chan) return 0;
980
981 spin_lock_irqsave(&zatm_dev->lock, flags);
982 zpokel(zatm_dev,0,zatm_vcc->tx_chan*VC_SIZE/4);
983 zpokel(zatm_dev,uPD98401_TXVC_L | (zatm_vcc->shaper <<
984 uPD98401_TXVC_SHP_SHIFT) | (vcc->vpi << uPD98401_TXVC_VPI_SHIFT) |
985 vcc->vci,zatm_vcc->tx_chan*VC_SIZE/4+1);
986 zpokel(zatm_dev,0,zatm_vcc->tx_chan*VC_SIZE/4+2);
987 spin_unlock_irqrestore(&zatm_dev->lock, flags);
988 zatm_dev->tx_map[zatm_vcc->tx_chan] = vcc;
989 return 0;
990}
991
992
993static int start_tx(struct atm_dev *dev)
994{
995 struct zatm_dev *zatm_dev;
996 int i;
997
998 DPRINTK("start_tx\n");
999 zatm_dev = ZATM_DEV(dev);
1000 zatm_dev->tx_map = kmalloc(sizeof(struct atm_vcc *)*
1001 zatm_dev->chans,GFP_KERNEL);
1002 if (!zatm_dev->tx_map) return -ENOMEM;
1003 zatm_dev->tx_bw = ATM_OC3_PCR;
1004 zatm_dev->free_shapers = (1 << NR_SHAPERS)-1;
1005 zatm_dev->ubr = -1;
1006 zatm_dev->ubr_ref_cnt = 0;
1007
1008 for (i = 0; i < NR_SHAPERS; i++) zpokel(zatm_dev,0,uPD98401_PS(i));
1009 return 0;
1010}
1011
1012
1013
1014
1015
1016static irqreturn_t zatm_int(int irq,void *dev_id)
1017{
1018 struct atm_dev *dev;
1019 struct zatm_dev *zatm_dev;
1020 u32 reason;
1021 int handled = 0;
1022
1023 dev = dev_id;
1024 zatm_dev = ZATM_DEV(dev);
1025 while ((reason = zin(GSR))) {
1026 handled = 1;
1027 EVENT("reason 0x%x\n",reason,0);
1028 if (reason & uPD98401_INT_PI) {
1029 EVENT("PHY int\n",0,0);
1030 dev->phy->interrupt(dev);
1031 }
1032 if (reason & uPD98401_INT_RQA) {
1033 unsigned long pools;
1034 int i;
1035
1036 pools = zin(RQA);
1037 EVENT("RQA (0x%08x)\n",pools,0);
1038 for (i = 0; pools; i++) {
1039 if (pools & 1) {
1040 refill_pool(dev,i);
1041 zatm_dev->pool_info[i].rqa_count++;
1042 }
1043 pools >>= 1;
1044 }
1045 }
1046 if (reason & uPD98401_INT_RQU) {
1047 unsigned long pools;
1048 int i;
1049 pools = zin(RQU);
1050 printk(KERN_WARNING DEV_LABEL "(itf %d): RQU 0x%08lx\n",
1051 dev->number,pools);
1052 event_dump();
1053 for (i = 0; pools; i++) {
1054 if (pools & 1) {
1055 refill_pool(dev,i);
1056 zatm_dev->pool_info[i].rqu_count++;
1057 }
1058 pools >>= 1;
1059 }
1060 }
1061
1062 if (reason & uPD98401_INT_SPE)
1063 printk(KERN_ALERT DEV_LABEL "(itf %d): system parity "
1064 "error at 0x%08x\n",dev->number,zin(ADDR));
1065 if (reason & uPD98401_INT_CPE)
1066 printk(KERN_ALERT DEV_LABEL "(itf %d): control memory "
1067 "parity error at 0x%08x\n",dev->number,zin(ADDR));
1068 if (reason & uPD98401_INT_SBE) {
1069 printk(KERN_ALERT DEV_LABEL "(itf %d): system bus "
1070 "error at 0x%08x\n",dev->number,zin(ADDR));
1071 event_dump();
1072 }
1073
1074 if (reason & uPD98401_INT_MF) {
1075 printk(KERN_CRIT DEV_LABEL "(itf %d): mailbox full "
1076 "(0x%x)\n",dev->number,(reason & uPD98401_INT_MF)
1077 >> uPD98401_INT_MF_SHIFT);
1078 event_dump();
1079
1080 }
1081 if (reason & uPD98401_INT_MM) {
1082 if (reason & 1) poll_rx(dev,0);
1083 if (reason & 2) poll_rx(dev,1);
1084 if (reason & 4) poll_tx(dev,2);
1085 if (reason & 8) poll_tx(dev,3);
1086 }
1087
1088 }
1089 return IRQ_RETVAL(handled);
1090}
1091
1092
1093
1094
1095
1096static void __devinit eprom_set(struct zatm_dev *zatm_dev,unsigned long value,
1097 unsigned short cmd)
1098{
1099 int error;
1100
1101 if ((error = pci_write_config_dword(zatm_dev->pci_dev,cmd,value)))
1102 printk(KERN_ERR DEV_LABEL ": PCI write failed (0x%02x)\n",
1103 error);
1104}
1105
1106
1107static unsigned long __devinit eprom_get(struct zatm_dev *zatm_dev,
1108 unsigned short cmd)
1109{
1110 unsigned int value;
1111 int error;
1112
1113 if ((error = pci_read_config_dword(zatm_dev->pci_dev,cmd,&value)))
1114 printk(KERN_ERR DEV_LABEL ": PCI read failed (0x%02x)\n",
1115 error);
1116 return value;
1117}
1118
1119
1120static void __devinit eprom_put_bits(struct zatm_dev *zatm_dev,
1121 unsigned long data,int bits,unsigned short cmd)
1122{
1123 unsigned long value;
1124 int i;
1125
1126 for (i = bits-1; i >= 0; i--) {
1127 value = ZEPROM_CS | (((data >> i) & 1) ? ZEPROM_DI : 0);
1128 eprom_set(zatm_dev,value,cmd);
1129 eprom_set(zatm_dev,value | ZEPROM_SK,cmd);
1130 eprom_set(zatm_dev,value,cmd);
1131 }
1132}
1133
1134
1135static void __devinit eprom_get_byte(struct zatm_dev *zatm_dev,
1136 unsigned char *byte,unsigned short cmd)
1137{
1138 int i;
1139
1140 *byte = 0;
1141 for (i = 8; i; i--) {
1142 eprom_set(zatm_dev,ZEPROM_CS,cmd);
1143 eprom_set(zatm_dev,ZEPROM_CS | ZEPROM_SK,cmd);
1144 *byte <<= 1;
1145 if (eprom_get(zatm_dev,cmd) & ZEPROM_DO) *byte |= 1;
1146 eprom_set(zatm_dev,ZEPROM_CS,cmd);
1147 }
1148}
1149
1150
1151static unsigned char __devinit eprom_try_esi(struct atm_dev *dev,
1152 unsigned short cmd,int offset,int swap)
1153{
1154 unsigned char buf[ZEPROM_SIZE];
1155 struct zatm_dev *zatm_dev;
1156 int i;
1157
1158 zatm_dev = ZATM_DEV(dev);
1159 for (i = 0; i < ZEPROM_SIZE; i += 2) {
1160 eprom_set(zatm_dev,ZEPROM_CS,cmd);
1161 eprom_put_bits(zatm_dev,ZEPROM_CMD_READ,ZEPROM_CMD_LEN,cmd);
1162 eprom_put_bits(zatm_dev,i >> 1,ZEPROM_ADDR_LEN,cmd);
1163 eprom_get_byte(zatm_dev,buf+i+swap,cmd);
1164 eprom_get_byte(zatm_dev,buf+i+1-swap,cmd);
1165 eprom_set(zatm_dev,0,cmd);
1166 }
1167 memcpy(dev->esi,buf+offset,ESI_LEN);
1168 return memcmp(dev->esi,"\0\0\0\0\0",ESI_LEN);
1169}
1170
1171
1172static void __devinit eprom_get_esi(struct atm_dev *dev)
1173{
1174 if (eprom_try_esi(dev,ZEPROM_V1_REG,ZEPROM_V1_ESI_OFF,1)) return;
1175 (void) eprom_try_esi(dev,ZEPROM_V2_REG,ZEPROM_V2_ESI_OFF,0);
1176}
1177
1178
1179
1180
1181
1182static int __devinit zatm_init(struct atm_dev *dev)
1183{
1184 struct zatm_dev *zatm_dev;
1185 struct pci_dev *pci_dev;
1186 unsigned short command;
1187 int error,i,last;
1188 unsigned long t0,t1,t2;
1189
1190 DPRINTK(">zatm_init\n");
1191 zatm_dev = ZATM_DEV(dev);
1192 spin_lock_init(&zatm_dev->lock);
1193 pci_dev = zatm_dev->pci_dev;
1194 zatm_dev->base = pci_resource_start(pci_dev, 0);
1195 zatm_dev->irq = pci_dev->irq;
1196 if ((error = pci_read_config_word(pci_dev,PCI_COMMAND,&command))) {
1197 printk(KERN_ERR DEV_LABEL "(itf %d): init error 0x%02x\n",
1198 dev->number,error);
1199 return -EINVAL;
1200 }
1201 if ((error = pci_write_config_word(pci_dev,PCI_COMMAND,
1202 command | PCI_COMMAND_IO | PCI_COMMAND_MASTER))) {
1203 printk(KERN_ERR DEV_LABEL "(itf %d): can't enable IO (0x%02x)"
1204 "\n",dev->number,error);
1205 return -EIO;
1206 }
1207 eprom_get_esi(dev);
1208 printk(KERN_NOTICE DEV_LABEL "(itf %d): rev.%d,base=0x%x,irq=%d,",
1209 dev->number,pci_dev->revision,zatm_dev->base,zatm_dev->irq);
1210
1211 zout(0,SWR);
1212 while (!(zin(GSR) & uPD98401_INT_IND));
1213 zout(uPD98401_GMR_ONE ,GMR);
1214 last = MAX_CRAM_SIZE;
1215 for (i = last-RAM_INCREMENT; i >= 0; i -= RAM_INCREMENT) {
1216 zpokel(zatm_dev,0x55555555,i);
1217 if (zpeekl(zatm_dev,i) != 0x55555555) last = i;
1218 else {
1219 zpokel(zatm_dev,0xAAAAAAAA,i);
1220 if (zpeekl(zatm_dev,i) != 0xAAAAAAAA) last = i;
1221 else zpokel(zatm_dev,i,i);
1222 }
1223 }
1224 for (i = 0; i < last; i += RAM_INCREMENT)
1225 if (zpeekl(zatm_dev,i) != i) break;
1226 zatm_dev->mem = i << 2;
1227 while (i) zpokel(zatm_dev,0,--i);
1228
1229 zout(0,SWR);
1230 while (!(zin(GSR) & uPD98401_INT_IND));
1231 zout(uPD98401_GMR_ONE | uPD98401_BURST8 | uPD98401_BURST4 |
1232 uPD98401_BURST2 | uPD98401_GMR_PM | uPD98401_GMR_DR,GMR);
1233
1234 printk("mem=%dkB,%s (",zatm_dev->mem >> 10,zatm_dev->copper ? "UTP" :
1235 "MMF");
1236 for (i = 0; i < ESI_LEN; i++)
1237 printk("%02X%s",dev->esi[i],i == ESI_LEN-1 ? ")\n" : "-");
1238 do {
1239 unsigned long flags;
1240
1241 spin_lock_irqsave(&zatm_dev->lock, flags);
1242 t0 = zpeekl(zatm_dev,uPD98401_TSR);
1243 udelay(10);
1244 t1 = zpeekl(zatm_dev,uPD98401_TSR);
1245 udelay(1010);
1246 t2 = zpeekl(zatm_dev,uPD98401_TSR);
1247 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1248 }
1249 while (t0 > t1 || t1 > t2);
1250 zatm_dev->khz = t2-2*t1+t0;
1251 printk(KERN_NOTICE DEV_LABEL "(itf %d): uPD98401 %d.%d at %d.%03d "
1252 "MHz\n",dev->number,
1253 (zin(VER) & uPD98401_MAJOR) >> uPD98401_MAJOR_SHIFT,
1254 zin(VER) & uPD98401_MINOR,zatm_dev->khz/1000,zatm_dev->khz % 1000);
1255 return uPD98402_init(dev);
1256}
1257
1258
1259static int __devinit zatm_start(struct atm_dev *dev)
1260{
1261 struct zatm_dev *zatm_dev = ZATM_DEV(dev);
1262 struct pci_dev *pdev = zatm_dev->pci_dev;
1263 unsigned long curr;
1264 int pools,vccs,rx;
1265 int error, i, ld;
1266
1267 DPRINTK("zatm_start\n");
1268 zatm_dev->rx_map = zatm_dev->tx_map = NULL;
1269 for (i = 0; i < NR_MBX; i++)
1270 zatm_dev->mbx_start[i] = 0;
1271 error = request_irq(zatm_dev->irq, zatm_int, IRQF_SHARED, DEV_LABEL, dev);
1272 if (error < 0) {
1273 printk(KERN_ERR DEV_LABEL "(itf %d): IRQ%d is already in use\n",
1274 dev->number,zatm_dev->irq);
1275 goto done;
1276 }
1277
1278 pools = NR_POOLS;
1279 if (NR_SHAPERS*SHAPER_SIZE > pools*POOL_SIZE)
1280 pools = NR_SHAPERS*SHAPER_SIZE/POOL_SIZE;
1281 vccs = (zatm_dev->mem-NR_SHAPERS*SHAPER_SIZE-pools*POOL_SIZE)/
1282 (2*VC_SIZE+RX_SIZE);
1283 ld = -1;
1284 for (rx = 1; rx < vccs; rx <<= 1) ld++;
1285 dev->ci_range.vpi_bits = 0;
1286 dev->ci_range.vci_bits = ld;
1287 dev->link_rate = ATM_OC3_PCR;
1288 zatm_dev->chans = vccs;
1289 curr = rx*RX_SIZE/4;
1290 DPRINTK("RX pool 0x%08lx\n",curr);
1291 zpokel(zatm_dev,curr,uPD98401_PMA);
1292 zatm_dev->pool_base = curr;
1293 curr += pools*POOL_SIZE/4;
1294 DPRINTK("Shapers 0x%08lx\n",curr);
1295 zpokel(zatm_dev,curr,uPD98401_SMA);
1296 curr += NR_SHAPERS*SHAPER_SIZE/4;
1297 DPRINTK("Free 0x%08lx\n",curr);
1298 zpokel(zatm_dev,curr,uPD98401_TOS);
1299 printk(KERN_INFO DEV_LABEL "(itf %d): %d shapers, %d pools, %d RX, "
1300 "%ld VCs\n",dev->number,NR_SHAPERS,pools,rx,
1301 (zatm_dev->mem-curr*4)/VC_SIZE);
1302
1303 for (i = 0; i < NR_MBX; i++) {
1304 void *mbx;
1305 dma_addr_t mbx_dma;
1306
1307 if (!mbx_entries[i])
1308 continue;
1309 mbx = pci_alloc_consistent(pdev, 2*MBX_SIZE(i), &mbx_dma);
1310 if (!mbx) {
1311 error = -ENOMEM;
1312 goto out;
1313 }
1314
1315
1316
1317
1318 if (((unsigned long)mbx ^ mbx_dma) & 0xffff) {
1319 printk(KERN_ERR DEV_LABEL "(itf %d): system "
1320 "bus incompatible with driver\n", dev->number);
1321 pci_free_consistent(pdev, 2*MBX_SIZE(i), mbx, mbx_dma);
1322 error = -ENODEV;
1323 goto out;
1324 }
1325 DPRINTK("mbx@0x%08lx-0x%08lx\n", mbx, mbx + MBX_SIZE(i));
1326 zatm_dev->mbx_start[i] = (unsigned long)mbx;
1327 zatm_dev->mbx_dma[i] = mbx_dma;
1328 zatm_dev->mbx_end[i] = (zatm_dev->mbx_start[i] + MBX_SIZE(i)) &
1329 0xffff;
1330 zout(mbx_dma >> 16, MSH(i));
1331 zout(mbx_dma, MSL(i));
1332 zout(zatm_dev->mbx_end[i], MBA(i));
1333 zout((unsigned long)mbx & 0xffff, MTA(i));
1334 zout((unsigned long)mbx & 0xffff, MWA(i));
1335 }
1336 error = start_tx(dev);
1337 if (error)
1338 goto out;
1339 error = start_rx(dev);
1340 if (error)
1341 goto out_tx;
1342 error = dev->phy->start(dev);
1343 if (error)
1344 goto out_rx;
1345 zout(0xffffffff,IMR);
1346
1347 zout(zin(GMR) | uPD98401_GMR_SE | uPD98401_GMR_RE,GMR);
1348done:
1349 return error;
1350
1351out_rx:
1352 kfree(zatm_dev->rx_map);
1353out_tx:
1354 kfree(zatm_dev->tx_map);
1355out:
1356 while (i-- > 0) {
1357 pci_free_consistent(pdev, 2*MBX_SIZE(i),
1358 (void *)zatm_dev->mbx_start[i],
1359 zatm_dev->mbx_dma[i]);
1360 }
1361 free_irq(zatm_dev->irq, dev);
1362 goto done;
1363}
1364
1365
1366static void zatm_close(struct atm_vcc *vcc)
1367{
1368 DPRINTK(">zatm_close\n");
1369 if (!ZATM_VCC(vcc)) return;
1370 clear_bit(ATM_VF_READY,&vcc->flags);
1371 close_rx(vcc);
1372 EVENT("close_tx\n",0,0);
1373 close_tx(vcc);
1374 DPRINTK("zatm_close: done waiting\n");
1375
1376 kfree(ZATM_VCC(vcc));
1377 vcc->dev_data = NULL;
1378 clear_bit(ATM_VF_ADDR,&vcc->flags);
1379}
1380
1381
1382static int zatm_open(struct atm_vcc *vcc)
1383{
1384 struct zatm_dev *zatm_dev;
1385 struct zatm_vcc *zatm_vcc;
1386 short vpi = vcc->vpi;
1387 int vci = vcc->vci;
1388 int error;
1389
1390 DPRINTK(">zatm_open\n");
1391 zatm_dev = ZATM_DEV(vcc->dev);
1392 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
1393 vcc->dev_data = NULL;
1394 if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC)
1395 set_bit(ATM_VF_ADDR,&vcc->flags);
1396 if (vcc->qos.aal != ATM_AAL5) return -EINVAL;
1397 DPRINTK(DEV_LABEL "(itf %d): open %d.%d\n",vcc->dev->number,vcc->vpi,
1398 vcc->vci);
1399 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags)) {
1400 zatm_vcc = kmalloc(sizeof(struct zatm_vcc),GFP_KERNEL);
1401 if (!zatm_vcc) {
1402 clear_bit(ATM_VF_ADDR,&vcc->flags);
1403 return -ENOMEM;
1404 }
1405 vcc->dev_data = zatm_vcc;
1406 ZATM_VCC(vcc)->tx_chan = 0;
1407 if ((error = open_rx_first(vcc))) {
1408 zatm_close(vcc);
1409 return error;
1410 }
1411 if ((error = open_tx_first(vcc))) {
1412 zatm_close(vcc);
1413 return error;
1414 }
1415 }
1416 if (vci == ATM_VPI_UNSPEC || vpi == ATM_VCI_UNSPEC) return 0;
1417 if ((error = open_rx_second(vcc))) {
1418 zatm_close(vcc);
1419 return error;
1420 }
1421 if ((error = open_tx_second(vcc))) {
1422 zatm_close(vcc);
1423 return error;
1424 }
1425 set_bit(ATM_VF_READY,&vcc->flags);
1426 return 0;
1427}
1428
1429
1430static int zatm_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags)
1431{
1432 printk("Not yet implemented\n");
1433 return -ENOSYS;
1434
1435}
1436
1437
1438static int zatm_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
1439{
1440 struct zatm_dev *zatm_dev;
1441 unsigned long flags;
1442
1443 zatm_dev = ZATM_DEV(dev);
1444 switch (cmd) {
1445 case ZATM_GETPOOLZ:
1446 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1447
1448 case ZATM_GETPOOL:
1449 {
1450 struct zatm_pool_info info;
1451 int pool;
1452
1453 if (get_user(pool,
1454 &((struct zatm_pool_req __user *) arg)->pool_num))
1455 return -EFAULT;
1456 if (pool < 0 || pool > ZATM_LAST_POOL)
1457 return -EINVAL;
1458 spin_lock_irqsave(&zatm_dev->lock, flags);
1459 info = zatm_dev->pool_info[pool];
1460 if (cmd == ZATM_GETPOOLZ) {
1461 zatm_dev->pool_info[pool].rqa_count = 0;
1462 zatm_dev->pool_info[pool].rqu_count = 0;
1463 }
1464 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1465 return copy_to_user(
1466 &((struct zatm_pool_req __user *) arg)->info,
1467 &info,sizeof(info)) ? -EFAULT : 0;
1468 }
1469 case ZATM_SETPOOL:
1470 {
1471 struct zatm_pool_info info;
1472 int pool;
1473
1474 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1475 if (get_user(pool,
1476 &((struct zatm_pool_req __user *) arg)->pool_num))
1477 return -EFAULT;
1478 if (pool < 0 || pool > ZATM_LAST_POOL)
1479 return -EINVAL;
1480 if (copy_from_user(&info,
1481 &((struct zatm_pool_req __user *) arg)->info,
1482 sizeof(info))) return -EFAULT;
1483 if (!info.low_water)
1484 info.low_water = zatm_dev->
1485 pool_info[pool].low_water;
1486 if (!info.high_water)
1487 info.high_water = zatm_dev->
1488 pool_info[pool].high_water;
1489 if (!info.next_thres)
1490 info.next_thres = zatm_dev->
1491 pool_info[pool].next_thres;
1492 if (info.low_water >= info.high_water ||
1493 info.low_water < 0)
1494 return -EINVAL;
1495 spin_lock_irqsave(&zatm_dev->lock, flags);
1496 zatm_dev->pool_info[pool].low_water =
1497 info.low_water;
1498 zatm_dev->pool_info[pool].high_water =
1499 info.high_water;
1500 zatm_dev->pool_info[pool].next_thres =
1501 info.next_thres;
1502 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1503 return 0;
1504 }
1505 default:
1506 if (!dev->phy->ioctl) return -ENOIOCTLCMD;
1507 return dev->phy->ioctl(dev,cmd,arg);
1508 }
1509}
1510
1511
1512static int zatm_getsockopt(struct atm_vcc *vcc,int level,int optname,
1513 void __user *optval,int optlen)
1514{
1515 return -EINVAL;
1516}
1517
1518
1519static int zatm_setsockopt(struct atm_vcc *vcc,int level,int optname,
1520 void __user *optval,unsigned int optlen)
1521{
1522 return -EINVAL;
1523}
1524
1525static int zatm_send(struct atm_vcc *vcc,struct sk_buff *skb)
1526{
1527 int error;
1528
1529 EVENT(">zatm_send 0x%lx\n",(unsigned long) skb,0);
1530 if (!ZATM_VCC(vcc)->tx_chan || !test_bit(ATM_VF_READY,&vcc->flags)) {
1531 if (vcc->pop) vcc->pop(vcc,skb);
1532 else dev_kfree_skb(skb);
1533 return -EINVAL;
1534 }
1535 if (!skb) {
1536 printk(KERN_CRIT "!skb in zatm_send ?\n");
1537 if (vcc->pop) vcc->pop(vcc,skb);
1538 return -EINVAL;
1539 }
1540 ATM_SKB(skb)->vcc = vcc;
1541 error = do_tx(skb);
1542 if (error != RING_BUSY) return error;
1543 skb_queue_tail(&ZATM_VCC(vcc)->backlog,skb);
1544 return 0;
1545}
1546
1547
1548static void zatm_phy_put(struct atm_dev *dev,unsigned char value,
1549 unsigned long addr)
1550{
1551 struct zatm_dev *zatm_dev;
1552
1553 zatm_dev = ZATM_DEV(dev);
1554 zwait;
1555 zout(value,CER);
1556 zout(uPD98401_IND_ACC | uPD98401_IA_B0 |
1557 (uPD98401_IA_TGT_PHY << uPD98401_IA_TGT_SHIFT) | addr,CMR);
1558}
1559
1560
1561static unsigned char zatm_phy_get(struct atm_dev *dev,unsigned long addr)
1562{
1563 struct zatm_dev *zatm_dev;
1564
1565 zatm_dev = ZATM_DEV(dev);
1566 zwait;
1567 zout(uPD98401_IND_ACC | uPD98401_IA_B0 | uPD98401_IA_RW |
1568 (uPD98401_IA_TGT_PHY << uPD98401_IA_TGT_SHIFT) | addr,CMR);
1569 zwait;
1570 return zin(CER) & 0xff;
1571}
1572
1573
1574static const struct atmdev_ops ops = {
1575 .open = zatm_open,
1576 .close = zatm_close,
1577 .ioctl = zatm_ioctl,
1578 .getsockopt = zatm_getsockopt,
1579 .setsockopt = zatm_setsockopt,
1580 .send = zatm_send,
1581 .phy_put = zatm_phy_put,
1582 .phy_get = zatm_phy_get,
1583 .change_qos = zatm_change_qos,
1584};
1585
1586static int __devinit zatm_init_one(struct pci_dev *pci_dev,
1587 const struct pci_device_id *ent)
1588{
1589 struct atm_dev *dev;
1590 struct zatm_dev *zatm_dev;
1591 int ret = -ENOMEM;
1592
1593 zatm_dev = kmalloc(sizeof(*zatm_dev), GFP_KERNEL);
1594 if (!zatm_dev) {
1595 printk(KERN_EMERG "%s: memory shortage\n", DEV_LABEL);
1596 goto out;
1597 }
1598
1599 dev = atm_dev_register(DEV_LABEL, &ops, -1, NULL);
1600 if (!dev)
1601 goto out_free;
1602
1603 ret = pci_enable_device(pci_dev);
1604 if (ret < 0)
1605 goto out_deregister;
1606
1607 ret = pci_request_regions(pci_dev, DEV_LABEL);
1608 if (ret < 0)
1609 goto out_disable;
1610
1611 zatm_dev->pci_dev = pci_dev;
1612 dev->dev_data = zatm_dev;
1613 zatm_dev->copper = (int)ent->driver_data;
1614 if ((ret = zatm_init(dev)) || (ret = zatm_start(dev)))
1615 goto out_release;
1616
1617 pci_set_drvdata(pci_dev, dev);
1618 zatm_dev->more = zatm_boards;
1619 zatm_boards = dev;
1620 ret = 0;
1621out:
1622 return ret;
1623
1624out_release:
1625 pci_release_regions(pci_dev);
1626out_disable:
1627 pci_disable_device(pci_dev);
1628out_deregister:
1629 atm_dev_deregister(dev);
1630out_free:
1631 kfree(zatm_dev);
1632 goto out;
1633}
1634
1635
1636MODULE_LICENSE("GPL");
1637
1638static struct pci_device_id zatm_pci_tbl[] __devinitdata = {
1639 { PCI_VENDOR_ID_ZEITNET, PCI_DEVICE_ID_ZEITNET_1221,
1640 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ZATM_COPPER },
1641 { PCI_VENDOR_ID_ZEITNET, PCI_DEVICE_ID_ZEITNET_1225,
1642 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
1643 { 0, }
1644};
1645MODULE_DEVICE_TABLE(pci, zatm_pci_tbl);
1646
1647static struct pci_driver zatm_driver = {
1648 .name = DEV_LABEL,
1649 .id_table = zatm_pci_tbl,
1650 .probe = zatm_init_one,
1651};
1652
1653static int __init zatm_init_module(void)
1654{
1655 return pci_register_driver(&zatm_driver);
1656}
1657
1658module_init(zatm_init_module);
1659
1660
