linux/drivers/char/pcmcia/synclink_cs.c
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   1/*
   2 * linux/drivers/char/pcmcia/synclink_cs.c
   3 *
   4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
   5 *
   6 * Device driver for Microgate SyncLink PC Card
   7 * multiprotocol serial adapter.
   8 *
   9 * written by Paul Fulghum for Microgate Corporation
  10 * paulkf@microgate.com
  11 *
  12 * Microgate and SyncLink are trademarks of Microgate Corporation
  13 *
  14 * This code is released under the GNU General Public License (GPL)
  15 *
  16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26 * OF THE POSSIBILITY OF SUCH DAMAGE.
  27 */
  28
  29#define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  30#if defined(__i386__)
  31#  define BREAKPOINT() asm("   int $3");
  32#else
  33#  define BREAKPOINT() { }
  34#endif
  35
  36#define MAX_DEVICE_COUNT 4
  37
  38#include <linux/module.h>
  39#include <linux/errno.h>
  40#include <linux/signal.h>
  41#include <linux/sched.h>
  42#include <linux/timer.h>
  43#include <linux/time.h>
  44#include <linux/interrupt.h>
  45#include <linux/tty.h>
  46#include <linux/tty_flip.h>
  47#include <linux/serial.h>
  48#include <linux/major.h>
  49#include <linux/string.h>
  50#include <linux/fcntl.h>
  51#include <linux/ptrace.h>
  52#include <linux/ioport.h>
  53#include <linux/mm.h>
  54#include <linux/seq_file.h>
  55#include <linux/slab.h>
  56#include <linux/netdevice.h>
  57#include <linux/vmalloc.h>
  58#include <linux/init.h>
  59#include <linux/delay.h>
  60#include <linux/ioctl.h>
  61#include <linux/synclink.h>
  62
  63#include <asm/system.h>
  64#include <asm/io.h>
  65#include <asm/irq.h>
  66#include <asm/dma.h>
  67#include <linux/bitops.h>
  68#include <asm/types.h>
  69#include <linux/termios.h>
  70#include <linux/workqueue.h>
  71#include <linux/hdlc.h>
  72
  73#include <pcmcia/cs_types.h>
  74#include <pcmcia/cs.h>
  75#include <pcmcia/cistpl.h>
  76#include <pcmcia/cisreg.h>
  77#include <pcmcia/ds.h>
  78
  79#if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  80#define SYNCLINK_GENERIC_HDLC 1
  81#else
  82#define SYNCLINK_GENERIC_HDLC 0
  83#endif
  84
  85#define GET_USER(error,value,addr) error = get_user(value,addr)
  86#define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  87#define PUT_USER(error,value,addr) error = put_user(value,addr)
  88#define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  89
  90#include <asm/uaccess.h>
  91
  92static MGSL_PARAMS default_params = {
  93        MGSL_MODE_HDLC,                 /* unsigned long mode */
  94        0,                              /* unsigned char loopback; */
  95        HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
  96        HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
  97        0,                              /* unsigned long clock_speed; */
  98        0xff,                           /* unsigned char addr_filter; */
  99        HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
 100        HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
 101        HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
 102        9600,                           /* unsigned long data_rate; */
 103        8,                              /* unsigned char data_bits; */
 104        1,                              /* unsigned char stop_bits; */
 105        ASYNC_PARITY_NONE               /* unsigned char parity; */
 106};
 107
 108typedef struct
 109{
 110        int count;
 111        unsigned char status;
 112        char data[1];
 113} RXBUF;
 114
 115/* The queue of BH actions to be performed */
 116
 117#define BH_RECEIVE  1
 118#define BH_TRANSMIT 2
 119#define BH_STATUS   4
 120
 121#define IO_PIN_SHUTDOWN_LIMIT 100
 122
 123#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 124
 125struct _input_signal_events {
 126        int     ri_up;
 127        int     ri_down;
 128        int     dsr_up;
 129        int     dsr_down;
 130        int     dcd_up;
 131        int     dcd_down;
 132        int     cts_up;
 133        int     cts_down;
 134};
 135
 136
 137/*
 138 * Device instance data structure
 139 */
 140
 141typedef struct _mgslpc_info {
 142        struct tty_port         port;
 143        void *if_ptr;   /* General purpose pointer (used by SPPP) */
 144        int                     magic;
 145        int                     line;
 146
 147        struct mgsl_icount      icount;
 148
 149        int                     timeout;
 150        int                     x_char;         /* xon/xoff character */
 151        unsigned char           read_status_mask;
 152        unsigned char           ignore_status_mask;
 153
 154        unsigned char *tx_buf;
 155        int            tx_put;
 156        int            tx_get;
 157        int            tx_count;
 158
 159        /* circular list of fixed length rx buffers */
 160
 161        unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
 162        int            rx_buf_total_size; /* size of memory allocated for rx buffers */
 163        int            rx_put;         /* index of next empty rx buffer */
 164        int            rx_get;         /* index of next full rx buffer */
 165        int            rx_buf_size;    /* size in bytes of single rx buffer */
 166        int            rx_buf_count;   /* total number of rx buffers */
 167        int            rx_frame_count; /* number of full rx buffers */
 168
 169        wait_queue_head_t       status_event_wait_q;
 170        wait_queue_head_t       event_wait_q;
 171        struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
 172        struct _mgslpc_info     *next_device;   /* device list link */
 173
 174        unsigned short imra_value;
 175        unsigned short imrb_value;
 176        unsigned char  pim_value;
 177
 178        spinlock_t lock;
 179        struct work_struct task;                /* task structure for scheduling bh */
 180
 181        u32 max_frame_size;
 182
 183        u32 pending_bh;
 184
 185        bool bh_running;
 186        bool bh_requested;
 187
 188        int dcd_chkcount; /* check counts to prevent */
 189        int cts_chkcount; /* too many IRQs if a signal */
 190        int dsr_chkcount; /* is floating */
 191        int ri_chkcount;
 192
 193        bool rx_enabled;
 194        bool rx_overflow;
 195
 196        bool tx_enabled;
 197        bool tx_active;
 198        bool tx_aborting;
 199        u32 idle_mode;
 200
 201        int if_mode; /* serial interface selection (RS-232, v.35 etc) */
 202
 203        char device_name[25];           /* device instance name */
 204
 205        unsigned int io_base;   /* base I/O address of adapter */
 206        unsigned int irq_level;
 207
 208        MGSL_PARAMS params;             /* communications parameters */
 209
 210        unsigned char serial_signals;   /* current serial signal states */
 211
 212        bool irq_occurred;              /* for diagnostics use */
 213        char testing_irq;
 214        unsigned int init_error;        /* startup error (DIAGS)        */
 215
 216        char flag_buf[MAX_ASYNC_BUFFER_SIZE];
 217        bool drop_rts_on_tx_done;
 218
 219        struct  _input_signal_events    input_signal_events;
 220
 221        /* PCMCIA support */
 222        struct pcmcia_device    *p_dev;
 223        dev_node_t            node;
 224        int                   stop;
 225
 226        /* SPPP/Cisco HDLC device parts */
 227        int netcount;
 228        spinlock_t netlock;
 229
 230#if SYNCLINK_GENERIC_HDLC
 231        struct net_device *netdev;
 232#endif
 233
 234} MGSLPC_INFO;
 235
 236#define MGSLPC_MAGIC 0x5402
 237
 238/*
 239 * The size of the serial xmit buffer is 1 page, or 4096 bytes
 240 */
 241#define TXBUFSIZE 4096
 242
 243
 244#define CHA     0x00   /* channel A offset */
 245#define CHB     0x40   /* channel B offset */
 246
 247/*
 248 *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
 249 */
 250#undef PVR
 251
 252#define RXFIFO  0
 253#define TXFIFO  0
 254#define STAR    0x20
 255#define CMDR    0x20
 256#define RSTA    0x21
 257#define PRE     0x21
 258#define MODE    0x22
 259#define TIMR    0x23
 260#define XAD1    0x24
 261#define XAD2    0x25
 262#define RAH1    0x26
 263#define RAH2    0x27
 264#define DAFO    0x27
 265#define RAL1    0x28
 266#define RFC     0x28
 267#define RHCR    0x29
 268#define RAL2    0x29
 269#define RBCL    0x2a
 270#define XBCL    0x2a
 271#define RBCH    0x2b
 272#define XBCH    0x2b
 273#define CCR0    0x2c
 274#define CCR1    0x2d
 275#define CCR2    0x2e
 276#define CCR3    0x2f
 277#define VSTR    0x34
 278#define BGR     0x34
 279#define RLCR    0x35
 280#define AML     0x36
 281#define AMH     0x37
 282#define GIS     0x38
 283#define IVA     0x38
 284#define IPC     0x39
 285#define ISR     0x3a
 286#define IMR     0x3a
 287#define PVR     0x3c
 288#define PIS     0x3d
 289#define PIM     0x3d
 290#define PCR     0x3e
 291#define CCR4    0x3f
 292
 293// IMR/ISR
 294
 295#define IRQ_BREAK_ON    BIT15   // rx break detected
 296#define IRQ_DATAOVERRUN BIT14   // receive data overflow
 297#define IRQ_ALLSENT     BIT13   // all sent
 298#define IRQ_UNDERRUN    BIT12   // transmit data underrun
 299#define IRQ_TIMER       BIT11   // timer interrupt
 300#define IRQ_CTS         BIT10   // CTS status change
 301#define IRQ_TXREPEAT    BIT9    // tx message repeat
 302#define IRQ_TXFIFO      BIT8    // transmit pool ready
 303#define IRQ_RXEOM       BIT7    // receive message end
 304#define IRQ_EXITHUNT    BIT6    // receive frame start
 305#define IRQ_RXTIME      BIT6    // rx char timeout
 306#define IRQ_DCD         BIT2    // carrier detect status change
 307#define IRQ_OVERRUN     BIT1    // receive frame overflow
 308#define IRQ_RXFIFO      BIT0    // receive pool full
 309
 310// STAR
 311
 312#define XFW   BIT6              // transmit FIFO write enable
 313#define CEC   BIT2              // command executing
 314#define CTS   BIT1              // CTS state
 315
 316#define PVR_DTR      BIT0
 317#define PVR_DSR      BIT1
 318#define PVR_RI       BIT2
 319#define PVR_AUTOCTS  BIT3
 320#define PVR_RS232    0x20   /* 0010b */
 321#define PVR_V35      0xe0   /* 1110b */
 322#define PVR_RS422    0x40   /* 0100b */
 323
 324/* Register access functions */
 325
 326#define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
 327#define read_reg(info, reg) inb((info)->io_base + (reg))
 328
 329#define read_reg16(info, reg) inw((info)->io_base + (reg))
 330#define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
 331
 332#define set_reg_bits(info, reg, mask) \
 333    write_reg(info, (reg), \
 334                 (unsigned char) (read_reg(info, (reg)) | (mask)))
 335#define clear_reg_bits(info, reg, mask) \
 336    write_reg(info, (reg), \
 337                 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
 338/*
 339 * interrupt enable/disable routines
 340 */
 341static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 342{
 343        if (channel == CHA) {
 344                info->imra_value |= mask;
 345                write_reg16(info, CHA + IMR, info->imra_value);
 346        } else {
 347                info->imrb_value |= mask;
 348                write_reg16(info, CHB + IMR, info->imrb_value);
 349        }
 350}
 351static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 352{
 353        if (channel == CHA) {
 354                info->imra_value &= ~mask;
 355                write_reg16(info, CHA + IMR, info->imra_value);
 356        } else {
 357                info->imrb_value &= ~mask;
 358                write_reg16(info, CHB + IMR, info->imrb_value);
 359        }
 360}
 361
 362#define port_irq_disable(info, mask) \
 363  { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
 364
 365#define port_irq_enable(info, mask) \
 366  { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
 367
 368static void rx_start(MGSLPC_INFO *info);
 369static void rx_stop(MGSLPC_INFO *info);
 370
 371static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
 372static void tx_stop(MGSLPC_INFO *info);
 373static void tx_set_idle(MGSLPC_INFO *info);
 374
 375static void get_signals(MGSLPC_INFO *info);
 376static void set_signals(MGSLPC_INFO *info);
 377
 378static void reset_device(MGSLPC_INFO *info);
 379
 380static void hdlc_mode(MGSLPC_INFO *info);
 381static void async_mode(MGSLPC_INFO *info);
 382
 383static void tx_timeout(unsigned long context);
 384
 385static int carrier_raised(struct tty_port *port);
 386static void dtr_rts(struct tty_port *port, int onoff);
 387
 388#if SYNCLINK_GENERIC_HDLC
 389#define dev_to_port(D) (dev_to_hdlc(D)->priv)
 390static void hdlcdev_tx_done(MGSLPC_INFO *info);
 391static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
 392static int  hdlcdev_init(MGSLPC_INFO *info);
 393static void hdlcdev_exit(MGSLPC_INFO *info);
 394#endif
 395
 396static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
 397
 398static bool register_test(MGSLPC_INFO *info);
 399static bool irq_test(MGSLPC_INFO *info);
 400static int adapter_test(MGSLPC_INFO *info);
 401
 402static int claim_resources(MGSLPC_INFO *info);
 403static void release_resources(MGSLPC_INFO *info);
 404static void mgslpc_add_device(MGSLPC_INFO *info);
 405static void mgslpc_remove_device(MGSLPC_INFO *info);
 406
 407static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
 408static void rx_reset_buffers(MGSLPC_INFO *info);
 409static int  rx_alloc_buffers(MGSLPC_INFO *info);
 410static void rx_free_buffers(MGSLPC_INFO *info);
 411
 412static irqreturn_t mgslpc_isr(int irq, void *dev_id);
 413
 414/*
 415 * Bottom half interrupt handlers
 416 */
 417static void bh_handler(struct work_struct *work);
 418static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
 419static void bh_status(MGSLPC_INFO *info);
 420
 421/*
 422 * ioctl handlers
 423 */
 424static int tiocmget(struct tty_struct *tty, struct file *file);
 425static int tiocmset(struct tty_struct *tty, struct file *file,
 426                    unsigned int set, unsigned int clear);
 427static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
 428static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
 429static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
 430static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
 431static int set_txidle(MGSLPC_INFO *info, int idle_mode);
 432static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
 433static int tx_abort(MGSLPC_INFO *info);
 434static int set_rxenable(MGSLPC_INFO *info, int enable);
 435static int wait_events(MGSLPC_INFO *info, int __user *mask);
 436
 437static MGSLPC_INFO *mgslpc_device_list = NULL;
 438static int mgslpc_device_count = 0;
 439
 440/*
 441 * Set this param to non-zero to load eax with the
 442 * .text section address and breakpoint on module load.
 443 * This is useful for use with gdb and add-symbol-file command.
 444 */
 445static int break_on_load=0;
 446
 447/*
 448 * Driver major number, defaults to zero to get auto
 449 * assigned major number. May be forced as module parameter.
 450 */
 451static int ttymajor=0;
 452
 453static int debug_level = 0;
 454static int maxframe[MAX_DEVICE_COUNT] = {0,};
 455
 456module_param(break_on_load, bool, 0);
 457module_param(ttymajor, int, 0);
 458module_param(debug_level, int, 0);
 459module_param_array(maxframe, int, NULL, 0);
 460
 461MODULE_LICENSE("GPL");
 462
 463static char *driver_name = "SyncLink PC Card driver";
 464static char *driver_version = "$Revision: 4.34 $";
 465
 466static struct tty_driver *serial_driver;
 467
 468/* number of characters left in xmit buffer before we ask for more */
 469#define WAKEUP_CHARS 256
 470
 471static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
 472static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
 473
 474/* PCMCIA prototypes */
 475
 476static int mgslpc_config(struct pcmcia_device *link);
 477static void mgslpc_release(u_long arg);
 478static void mgslpc_detach(struct pcmcia_device *p_dev);
 479
 480/*
 481 * 1st function defined in .text section. Calling this function in
 482 * init_module() followed by a breakpoint allows a remote debugger
 483 * (gdb) to get the .text address for the add-symbol-file command.
 484 * This allows remote debugging of dynamically loadable modules.
 485 */
 486static void* mgslpc_get_text_ptr(void)
 487{
 488        return mgslpc_get_text_ptr;
 489}
 490
 491/**
 492 * line discipline callback wrappers
 493 *
 494 * The wrappers maintain line discipline references
 495 * while calling into the line discipline.
 496 *
 497 * ldisc_receive_buf  - pass receive data to line discipline
 498 */
 499
 500static void ldisc_receive_buf(struct tty_struct *tty,
 501                              const __u8 *data, char *flags, int count)
 502{
 503        struct tty_ldisc *ld;
 504        if (!tty)
 505                return;
 506        ld = tty_ldisc_ref(tty);
 507        if (ld) {
 508                if (ld->ops->receive_buf)
 509                        ld->ops->receive_buf(tty, data, flags, count);
 510                tty_ldisc_deref(ld);
 511        }
 512}
 513
 514static const struct tty_port_operations mgslpc_port_ops = {
 515        .carrier_raised = carrier_raised,
 516        .dtr_rts = dtr_rts
 517};
 518
 519static int mgslpc_probe(struct pcmcia_device *link)
 520{
 521    MGSLPC_INFO *info;
 522    int ret;
 523
 524    if (debug_level >= DEBUG_LEVEL_INFO)
 525            printk("mgslpc_attach\n");
 526
 527    info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
 528    if (!info) {
 529            printk("Error can't allocate device instance data\n");
 530            return -ENOMEM;
 531    }
 532
 533    info->magic = MGSLPC_MAGIC;
 534    tty_port_init(&info->port);
 535    info->port.ops = &mgslpc_port_ops;
 536    INIT_WORK(&info->task, bh_handler);
 537    info->max_frame_size = 4096;
 538    info->port.close_delay = 5*HZ/10;
 539    info->port.closing_wait = 30*HZ;
 540    init_waitqueue_head(&info->status_event_wait_q);
 541    init_waitqueue_head(&info->event_wait_q);
 542    spin_lock_init(&info->lock);
 543    spin_lock_init(&info->netlock);
 544    memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
 545    info->idle_mode = HDLC_TXIDLE_FLAGS;
 546    info->imra_value = 0xffff;
 547    info->imrb_value = 0xffff;
 548    info->pim_value = 0xff;
 549
 550    info->p_dev = link;
 551    link->priv = info;
 552
 553    /* Initialize the struct pcmcia_device structure */
 554
 555    /* Interrupt setup */
 556    link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
 557    link->irq.IRQInfo1   = IRQ_LEVEL_ID;
 558    link->irq.Handler = NULL;
 559
 560    link->conf.Attributes = 0;
 561    link->conf.IntType = INT_MEMORY_AND_IO;
 562
 563    ret = mgslpc_config(link);
 564    if (ret)
 565            return ret;
 566
 567    mgslpc_add_device(info);
 568
 569    return 0;
 570}
 571
 572/* Card has been inserted.
 573 */
 574
 575#define CS_CHECK(fn, ret) \
 576do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
 577
 578static int mgslpc_config(struct pcmcia_device *link)
 579{
 580    MGSLPC_INFO *info = link->priv;
 581    tuple_t tuple;
 582    cisparse_t parse;
 583    int last_fn, last_ret;
 584    u_char buf[64];
 585    cistpl_cftable_entry_t dflt = { 0 };
 586    cistpl_cftable_entry_t *cfg;
 587
 588    if (debug_level >= DEBUG_LEVEL_INFO)
 589            printk("mgslpc_config(0x%p)\n", link);
 590
 591    tuple.Attributes = 0;
 592    tuple.TupleData = buf;
 593    tuple.TupleDataMax = sizeof(buf);
 594    tuple.TupleOffset = 0;
 595
 596    /* get CIS configuration entry */
 597
 598    tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
 599    CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
 600
 601    cfg = &(parse.cftable_entry);
 602    CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
 603    CS_CHECK(ParseTuple, pcmcia_parse_tuple(&tuple, &parse));
 604
 605    if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
 606    if (cfg->index == 0)
 607            goto cs_failed;
 608
 609    link->conf.ConfigIndex = cfg->index;
 610    link->conf.Attributes |= CONF_ENABLE_IRQ;
 611
 612    /* IO window settings */
 613    link->io.NumPorts1 = 0;
 614    if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
 615            cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
 616            link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
 617            if (!(io->flags & CISTPL_IO_8BIT))
 618                    link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
 619            if (!(io->flags & CISTPL_IO_16BIT))
 620                    link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
 621            link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
 622            link->io.BasePort1 = io->win[0].base;
 623            link->io.NumPorts1 = io->win[0].len;
 624            CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
 625    }
 626
 627    link->conf.Attributes = CONF_ENABLE_IRQ;
 628    link->conf.IntType = INT_MEMORY_AND_IO;
 629    link->conf.ConfigIndex = 8;
 630    link->conf.Present = PRESENT_OPTION;
 631
 632    link->irq.Attributes |= IRQ_HANDLE_PRESENT;
 633    link->irq.Handler     = mgslpc_isr;
 634    link->irq.Instance    = info;
 635    CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
 636
 637    CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
 638
 639    info->io_base = link->io.BasePort1;
 640    info->irq_level = link->irq.AssignedIRQ;
 641
 642    /* add to linked list of devices */
 643    sprintf(info->node.dev_name, "mgslpc0");
 644    info->node.major = info->node.minor = 0;
 645    link->dev_node = &info->node;
 646
 647    printk(KERN_INFO "%s: index 0x%02x:",
 648           info->node.dev_name, link->conf.ConfigIndex);
 649    if (link->conf.Attributes & CONF_ENABLE_IRQ)
 650            printk(", irq %d", link->irq.AssignedIRQ);
 651    if (link->io.NumPorts1)
 652            printk(", io 0x%04x-0x%04x", link->io.BasePort1,
 653                   link->io.BasePort1+link->io.NumPorts1-1);
 654    printk("\n");
 655    return 0;
 656
 657cs_failed:
 658    cs_error(link, last_fn, last_ret);
 659    mgslpc_release((u_long)link);
 660    return -ENODEV;
 661}
 662
 663/* Card has been removed.
 664 * Unregister device and release PCMCIA configuration.
 665 * If device is open, postpone until it is closed.
 666 */
 667static void mgslpc_release(u_long arg)
 668{
 669        struct pcmcia_device *link = (struct pcmcia_device *)arg;
 670
 671        if (debug_level >= DEBUG_LEVEL_INFO)
 672                printk("mgslpc_release(0x%p)\n", link);
 673
 674        pcmcia_disable_device(link);
 675}
 676
 677static void mgslpc_detach(struct pcmcia_device *link)
 678{
 679        if (debug_level >= DEBUG_LEVEL_INFO)
 680                printk("mgslpc_detach(0x%p)\n", link);
 681
 682        ((MGSLPC_INFO *)link->priv)->stop = 1;
 683        mgslpc_release((u_long)link);
 684
 685        mgslpc_remove_device((MGSLPC_INFO *)link->priv);
 686}
 687
 688static int mgslpc_suspend(struct pcmcia_device *link)
 689{
 690        MGSLPC_INFO *info = link->priv;
 691
 692        info->stop = 1;
 693
 694        return 0;
 695}
 696
 697static int mgslpc_resume(struct pcmcia_device *link)
 698{
 699        MGSLPC_INFO *info = link->priv;
 700
 701        info->stop = 0;
 702
 703        return 0;
 704}
 705
 706
 707static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
 708                                        char *name, const char *routine)
 709{
 710#ifdef MGSLPC_PARANOIA_CHECK
 711        static const char *badmagic =
 712                "Warning: bad magic number for mgsl struct (%s) in %s\n";
 713        static const char *badinfo =
 714                "Warning: null mgslpc_info for (%s) in %s\n";
 715
 716        if (!info) {
 717                printk(badinfo, name, routine);
 718                return true;
 719        }
 720        if (info->magic != MGSLPC_MAGIC) {
 721                printk(badmagic, name, routine);
 722                return true;
 723        }
 724#else
 725        if (!info)
 726                return true;
 727#endif
 728        return false;
 729}
 730
 731
 732#define CMD_RXFIFO      BIT7    // release current rx FIFO
 733#define CMD_RXRESET     BIT6    // receiver reset
 734#define CMD_RXFIFO_READ BIT5
 735#define CMD_START_TIMER BIT4
 736#define CMD_TXFIFO      BIT3    // release current tx FIFO
 737#define CMD_TXEOM       BIT1    // transmit end message
 738#define CMD_TXRESET     BIT0    // transmit reset
 739
 740static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
 741{
 742        int i = 0;
 743        /* wait for command completion */
 744        while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
 745                udelay(1);
 746                if (i++ == 1000)
 747                        return false;
 748        }
 749        return true;
 750}
 751
 752static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
 753{
 754        wait_command_complete(info, channel);
 755        write_reg(info, (unsigned char) (channel + CMDR), cmd);
 756}
 757
 758static void tx_pause(struct tty_struct *tty)
 759{
 760        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 761        unsigned long flags;
 762
 763        if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
 764                return;
 765        if (debug_level >= DEBUG_LEVEL_INFO)
 766                printk("tx_pause(%s)\n",info->device_name);
 767
 768        spin_lock_irqsave(&info->lock,flags);
 769        if (info->tx_enabled)
 770                tx_stop(info);
 771        spin_unlock_irqrestore(&info->lock,flags);
 772}
 773
 774static void tx_release(struct tty_struct *tty)
 775{
 776        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 777        unsigned long flags;
 778
 779        if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
 780                return;
 781        if (debug_level >= DEBUG_LEVEL_INFO)
 782                printk("tx_release(%s)\n",info->device_name);
 783
 784        spin_lock_irqsave(&info->lock,flags);
 785        if (!info->tx_enabled)
 786                tx_start(info, tty);
 787        spin_unlock_irqrestore(&info->lock,flags);
 788}
 789
 790/* Return next bottom half action to perform.
 791 * or 0 if nothing to do.
 792 */
 793static int bh_action(MGSLPC_INFO *info)
 794{
 795        unsigned long flags;
 796        int rc = 0;
 797
 798        spin_lock_irqsave(&info->lock,flags);
 799
 800        if (info->pending_bh & BH_RECEIVE) {
 801                info->pending_bh &= ~BH_RECEIVE;
 802                rc = BH_RECEIVE;
 803        } else if (info->pending_bh & BH_TRANSMIT) {
 804                info->pending_bh &= ~BH_TRANSMIT;
 805                rc = BH_TRANSMIT;
 806        } else if (info->pending_bh & BH_STATUS) {
 807                info->pending_bh &= ~BH_STATUS;
 808                rc = BH_STATUS;
 809        }
 810
 811        if (!rc) {
 812                /* Mark BH routine as complete */
 813                info->bh_running = false;
 814                info->bh_requested = false;
 815        }
 816
 817        spin_unlock_irqrestore(&info->lock,flags);
 818
 819        return rc;
 820}
 821
 822static void bh_handler(struct work_struct *work)
 823{
 824        MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
 825        struct tty_struct *tty;
 826        int action;
 827
 828        if (!info)
 829                return;
 830
 831        if (debug_level >= DEBUG_LEVEL_BH)
 832                printk( "%s(%d):bh_handler(%s) entry\n",
 833                        __FILE__,__LINE__,info->device_name);
 834
 835        info->bh_running = true;
 836        tty = tty_port_tty_get(&info->port);
 837
 838        while((action = bh_action(info)) != 0) {
 839
 840                /* Process work item */
 841                if ( debug_level >= DEBUG_LEVEL_BH )
 842                        printk( "%s(%d):bh_handler() work item action=%d\n",
 843                                __FILE__,__LINE__,action);
 844
 845                switch (action) {
 846
 847                case BH_RECEIVE:
 848                        while(rx_get_frame(info, tty));
 849                        break;
 850                case BH_TRANSMIT:
 851                        bh_transmit(info, tty);
 852                        break;
 853                case BH_STATUS:
 854                        bh_status(info);
 855                        break;
 856                default:
 857                        /* unknown work item ID */
 858                        printk("Unknown work item ID=%08X!\n", action);
 859                        break;
 860                }
 861        }
 862
 863        tty_kref_put(tty);
 864        if (debug_level >= DEBUG_LEVEL_BH)
 865                printk( "%s(%d):bh_handler(%s) exit\n",
 866                        __FILE__,__LINE__,info->device_name);
 867}
 868
 869static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
 870{
 871        if (debug_level >= DEBUG_LEVEL_BH)
 872                printk("bh_transmit() entry on %s\n", info->device_name);
 873
 874        if (tty)
 875                tty_wakeup(tty);
 876}
 877
 878static void bh_status(MGSLPC_INFO *info)
 879{
 880        info->ri_chkcount = 0;
 881        info->dsr_chkcount = 0;
 882        info->dcd_chkcount = 0;
 883        info->cts_chkcount = 0;
 884}
 885
 886/* eom: non-zero = end of frame */
 887static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
 888{
 889        unsigned char data[2];
 890        unsigned char fifo_count, read_count, i;
 891        RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
 892
 893        if (debug_level >= DEBUG_LEVEL_ISR)
 894                printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
 895
 896        if (!info->rx_enabled)
 897                return;
 898
 899        if (info->rx_frame_count >= info->rx_buf_count) {
 900                /* no more free buffers */
 901                issue_command(info, CHA, CMD_RXRESET);
 902                info->pending_bh |= BH_RECEIVE;
 903                info->rx_overflow = true;
 904                info->icount.buf_overrun++;
 905                return;
 906        }
 907
 908        if (eom) {
 909                /* end of frame, get FIFO count from RBCL register */
 910                if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
 911                        fifo_count = 32;
 912        } else
 913                fifo_count = 32;
 914
 915        do {
 916                if (fifo_count == 1) {
 917                        read_count = 1;
 918                        data[0] = read_reg(info, CHA + RXFIFO);
 919                } else {
 920                        read_count = 2;
 921                        *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
 922                }
 923                fifo_count -= read_count;
 924                if (!fifo_count && eom)
 925                        buf->status = data[--read_count];
 926
 927                for (i = 0; i < read_count; i++) {
 928                        if (buf->count >= info->max_frame_size) {
 929                                /* frame too large, reset receiver and reset current buffer */
 930                                issue_command(info, CHA, CMD_RXRESET);
 931                                buf->count = 0;
 932                                return;
 933                        }
 934                        *(buf->data + buf->count) = data[i];
 935                        buf->count++;
 936                }
 937        } while (fifo_count);
 938
 939        if (eom) {
 940                info->pending_bh |= BH_RECEIVE;
 941                info->rx_frame_count++;
 942                info->rx_put++;
 943                if (info->rx_put >= info->rx_buf_count)
 944                        info->rx_put = 0;
 945        }
 946        issue_command(info, CHA, CMD_RXFIFO);
 947}
 948
 949static void rx_ready_async(MGSLPC_INFO *info, int tcd, struct tty_struct *tty)
 950{
 951        unsigned char data, status, flag;
 952        int fifo_count;
 953        int work = 0;
 954        struct mgsl_icount *icount = &info->icount;
 955
 956        if (tcd) {
 957                /* early termination, get FIFO count from RBCL register */
 958                fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 959
 960                /* Zero fifo count could mean 0 or 32 bytes available.
 961                 * If BIT5 of STAR is set then at least 1 byte is available.
 962                 */
 963                if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
 964                        fifo_count = 32;
 965        } else
 966                fifo_count = 32;
 967
 968        tty_buffer_request_room(tty, fifo_count);
 969        /* Flush received async data to receive data buffer. */
 970        while (fifo_count) {
 971                data   = read_reg(info, CHA + RXFIFO);
 972                status = read_reg(info, CHA + RXFIFO);
 973                fifo_count -= 2;
 974
 975                icount->rx++;
 976                flag = TTY_NORMAL;
 977
 978                // if no frameing/crc error then save data
 979                // BIT7:parity error
 980                // BIT6:framing error
 981
 982                if (status & (BIT7 + BIT6)) {
 983                        if (status & BIT7)
 984                                icount->parity++;
 985                        else
 986                                icount->frame++;
 987
 988                        /* discard char if tty control flags say so */
 989                        if (status & info->ignore_status_mask)
 990                                continue;
 991
 992                        status &= info->read_status_mask;
 993
 994                        if (status & BIT7)
 995                                flag = TTY_PARITY;
 996                        else if (status & BIT6)
 997                                flag = TTY_FRAME;
 998                }
 999                work += tty_insert_flip_char(tty, data, flag);
1000        }
1001        issue_command(info, CHA, CMD_RXFIFO);
1002
1003        if (debug_level >= DEBUG_LEVEL_ISR) {
1004                printk("%s(%d):rx_ready_async",
1005                        __FILE__,__LINE__);
1006                printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1007                        __FILE__,__LINE__,icount->rx,icount->brk,
1008                        icount->parity,icount->frame,icount->overrun);
1009        }
1010
1011        if (work)
1012                tty_flip_buffer_push(tty);
1013}
1014
1015
1016static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
1017{
1018        if (!info->tx_active)
1019                return;
1020
1021        info->tx_active = false;
1022        info->tx_aborting = false;
1023
1024        if (info->params.mode == MGSL_MODE_ASYNC)
1025                return;
1026
1027        info->tx_count = info->tx_put = info->tx_get = 0;
1028        del_timer(&info->tx_timer);
1029
1030        if (info->drop_rts_on_tx_done) {
1031                get_signals(info);
1032                if (info->serial_signals & SerialSignal_RTS) {
1033                        info->serial_signals &= ~SerialSignal_RTS;
1034                        set_signals(info);
1035                }
1036                info->drop_rts_on_tx_done = false;
1037        }
1038
1039#if SYNCLINK_GENERIC_HDLC
1040        if (info->netcount)
1041                hdlcdev_tx_done(info);
1042        else
1043#endif
1044        {
1045                if (tty->stopped || tty->hw_stopped) {
1046                        tx_stop(info);
1047                        return;
1048                }
1049                info->pending_bh |= BH_TRANSMIT;
1050        }
1051}
1052
1053static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
1054{
1055        unsigned char fifo_count = 32;
1056        int c;
1057
1058        if (debug_level >= DEBUG_LEVEL_ISR)
1059                printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1060
1061        if (info->params.mode == MGSL_MODE_HDLC) {
1062                if (!info->tx_active)
1063                        return;
1064        } else {
1065                if (tty->stopped || tty->hw_stopped) {
1066                        tx_stop(info);
1067                        return;
1068                }
1069                if (!info->tx_count)
1070                        info->tx_active = false;
1071        }
1072
1073        if (!info->tx_count)
1074                return;
1075
1076        while (info->tx_count && fifo_count) {
1077                c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1078
1079                if (c == 1) {
1080                        write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1081                } else {
1082                        write_reg16(info, CHA + TXFIFO,
1083                                          *((unsigned short*)(info->tx_buf + info->tx_get)));
1084                }
1085                info->tx_count -= c;
1086                info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1087                fifo_count -= c;
1088        }
1089
1090        if (info->params.mode == MGSL_MODE_ASYNC) {
1091                if (info->tx_count < WAKEUP_CHARS)
1092                        info->pending_bh |= BH_TRANSMIT;
1093                issue_command(info, CHA, CMD_TXFIFO);
1094        } else {
1095                if (info->tx_count)
1096                        issue_command(info, CHA, CMD_TXFIFO);
1097                else
1098                        issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1099        }
1100}
1101
1102static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1103{
1104        get_signals(info);
1105        if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1106                irq_disable(info, CHB, IRQ_CTS);
1107        info->icount.cts++;
1108        if (info->serial_signals & SerialSignal_CTS)
1109                info->input_signal_events.cts_up++;
1110        else
1111                info->input_signal_events.cts_down++;
1112        wake_up_interruptible(&info->status_event_wait_q);
1113        wake_up_interruptible(&info->event_wait_q);
1114
1115        if (info->port.flags & ASYNC_CTS_FLOW) {
1116                if (tty->hw_stopped) {
1117                        if (info->serial_signals & SerialSignal_CTS) {
1118                                if (debug_level >= DEBUG_LEVEL_ISR)
1119                                        printk("CTS tx start...");
1120                                if (tty)
1121                                        tty->hw_stopped = 0;
1122                                tx_start(info, tty);
1123                                info->pending_bh |= BH_TRANSMIT;
1124                                return;
1125                        }
1126                } else {
1127                        if (!(info->serial_signals & SerialSignal_CTS)) {
1128                                if (debug_level >= DEBUG_LEVEL_ISR)
1129                                        printk("CTS tx stop...");
1130                                if (tty)
1131                                        tty->hw_stopped = 1;
1132                                tx_stop(info);
1133                        }
1134                }
1135        }
1136        info->pending_bh |= BH_STATUS;
1137}
1138
1139static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1140{
1141        get_signals(info);
1142        if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1143                irq_disable(info, CHB, IRQ_DCD);
1144        info->icount.dcd++;
1145        if (info->serial_signals & SerialSignal_DCD) {
1146                info->input_signal_events.dcd_up++;
1147        }
1148        else
1149                info->input_signal_events.dcd_down++;
1150#if SYNCLINK_GENERIC_HDLC
1151        if (info->netcount) {
1152                if (info->serial_signals & SerialSignal_DCD)
1153                        netif_carrier_on(info->netdev);
1154                else
1155                        netif_carrier_off(info->netdev);
1156        }
1157#endif
1158        wake_up_interruptible(&info->status_event_wait_q);
1159        wake_up_interruptible(&info->event_wait_q);
1160
1161        if (info->port.flags & ASYNC_CHECK_CD) {
1162                if (debug_level >= DEBUG_LEVEL_ISR)
1163                        printk("%s CD now %s...", info->device_name,
1164                               (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1165                if (info->serial_signals & SerialSignal_DCD)
1166                        wake_up_interruptible(&info->port.open_wait);
1167                else {
1168                        if (debug_level >= DEBUG_LEVEL_ISR)
1169                                printk("doing serial hangup...");
1170                        if (tty)
1171                                tty_hangup(tty);
1172                }
1173        }
1174        info->pending_bh |= BH_STATUS;
1175}
1176
1177static void dsr_change(MGSLPC_INFO *info)
1178{
1179        get_signals(info);
1180        if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1181                port_irq_disable(info, PVR_DSR);
1182        info->icount.dsr++;
1183        if (info->serial_signals & SerialSignal_DSR)
1184                info->input_signal_events.dsr_up++;
1185        else
1186                info->input_signal_events.dsr_down++;
1187        wake_up_interruptible(&info->status_event_wait_q);
1188        wake_up_interruptible(&info->event_wait_q);
1189        info->pending_bh |= BH_STATUS;
1190}
1191
1192static void ri_change(MGSLPC_INFO *info)
1193{
1194        get_signals(info);
1195        if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1196                port_irq_disable(info, PVR_RI);
1197        info->icount.rng++;
1198        if (info->serial_signals & SerialSignal_RI)
1199                info->input_signal_events.ri_up++;
1200        else
1201                info->input_signal_events.ri_down++;
1202        wake_up_interruptible(&info->status_event_wait_q);
1203        wake_up_interruptible(&info->event_wait_q);
1204        info->pending_bh |= BH_STATUS;
1205}
1206
1207/* Interrupt service routine entry point.
1208 *
1209 * Arguments:
1210 *
1211 * irq     interrupt number that caused interrupt
1212 * dev_id  device ID supplied during interrupt registration
1213 */
1214static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1215{
1216        MGSLPC_INFO *info = dev_id;
1217        struct tty_struct *tty;
1218        unsigned short isr;
1219        unsigned char gis, pis;
1220        int count=0;
1221
1222        if (debug_level >= DEBUG_LEVEL_ISR)
1223                printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1224
1225        if (!(info->p_dev->_locked))
1226                return IRQ_HANDLED;
1227
1228        tty = tty_port_tty_get(&info->port);
1229
1230        spin_lock(&info->lock);
1231
1232        while ((gis = read_reg(info, CHA + GIS))) {
1233                if (debug_level >= DEBUG_LEVEL_ISR)
1234                        printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1235
1236                if ((gis & 0x70) || count > 1000) {
1237                        printk("synclink_cs:hardware failed or ejected\n");
1238                        break;
1239                }
1240                count++;
1241
1242                if (gis & (BIT1 + BIT0)) {
1243                        isr = read_reg16(info, CHB + ISR);
1244                        if (isr & IRQ_DCD)
1245                                dcd_change(info, tty);
1246                        if (isr & IRQ_CTS)
1247                                cts_change(info, tty);
1248                }
1249                if (gis & (BIT3 + BIT2))
1250                {
1251                        isr = read_reg16(info, CHA + ISR);
1252                        if (isr & IRQ_TIMER) {
1253                                info->irq_occurred = true;
1254                                irq_disable(info, CHA, IRQ_TIMER);
1255                        }
1256
1257                        /* receive IRQs */
1258                        if (isr & IRQ_EXITHUNT) {
1259                                info->icount.exithunt++;
1260                                wake_up_interruptible(&info->event_wait_q);
1261                        }
1262                        if (isr & IRQ_BREAK_ON) {
1263                                info->icount.brk++;
1264                                if (info->port.flags & ASYNC_SAK)
1265                                        do_SAK(tty);
1266                        }
1267                        if (isr & IRQ_RXTIME) {
1268                                issue_command(info, CHA, CMD_RXFIFO_READ);
1269                        }
1270                        if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1271                                if (info->params.mode == MGSL_MODE_HDLC)
1272                                        rx_ready_hdlc(info, isr & IRQ_RXEOM);
1273                                else
1274                                        rx_ready_async(info, isr & IRQ_RXEOM, tty);
1275                        }
1276
1277                        /* transmit IRQs */
1278                        if (isr & IRQ_UNDERRUN) {
1279                                if (info->tx_aborting)
1280                                        info->icount.txabort++;
1281                                else
1282                                        info->icount.txunder++;
1283                                tx_done(info, tty);
1284                        }
1285                        else if (isr & IRQ_ALLSENT) {
1286                                info->icount.txok++;
1287                                tx_done(info, tty);
1288                        }
1289                        else if (isr & IRQ_TXFIFO)
1290                                tx_ready(info, tty);
1291                }
1292                if (gis & BIT7) {
1293                        pis = read_reg(info, CHA + PIS);
1294                        if (pis & BIT1)
1295                                dsr_change(info);
1296                        if (pis & BIT2)
1297                                ri_change(info);
1298                }
1299        }
1300
1301        /* Request bottom half processing if there's something
1302         * for it to do and the bh is not already running
1303         */
1304
1305        if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1306                if ( debug_level >= DEBUG_LEVEL_ISR )
1307                        printk("%s(%d):%s queueing bh task.\n",
1308                                __FILE__,__LINE__,info->device_name);
1309                schedule_work(&info->task);
1310                info->bh_requested = true;
1311        }
1312
1313        spin_unlock(&info->lock);
1314        tty_kref_put(tty);
1315
1316        if (debug_level >= DEBUG_LEVEL_ISR)
1317                printk("%s(%d):mgslpc_isr(%d)exit.\n",
1318                       __FILE__, __LINE__, info->irq_level);
1319
1320        return IRQ_HANDLED;
1321}
1322
1323/* Initialize and start device.
1324 */
1325static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1326{
1327        int retval = 0;
1328
1329        if (debug_level >= DEBUG_LEVEL_INFO)
1330                printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1331
1332        if (info->port.flags & ASYNC_INITIALIZED)
1333                return 0;
1334
1335        if (!info->tx_buf) {
1336                /* allocate a page of memory for a transmit buffer */
1337                info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1338                if (!info->tx_buf) {
1339                        printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1340                                __FILE__,__LINE__,info->device_name);
1341                        return -ENOMEM;
1342                }
1343        }
1344
1345        info->pending_bh = 0;
1346
1347        memset(&info->icount, 0, sizeof(info->icount));
1348
1349        setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1350
1351        /* Allocate and claim adapter resources */
1352        retval = claim_resources(info);
1353
1354        /* perform existance check and diagnostics */
1355        if ( !retval )
1356                retval = adapter_test(info);
1357
1358        if ( retval ) {
1359                if (capable(CAP_SYS_ADMIN) && tty)
1360                        set_bit(TTY_IO_ERROR, &tty->flags);
1361                release_resources(info);
1362                return retval;
1363        }
1364
1365        /* program hardware for current parameters */
1366        mgslpc_change_params(info, tty);
1367
1368        if (tty)
1369                clear_bit(TTY_IO_ERROR, &tty->flags);
1370
1371        info->port.flags |= ASYNC_INITIALIZED;
1372
1373        return 0;
1374}
1375
1376/* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1377 */
1378static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1379{
1380        unsigned long flags;
1381
1382        if (!(info->port.flags & ASYNC_INITIALIZED))
1383                return;
1384
1385        if (debug_level >= DEBUG_LEVEL_INFO)
1386                printk("%s(%d):mgslpc_shutdown(%s)\n",
1387                         __FILE__,__LINE__, info->device_name );
1388
1389        /* clear status wait queue because status changes */
1390        /* can't happen after shutting down the hardware */
1391        wake_up_interruptible(&info->status_event_wait_q);
1392        wake_up_interruptible(&info->event_wait_q);
1393
1394        del_timer_sync(&info->tx_timer);
1395
1396        if (info->tx_buf) {
1397                free_page((unsigned long) info->tx_buf);
1398                info->tx_buf = NULL;
1399        }
1400
1401        spin_lock_irqsave(&info->lock,flags);
1402
1403        rx_stop(info);
1404        tx_stop(info);
1405
1406        /* TODO:disable interrupts instead of reset to preserve signal states */
1407        reset_device(info);
1408
1409        if (!tty || tty->termios->c_cflag & HUPCL) {
1410                info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1411                set_signals(info);
1412        }
1413
1414        spin_unlock_irqrestore(&info->lock,flags);
1415
1416        release_resources(info);
1417
1418        if (tty)
1419                set_bit(TTY_IO_ERROR, &tty->flags);
1420
1421        info->port.flags &= ~ASYNC_INITIALIZED;
1422}
1423
1424static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1425{
1426        unsigned long flags;
1427
1428        spin_lock_irqsave(&info->lock,flags);
1429
1430        rx_stop(info);
1431        tx_stop(info);
1432        info->tx_count = info->tx_put = info->tx_get = 0;
1433
1434        if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1435                hdlc_mode(info);
1436        else
1437                async_mode(info);
1438
1439        set_signals(info);
1440
1441        info->dcd_chkcount = 0;
1442        info->cts_chkcount = 0;
1443        info->ri_chkcount = 0;
1444        info->dsr_chkcount = 0;
1445
1446        irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1447        port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1448        get_signals(info);
1449
1450        if (info->netcount || (tty && (tty->termios->c_cflag & CREAD)))
1451                rx_start(info);
1452
1453        spin_unlock_irqrestore(&info->lock,flags);
1454}
1455
1456/* Reconfigure adapter based on new parameters
1457 */
1458static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1459{
1460        unsigned cflag;
1461        int bits_per_char;
1462
1463        if (!tty || !tty->termios)
1464                return;
1465
1466        if (debug_level >= DEBUG_LEVEL_INFO)
1467                printk("%s(%d):mgslpc_change_params(%s)\n",
1468                         __FILE__,__LINE__, info->device_name );
1469
1470        cflag = tty->termios->c_cflag;
1471
1472        /* if B0 rate (hangup) specified then negate DTR and RTS */
1473        /* otherwise assert DTR and RTS */
1474        if (cflag & CBAUD)
1475                info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1476        else
1477                info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1478
1479        /* byte size and parity */
1480
1481        switch (cflag & CSIZE) {
1482        case CS5: info->params.data_bits = 5; break;
1483        case CS6: info->params.data_bits = 6; break;
1484        case CS7: info->params.data_bits = 7; break;
1485        case CS8: info->params.data_bits = 8; break;
1486        default:  info->params.data_bits = 7; break;
1487        }
1488
1489        if (cflag & CSTOPB)
1490                info->params.stop_bits = 2;
1491        else
1492                info->params.stop_bits = 1;
1493
1494        info->params.parity = ASYNC_PARITY_NONE;
1495        if (cflag & PARENB) {
1496                if (cflag & PARODD)
1497                        info->params.parity = ASYNC_PARITY_ODD;
1498                else
1499                        info->params.parity = ASYNC_PARITY_EVEN;
1500#ifdef CMSPAR
1501                if (cflag & CMSPAR)
1502                        info->params.parity = ASYNC_PARITY_SPACE;
1503#endif
1504        }
1505
1506        /* calculate number of jiffies to transmit a full
1507         * FIFO (32 bytes) at specified data rate
1508         */
1509        bits_per_char = info->params.data_bits +
1510                        info->params.stop_bits + 1;
1511
1512        /* if port data rate is set to 460800 or less then
1513         * allow tty settings to override, otherwise keep the
1514         * current data rate.
1515         */
1516        if (info->params.data_rate <= 460800) {
1517                info->params.data_rate = tty_get_baud_rate(tty);
1518        }
1519
1520        if ( info->params.data_rate ) {
1521                info->timeout = (32*HZ*bits_per_char) /
1522                                info->params.data_rate;
1523        }
1524        info->timeout += HZ/50;         /* Add .02 seconds of slop */
1525
1526        if (cflag & CRTSCTS)
1527                info->port.flags |= ASYNC_CTS_FLOW;
1528        else
1529                info->port.flags &= ~ASYNC_CTS_FLOW;
1530
1531        if (cflag & CLOCAL)
1532                info->port.flags &= ~ASYNC_CHECK_CD;
1533        else
1534                info->port.flags |= ASYNC_CHECK_CD;
1535
1536        /* process tty input control flags */
1537
1538        info->read_status_mask = 0;
1539        if (I_INPCK(tty))
1540                info->read_status_mask |= BIT7 | BIT6;
1541        if (I_IGNPAR(tty))
1542                info->ignore_status_mask |= BIT7 | BIT6;
1543
1544        mgslpc_program_hw(info, tty);
1545}
1546
1547/* Add a character to the transmit buffer
1548 */
1549static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1550{
1551        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1552        unsigned long flags;
1553
1554        if (debug_level >= DEBUG_LEVEL_INFO) {
1555                printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1556                        __FILE__,__LINE__,ch,info->device_name);
1557        }
1558
1559        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1560                return 0;
1561
1562        if (!info->tx_buf)
1563                return 0;
1564
1565        spin_lock_irqsave(&info->lock,flags);
1566
1567        if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1568                if (info->tx_count < TXBUFSIZE - 1) {
1569                        info->tx_buf[info->tx_put++] = ch;
1570                        info->tx_put &= TXBUFSIZE-1;
1571                        info->tx_count++;
1572                }
1573        }
1574
1575        spin_unlock_irqrestore(&info->lock,flags);
1576        return 1;
1577}
1578
1579/* Enable transmitter so remaining characters in the
1580 * transmit buffer are sent.
1581 */
1582static void mgslpc_flush_chars(struct tty_struct *tty)
1583{
1584        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1585        unsigned long flags;
1586
1587        if (debug_level >= DEBUG_LEVEL_INFO)
1588                printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1589                        __FILE__,__LINE__,info->device_name,info->tx_count);
1590
1591        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1592                return;
1593
1594        if (info->tx_count <= 0 || tty->stopped ||
1595            tty->hw_stopped || !info->tx_buf)
1596                return;
1597
1598        if (debug_level >= DEBUG_LEVEL_INFO)
1599                printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1600                        __FILE__,__LINE__,info->device_name);
1601
1602        spin_lock_irqsave(&info->lock,flags);
1603        if (!info->tx_active)
1604                tx_start(info, tty);
1605        spin_unlock_irqrestore(&info->lock,flags);
1606}
1607
1608/* Send a block of data
1609 *
1610 * Arguments:
1611 *
1612 * tty        pointer to tty information structure
1613 * buf        pointer to buffer containing send data
1614 * count      size of send data in bytes
1615 *
1616 * Returns: number of characters written
1617 */
1618static int mgslpc_write(struct tty_struct * tty,
1619                        const unsigned char *buf, int count)
1620{
1621        int c, ret = 0;
1622        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1623        unsigned long flags;
1624
1625        if (debug_level >= DEBUG_LEVEL_INFO)
1626                printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1627                        __FILE__,__LINE__,info->device_name,count);
1628
1629        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1630                !info->tx_buf)
1631                goto cleanup;
1632
1633        if (info->params.mode == MGSL_MODE_HDLC) {
1634                if (count > TXBUFSIZE) {
1635                        ret = -EIO;
1636                        goto cleanup;
1637                }
1638                if (info->tx_active)
1639                        goto cleanup;
1640                else if (info->tx_count)
1641                        goto start;
1642        }
1643
1644        for (;;) {
1645                c = min(count,
1646                        min(TXBUFSIZE - info->tx_count - 1,
1647                            TXBUFSIZE - info->tx_put));
1648                if (c <= 0)
1649                        break;
1650
1651                memcpy(info->tx_buf + info->tx_put, buf, c);
1652
1653                spin_lock_irqsave(&info->lock,flags);
1654                info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1655                info->tx_count += c;
1656                spin_unlock_irqrestore(&info->lock,flags);
1657
1658                buf += c;
1659                count -= c;
1660                ret += c;
1661        }
1662start:
1663        if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1664                spin_lock_irqsave(&info->lock,flags);
1665                if (!info->tx_active)
1666                        tx_start(info, tty);
1667                spin_unlock_irqrestore(&info->lock,flags);
1668        }
1669cleanup:
1670        if (debug_level >= DEBUG_LEVEL_INFO)
1671                printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1672                        __FILE__,__LINE__,info->device_name,ret);
1673        return ret;
1674}
1675
1676/* Return the count of free bytes in transmit buffer
1677 */
1678static int mgslpc_write_room(struct tty_struct *tty)
1679{
1680        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1681        int ret;
1682
1683        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1684                return 0;
1685
1686        if (info->params.mode == MGSL_MODE_HDLC) {
1687                /* HDLC (frame oriented) mode */
1688                if (info->tx_active)
1689                        return 0;
1690                else
1691                        return HDLC_MAX_FRAME_SIZE;
1692        } else {
1693                ret = TXBUFSIZE - info->tx_count - 1;
1694                if (ret < 0)
1695                        ret = 0;
1696        }
1697
1698        if (debug_level >= DEBUG_LEVEL_INFO)
1699                printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1700                         __FILE__,__LINE__, info->device_name, ret);
1701        return ret;
1702}
1703
1704/* Return the count of bytes in transmit buffer
1705 */
1706static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1707{
1708        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1709        int rc;
1710
1711        if (debug_level >= DEBUG_LEVEL_INFO)
1712                printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1713                         __FILE__,__LINE__, info->device_name );
1714
1715        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1716                return 0;
1717
1718        if (info->params.mode == MGSL_MODE_HDLC)
1719                rc = info->tx_active ? info->max_frame_size : 0;
1720        else
1721                rc = info->tx_count;
1722
1723        if (debug_level >= DEBUG_LEVEL_INFO)
1724                printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1725                         __FILE__,__LINE__, info->device_name, rc);
1726
1727        return rc;
1728}
1729
1730/* Discard all data in the send buffer
1731 */
1732static void mgslpc_flush_buffer(struct tty_struct *tty)
1733{
1734        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1735        unsigned long flags;
1736
1737        if (debug_level >= DEBUG_LEVEL_INFO)
1738                printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1739                         __FILE__,__LINE__, info->device_name );
1740
1741        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1742                return;
1743
1744        spin_lock_irqsave(&info->lock,flags);
1745        info->tx_count = info->tx_put = info->tx_get = 0;
1746        del_timer(&info->tx_timer);
1747        spin_unlock_irqrestore(&info->lock,flags);
1748
1749        wake_up_interruptible(&tty->write_wait);
1750        tty_wakeup(tty);
1751}
1752
1753/* Send a high-priority XON/XOFF character
1754 */
1755static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1756{
1757        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1758        unsigned long flags;
1759
1760        if (debug_level >= DEBUG_LEVEL_INFO)
1761                printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1762                         __FILE__,__LINE__, info->device_name, ch );
1763
1764        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1765                return;
1766
1767        info->x_char = ch;
1768        if (ch) {
1769                spin_lock_irqsave(&info->lock,flags);
1770                if (!info->tx_enabled)
1771                        tx_start(info, tty);
1772                spin_unlock_irqrestore(&info->lock,flags);
1773        }
1774}
1775
1776/* Signal remote device to throttle send data (our receive data)
1777 */
1778static void mgslpc_throttle(struct tty_struct * tty)
1779{
1780        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1781        unsigned long flags;
1782
1783        if (debug_level >= DEBUG_LEVEL_INFO)
1784                printk("%s(%d):mgslpc_throttle(%s) entry\n",
1785                         __FILE__,__LINE__, info->device_name );
1786
1787        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1788                return;
1789
1790        if (I_IXOFF(tty))
1791                mgslpc_send_xchar(tty, STOP_CHAR(tty));
1792
1793        if (tty->termios->c_cflag & CRTSCTS) {
1794                spin_lock_irqsave(&info->lock,flags);
1795                info->serial_signals &= ~SerialSignal_RTS;
1796                set_signals(info);
1797                spin_unlock_irqrestore(&info->lock,flags);
1798        }
1799}
1800
1801/* Signal remote device to stop throttling send data (our receive data)
1802 */
1803static void mgslpc_unthrottle(struct tty_struct * tty)
1804{
1805        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1806        unsigned long flags;
1807
1808        if (debug_level >= DEBUG_LEVEL_INFO)
1809                printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1810                         __FILE__,__LINE__, info->device_name );
1811
1812        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1813                return;
1814
1815        if (I_IXOFF(tty)) {
1816                if (info->x_char)
1817                        info->x_char = 0;
1818                else
1819                        mgslpc_send_xchar(tty, START_CHAR(tty));
1820        }
1821
1822        if (tty->termios->c_cflag & CRTSCTS) {
1823                spin_lock_irqsave(&info->lock,flags);
1824                info->serial_signals |= SerialSignal_RTS;
1825                set_signals(info);
1826                spin_unlock_irqrestore(&info->lock,flags);
1827        }
1828}
1829
1830/* get the current serial statistics
1831 */
1832static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1833{
1834        int err;
1835        if (debug_level >= DEBUG_LEVEL_INFO)
1836                printk("get_params(%s)\n", info->device_name);
1837        if (!user_icount) {
1838                memset(&info->icount, 0, sizeof(info->icount));
1839        } else {
1840                COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1841                if (err)
1842                        return -EFAULT;
1843        }
1844        return 0;
1845}
1846
1847/* get the current serial parameters
1848 */
1849static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1850{
1851        int err;
1852        if (debug_level >= DEBUG_LEVEL_INFO)
1853                printk("get_params(%s)\n", info->device_name);
1854        COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1855        if (err)
1856                return -EFAULT;
1857        return 0;
1858}
1859
1860/* set the serial parameters
1861 *
1862 * Arguments:
1863 *
1864 *      info            pointer to device instance data
1865 *      new_params      user buffer containing new serial params
1866 *
1867 * Returns:     0 if success, otherwise error code
1868 */
1869static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1870{
1871        unsigned long flags;
1872        MGSL_PARAMS tmp_params;
1873        int err;
1874
1875        if (debug_level >= DEBUG_LEVEL_INFO)
1876                printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1877                        info->device_name );
1878        COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1879        if (err) {
1880                if ( debug_level >= DEBUG_LEVEL_INFO )
1881                        printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1882                                __FILE__,__LINE__,info->device_name);
1883                return -EFAULT;
1884        }
1885
1886        spin_lock_irqsave(&info->lock,flags);
1887        memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1888        spin_unlock_irqrestore(&info->lock,flags);
1889
1890        mgslpc_change_params(info, tty);
1891
1892        return 0;
1893}
1894
1895static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1896{
1897        int err;
1898        if (debug_level >= DEBUG_LEVEL_INFO)
1899                printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1900        COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1901        if (err)
1902                return -EFAULT;
1903        return 0;
1904}
1905
1906static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1907{
1908        unsigned long flags;
1909        if (debug_level >= DEBUG_LEVEL_INFO)
1910                printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1911        spin_lock_irqsave(&info->lock,flags);
1912        info->idle_mode = idle_mode;
1913        tx_set_idle(info);
1914        spin_unlock_irqrestore(&info->lock,flags);
1915        return 0;
1916}
1917
1918static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1919{
1920        int err;
1921        if (debug_level >= DEBUG_LEVEL_INFO)
1922                printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1923        COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1924        if (err)
1925                return -EFAULT;
1926        return 0;
1927}
1928
1929static int set_interface(MGSLPC_INFO * info, int if_mode)
1930{
1931        unsigned long flags;
1932        unsigned char val;
1933        if (debug_level >= DEBUG_LEVEL_INFO)
1934                printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1935        spin_lock_irqsave(&info->lock,flags);
1936        info->if_mode = if_mode;
1937
1938        val = read_reg(info, PVR) & 0x0f;
1939        switch (info->if_mode)
1940        {
1941        case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1942        case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1943        case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1944        }
1945        write_reg(info, PVR, val);
1946
1947        spin_unlock_irqrestore(&info->lock,flags);
1948        return 0;
1949}
1950
1951static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1952{
1953        unsigned long flags;
1954
1955        if (debug_level >= DEBUG_LEVEL_INFO)
1956                printk("set_txenable(%s,%d)\n", info->device_name, enable);
1957
1958        spin_lock_irqsave(&info->lock,flags);
1959        if (enable) {
1960                if (!info->tx_enabled)
1961                        tx_start(info, tty);
1962        } else {
1963                if (info->tx_enabled)
1964                        tx_stop(info);
1965        }
1966        spin_unlock_irqrestore(&info->lock,flags);
1967        return 0;
1968}
1969
1970static int tx_abort(MGSLPC_INFO * info)
1971{
1972        unsigned long flags;
1973
1974        if (debug_level >= DEBUG_LEVEL_INFO)
1975                printk("tx_abort(%s)\n", info->device_name);
1976
1977        spin_lock_irqsave(&info->lock,flags);
1978        if (info->tx_active && info->tx_count &&
1979            info->params.mode == MGSL_MODE_HDLC) {
1980                /* clear data count so FIFO is not filled on next IRQ.
1981                 * This results in underrun and abort transmission.
1982                 */
1983                info->tx_count = info->tx_put = info->tx_get = 0;
1984                info->tx_aborting = true;
1985        }
1986        spin_unlock_irqrestore(&info->lock,flags);
1987        return 0;
1988}
1989
1990static int set_rxenable(MGSLPC_INFO * info, int enable)
1991{
1992        unsigned long flags;
1993
1994        if (debug_level >= DEBUG_LEVEL_INFO)
1995                printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1996
1997        spin_lock_irqsave(&info->lock,flags);
1998        if (enable) {
1999                if (!info->rx_enabled)
2000                        rx_start(info);
2001        } else {
2002                if (info->rx_enabled)
2003                        rx_stop(info);
2004        }
2005        spin_unlock_irqrestore(&info->lock,flags);
2006        return 0;
2007}
2008
2009/* wait for specified event to occur
2010 *
2011 * Arguments:           info    pointer to device instance data
2012 *                      mask    pointer to bitmask of events to wait for
2013 * Return Value:        0       if successful and bit mask updated with
2014 *                              of events triggerred,
2015 *                      otherwise error code
2016 */
2017static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2018{
2019        unsigned long flags;
2020        int s;
2021        int rc=0;
2022        struct mgsl_icount cprev, cnow;
2023        int events;
2024        int mask;
2025        struct  _input_signal_events oldsigs, newsigs;
2026        DECLARE_WAITQUEUE(wait, current);
2027
2028        COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2029        if (rc)
2030                return  -EFAULT;
2031
2032        if (debug_level >= DEBUG_LEVEL_INFO)
2033                printk("wait_events(%s,%d)\n", info->device_name, mask);
2034
2035        spin_lock_irqsave(&info->lock,flags);
2036
2037        /* return immediately if state matches requested events */
2038        get_signals(info);
2039        s = info->serial_signals;
2040        events = mask &
2041                ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2042                  ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2043                  ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2044                  ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2045        if (events) {
2046                spin_unlock_irqrestore(&info->lock,flags);
2047                goto exit;
2048        }
2049
2050        /* save current irq counts */
2051        cprev = info->icount;
2052        oldsigs = info->input_signal_events;
2053
2054        if ((info->params.mode == MGSL_MODE_HDLC) &&
2055            (mask & MgslEvent_ExitHuntMode))
2056                irq_enable(info, CHA, IRQ_EXITHUNT);
2057
2058        set_current_state(TASK_INTERRUPTIBLE);
2059        add_wait_queue(&info->event_wait_q, &wait);
2060
2061        spin_unlock_irqrestore(&info->lock,flags);
2062
2063
2064        for(;;) {
2065                schedule();
2066                if (signal_pending(current)) {
2067                        rc = -ERESTARTSYS;
2068                        break;
2069                }
2070
2071                /* get current irq counts */
2072                spin_lock_irqsave(&info->lock,flags);
2073                cnow = info->icount;
2074                newsigs = info->input_signal_events;
2075                set_current_state(TASK_INTERRUPTIBLE);
2076                spin_unlock_irqrestore(&info->lock,flags);
2077
2078                /* if no change, wait aborted for some reason */
2079                if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2080                    newsigs.dsr_down == oldsigs.dsr_down &&
2081                    newsigs.dcd_up   == oldsigs.dcd_up   &&
2082                    newsigs.dcd_down == oldsigs.dcd_down &&
2083                    newsigs.cts_up   == oldsigs.cts_up   &&
2084                    newsigs.cts_down == oldsigs.cts_down &&
2085                    newsigs.ri_up    == oldsigs.ri_up    &&
2086                    newsigs.ri_down  == oldsigs.ri_down  &&
2087                    cnow.exithunt    == cprev.exithunt   &&
2088                    cnow.rxidle      == cprev.rxidle) {
2089                        rc = -EIO;
2090                        break;
2091                }
2092
2093                events = mask &
2094                        ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2095                          (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2096                          (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2097                          (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2098                          (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2099                          (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2100                          (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2101                          (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2102                          (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2103                          (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2104                if (events)
2105                        break;
2106
2107                cprev = cnow;
2108                oldsigs = newsigs;
2109        }
2110
2111        remove_wait_queue(&info->event_wait_q, &wait);
2112        set_current_state(TASK_RUNNING);
2113
2114        if (mask & MgslEvent_ExitHuntMode) {
2115                spin_lock_irqsave(&info->lock,flags);
2116                if (!waitqueue_active(&info->event_wait_q))
2117                        irq_disable(info, CHA, IRQ_EXITHUNT);
2118                spin_unlock_irqrestore(&info->lock,flags);
2119        }
2120exit:
2121        if (rc == 0)
2122                PUT_USER(rc, events, mask_ptr);
2123        return rc;
2124}
2125
2126static int modem_input_wait(MGSLPC_INFO *info,int arg)
2127{
2128        unsigned long flags;
2129        int rc;
2130        struct mgsl_icount cprev, cnow;
2131        DECLARE_WAITQUEUE(wait, current);
2132
2133        /* save current irq counts */
2134        spin_lock_irqsave(&info->lock,flags);
2135        cprev = info->icount;
2136        add_wait_queue(&info->status_event_wait_q, &wait);
2137        set_current_state(TASK_INTERRUPTIBLE);
2138        spin_unlock_irqrestore(&info->lock,flags);
2139
2140        for(;;) {
2141                schedule();
2142                if (signal_pending(current)) {
2143                        rc = -ERESTARTSYS;
2144                        break;
2145                }
2146
2147                /* get new irq counts */
2148                spin_lock_irqsave(&info->lock,flags);
2149                cnow = info->icount;
2150                set_current_state(TASK_INTERRUPTIBLE);
2151                spin_unlock_irqrestore(&info->lock,flags);
2152
2153                /* if no change, wait aborted for some reason */
2154                if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2155                    cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2156                        rc = -EIO;
2157                        break;
2158                }
2159
2160                /* check for change in caller specified modem input */
2161                if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2162                    (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2163                    (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2164                    (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2165                        rc = 0;
2166                        break;
2167                }
2168
2169                cprev = cnow;
2170        }
2171        remove_wait_queue(&info->status_event_wait_q, &wait);
2172        set_current_state(TASK_RUNNING);
2173        return rc;
2174}
2175
2176/* return the state of the serial control and status signals
2177 */
2178static int tiocmget(struct tty_struct *tty, struct file *file)
2179{
2180        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2181        unsigned int result;
2182        unsigned long flags;
2183
2184        spin_lock_irqsave(&info->lock,flags);
2185        get_signals(info);
2186        spin_unlock_irqrestore(&info->lock,flags);
2187
2188        result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2189                ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2190                ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2191                ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2192                ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2193                ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2194
2195        if (debug_level >= DEBUG_LEVEL_INFO)
2196                printk("%s(%d):%s tiocmget() value=%08X\n",
2197                         __FILE__,__LINE__, info->device_name, result );
2198        return result;
2199}
2200
2201/* set modem control signals (DTR/RTS)
2202 */
2203static int tiocmset(struct tty_struct *tty, struct file *file,
2204                    unsigned int set, unsigned int clear)
2205{
2206        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2207        unsigned long flags;
2208
2209        if (debug_level >= DEBUG_LEVEL_INFO)
2210                printk("%s(%d):%s tiocmset(%x,%x)\n",
2211                        __FILE__,__LINE__,info->device_name, set, clear);
2212
2213        if (set & TIOCM_RTS)
2214                info->serial_signals |= SerialSignal_RTS;
2215        if (set & TIOCM_DTR)
2216                info->serial_signals |= SerialSignal_DTR;
2217        if (clear & TIOCM_RTS)
2218                info->serial_signals &= ~SerialSignal_RTS;
2219        if (clear & TIOCM_DTR)
2220                info->serial_signals &= ~SerialSignal_DTR;
2221
2222        spin_lock_irqsave(&info->lock,flags);
2223        set_signals(info);
2224        spin_unlock_irqrestore(&info->lock,flags);
2225
2226        return 0;
2227}
2228
2229/* Set or clear transmit break condition
2230 *
2231 * Arguments:           tty             pointer to tty instance data
2232 *                      break_state     -1=set break condition, 0=clear
2233 */
2234static int mgslpc_break(struct tty_struct *tty, int break_state)
2235{
2236        MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2237        unsigned long flags;
2238
2239        if (debug_level >= DEBUG_LEVEL_INFO)
2240                printk("%s(%d):mgslpc_break(%s,%d)\n",
2241                         __FILE__,__LINE__, info->device_name, break_state);
2242
2243        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2244                return -EINVAL;
2245
2246        spin_lock_irqsave(&info->lock,flags);
2247        if (break_state == -1)
2248                set_reg_bits(info, CHA+DAFO, BIT6);
2249        else
2250                clear_reg_bits(info, CHA+DAFO, BIT6);
2251        spin_unlock_irqrestore(&info->lock,flags);
2252        return 0;
2253}
2254
2255/* Service an IOCTL request
2256 *
2257 * Arguments:
2258 *
2259 *      tty     pointer to tty instance data
2260 *      file    pointer to associated file object for device
2261 *      cmd     IOCTL command code
2262 *      arg     command argument/context
2263 *
2264 * Return Value:        0 if success, otherwise error code
2265 */
2266static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2267                        unsigned int cmd, unsigned long arg)
2268{
2269        MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2270        int error;
2271        struct mgsl_icount cnow;        /* kernel counter temps */
2272        struct serial_icounter_struct __user *p_cuser;  /* user space */
2273        void __user *argp = (void __user *)arg;
2274        unsigned long flags;
2275
2276        if (debug_level >= DEBUG_LEVEL_INFO)
2277                printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2278                        info->device_name, cmd );
2279
2280        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2281                return -ENODEV;
2282
2283        if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2284            (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2285                if (tty->flags & (1 << TTY_IO_ERROR))
2286                    return -EIO;
2287        }
2288
2289        switch (cmd) {
2290        case MGSL_IOCGPARAMS:
2291                return get_params(info, argp);
2292        case MGSL_IOCSPARAMS:
2293                return set_params(info, argp, tty);
2294        case MGSL_IOCGTXIDLE:
2295                return get_txidle(info, argp);
2296        case MGSL_IOCSTXIDLE:
2297                return set_txidle(info, (int)arg);
2298        case MGSL_IOCGIF:
2299                return get_interface(info, argp);
2300        case MGSL_IOCSIF:
2301                return set_interface(info,(int)arg);
2302        case MGSL_IOCTXENABLE:
2303                return set_txenable(info,(int)arg, tty);
2304        case MGSL_IOCRXENABLE:
2305                return set_rxenable(info,(int)arg);
2306        case MGSL_IOCTXABORT:
2307                return tx_abort(info);
2308        case MGSL_IOCGSTATS:
2309                return get_stats(info, argp);
2310        case MGSL_IOCWAITEVENT:
2311                return wait_events(info, argp);
2312        case TIOCMIWAIT:
2313                return modem_input_wait(info,(int)arg);
2314        case TIOCGICOUNT:
2315                spin_lock_irqsave(&info->lock,flags);
2316                cnow = info->icount;
2317                spin_unlock_irqrestore(&info->lock,flags);
2318                p_cuser = argp;
2319                PUT_USER(error,cnow.cts, &p_cuser->cts);
2320                if (error) return error;
2321                PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2322                if (error) return error;
2323                PUT_USER(error,cnow.rng, &p_cuser->rng);
2324                if (error) return error;
2325                PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2326                if (error) return error;
2327                PUT_USER(error,cnow.rx, &p_cuser->rx);
2328                if (error) return error;
2329                PUT_USER(error,cnow.tx, &p_cuser->tx);
2330                if (error) return error;
2331                PUT_USER(error,cnow.frame, &p_cuser->frame);
2332                if (error) return error;
2333                PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2334                if (error) return error;
2335                PUT_USER(error,cnow.parity, &p_cuser->parity);
2336                if (error) return error;
2337                PUT_USER(error,cnow.brk, &p_cuser->brk);
2338                if (error) return error;
2339                PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2340                if (error) return error;
2341                return 0;
2342        default:
2343                return -ENOIOCTLCMD;
2344        }
2345        return 0;
2346}
2347
2348/* Set new termios settings
2349 *
2350 * Arguments:
2351 *
2352 *      tty             pointer to tty structure
2353 *      termios         pointer to buffer to hold returned old termios
2354 */
2355static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2356{
2357        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2358        unsigned long flags;
2359
2360        if (debug_level >= DEBUG_LEVEL_INFO)
2361                printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2362                        tty->driver->name );
2363
2364        /* just return if nothing has changed */
2365        if ((tty->termios->c_cflag == old_termios->c_cflag)
2366            && (RELEVANT_IFLAG(tty->termios->c_iflag)
2367                == RELEVANT_IFLAG(old_termios->c_iflag)))
2368          return;
2369
2370        mgslpc_change_params(info, tty);
2371
2372        /* Handle transition to B0 status */
2373        if (old_termios->c_cflag & CBAUD &&
2374            !(tty->termios->c_cflag & CBAUD)) {
2375                info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2376                spin_lock_irqsave(&info->lock,flags);
2377                set_signals(info);
2378                spin_unlock_irqrestore(&info->lock,flags);
2379        }
2380
2381        /* Handle transition away from B0 status */
2382        if (!(old_termios->c_cflag & CBAUD) &&
2383            tty->termios->c_cflag & CBAUD) {
2384                info->serial_signals |= SerialSignal_DTR;
2385                if (!(tty->termios->c_cflag & CRTSCTS) ||
2386                    !test_bit(TTY_THROTTLED, &tty->flags)) {
2387                        info->serial_signals |= SerialSignal_RTS;
2388                }
2389                spin_lock_irqsave(&info->lock,flags);
2390                set_signals(info);
2391                spin_unlock_irqrestore(&info->lock,flags);
2392        }
2393
2394        /* Handle turning off CRTSCTS */
2395        if (old_termios->c_cflag & CRTSCTS &&
2396            !(tty->termios->c_cflag & CRTSCTS)) {
2397                tty->hw_stopped = 0;
2398                tx_release(tty);
2399        }
2400}
2401
2402static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2403{
2404        MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2405        struct tty_port *port = &info->port;
2406
2407        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2408                return;
2409
2410        if (debug_level >= DEBUG_LEVEL_INFO)
2411                printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2412                         __FILE__,__LINE__, info->device_name, port->count);
2413
2414        WARN_ON(!port->count);
2415
2416        if (tty_port_close_start(port, tty, filp) == 0)
2417                goto cleanup;
2418
2419        if (port->flags & ASYNC_INITIALIZED)
2420                mgslpc_wait_until_sent(tty, info->timeout);
2421
2422        mgslpc_flush_buffer(tty);
2423
2424        tty_ldisc_flush(tty);
2425        shutdown(info, tty);
2426        
2427        tty_port_close_end(port, tty);
2428        tty_port_tty_set(port, NULL);
2429cleanup:
2430        if (debug_level >= DEBUG_LEVEL_INFO)
2431                printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2432                        tty->driver->name, port->count);
2433}
2434
2435/* Wait until the transmitter is empty.
2436 */
2437static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2438{
2439        MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2440        unsigned long orig_jiffies, char_time;
2441
2442        if (!info )
2443                return;
2444
2445        if (debug_level >= DEBUG_LEVEL_INFO)
2446                printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2447                         __FILE__,__LINE__, info->device_name );
2448
2449        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2450                return;
2451
2452        if (!(info->port.flags & ASYNC_INITIALIZED))
2453                goto exit;
2454
2455        orig_jiffies = jiffies;
2456
2457        /* Set check interval to 1/5 of estimated time to
2458         * send a character, and make it at least 1. The check
2459         * interval should also be less than the timeout.
2460         * Note: use tight timings here to satisfy the NIST-PCTS.
2461         */
2462
2463        if ( info->params.data_rate ) {
2464                char_time = info->timeout/(32 * 5);
2465                if (!char_time)
2466                        char_time++;
2467        } else
2468                char_time = 1;
2469
2470        if (timeout)
2471                char_time = min_t(unsigned long, char_time, timeout);
2472
2473        if (info->params.mode == MGSL_MODE_HDLC) {
2474                while (info->tx_active) {
2475                        msleep_interruptible(jiffies_to_msecs(char_time));
2476                        if (signal_pending(current))
2477                                break;
2478                        if (timeout && time_after(jiffies, orig_jiffies + timeout))
2479                                break;
2480                }
2481        } else {
2482                while ((info->tx_count || info->tx_active) &&
2483                        info->tx_enabled) {
2484                        msleep_interruptible(jiffies_to_msecs(char_time));
2485                        if (signal_pending(current))
2486                                break;
2487                        if (timeout && time_after(jiffies, orig_jiffies + timeout))
2488                                break;
2489                }
2490        }
2491
2492exit:
2493        if (debug_level >= DEBUG_LEVEL_INFO)
2494                printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2495                         __FILE__,__LINE__, info->device_name );
2496}
2497
2498/* Called by tty_hangup() when a hangup is signaled.
2499 * This is the same as closing all open files for the port.
2500 */
2501static void mgslpc_hangup(struct tty_struct *tty)
2502{
2503        MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2504
2505        if (debug_level >= DEBUG_LEVEL_INFO)
2506                printk("%s(%d):mgslpc_hangup(%s)\n",
2507                         __FILE__,__LINE__, info->device_name );
2508
2509        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2510                return;
2511
2512        mgslpc_flush_buffer(tty);
2513        shutdown(info, tty);
2514        tty_port_hangup(&info->port);
2515}
2516
2517static int carrier_raised(struct tty_port *port)
2518{
2519        MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2520        unsigned long flags;
2521
2522        spin_lock_irqsave(&info->lock,flags);
2523        get_signals(info);
2524        spin_unlock_irqrestore(&info->lock,flags);
2525
2526        if (info->serial_signals & SerialSignal_DCD)
2527                return 1;
2528        return 0;
2529}
2530
2531static void dtr_rts(struct tty_port *port, int onoff)
2532{
2533        MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2534        unsigned long flags;
2535
2536        spin_lock_irqsave(&info->lock,flags);
2537        if (onoff)
2538                info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2539        else
2540                info->serial_signals &= ~SerialSignal_RTS + SerialSignal_DTR;
2541        set_signals(info);
2542        spin_unlock_irqrestore(&info->lock,flags);
2543}
2544
2545
2546static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2547{
2548        MGSLPC_INFO     *info;
2549        struct tty_port *port;
2550        int                     retval, line;
2551        unsigned long flags;
2552
2553        /* verify range of specified line number */
2554        line = tty->index;
2555        if ((line < 0) || (line >= mgslpc_device_count)) {
2556                printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2557                        __FILE__,__LINE__,line);
2558                return -ENODEV;
2559        }
2560
2561        /* find the info structure for the specified line */
2562        info = mgslpc_device_list;
2563        while(info && info->line != line)
2564                info = info->next_device;
2565        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2566                return -ENODEV;
2567
2568        port = &info->port;
2569        tty->driver_data = info;
2570        tty_port_tty_set(port, tty);
2571
2572        if (debug_level >= DEBUG_LEVEL_INFO)
2573                printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2574                         __FILE__,__LINE__,tty->driver->name, port->count);
2575
2576        /* If port is closing, signal caller to try again */
2577        if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
2578                if (port->flags & ASYNC_CLOSING)
2579                        interruptible_sleep_on(&port->close_wait);
2580                retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
2581                        -EAGAIN : -ERESTARTSYS);
2582                goto cleanup;
2583        }
2584
2585        tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2586
2587        spin_lock_irqsave(&info->netlock, flags);
2588        if (info->netcount) {
2589                retval = -EBUSY;
2590                spin_unlock_irqrestore(&info->netlock, flags);
2591                goto cleanup;
2592        }
2593        spin_lock(&port->lock);
2594        port->count++;
2595        spin_unlock(&port->lock);
2596        spin_unlock_irqrestore(&info->netlock, flags);
2597
2598        if (port->count == 1) {
2599                /* 1st open on this device, init hardware */
2600                retval = startup(info, tty);
2601                if (retval < 0)
2602                        goto cleanup;
2603        }
2604
2605        retval = tty_port_block_til_ready(&info->port, tty, filp);
2606        if (retval) {
2607                if (debug_level >= DEBUG_LEVEL_INFO)
2608                        printk("%s(%d):block_til_ready(%s) returned %d\n",
2609                                 __FILE__,__LINE__, info->device_name, retval);
2610                goto cleanup;
2611        }
2612
2613        if (debug_level >= DEBUG_LEVEL_INFO)
2614                printk("%s(%d):mgslpc_open(%s) success\n",
2615                         __FILE__,__LINE__, info->device_name);
2616        retval = 0;
2617
2618cleanup:
2619        return retval;
2620}
2621
2622/*
2623 * /proc fs routines....
2624 */
2625
2626static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2627{
2628        char    stat_buf[30];
2629        unsigned long flags;
2630
2631        seq_printf(m, "%s:io:%04X irq:%d",
2632                      info->device_name, info->io_base, info->irq_level);
2633
2634        /* output current serial signal states */
2635        spin_lock_irqsave(&info->lock,flags);
2636        get_signals(info);
2637        spin_unlock_irqrestore(&info->lock,flags);
2638
2639        stat_buf[0] = 0;
2640        stat_buf[1] = 0;
2641        if (info->serial_signals & SerialSignal_RTS)
2642                strcat(stat_buf, "|RTS");
2643        if (info->serial_signals & SerialSignal_CTS)
2644                strcat(stat_buf, "|CTS");
2645        if (info->serial_signals & SerialSignal_DTR)
2646                strcat(stat_buf, "|DTR");
2647        if (info->serial_signals & SerialSignal_DSR)
2648                strcat(stat_buf, "|DSR");
2649        if (info->serial_signals & SerialSignal_DCD)
2650                strcat(stat_buf, "|CD");
2651        if (info->serial_signals & SerialSignal_RI)
2652                strcat(stat_buf, "|RI");
2653
2654        if (info->params.mode == MGSL_MODE_HDLC) {
2655                seq_printf(m, " HDLC txok:%d rxok:%d",
2656                              info->icount.txok, info->icount.rxok);
2657                if (info->icount.txunder)
2658                        seq_printf(m, " txunder:%d", info->icount.txunder);
2659                if (info->icount.txabort)
2660                        seq_printf(m, " txabort:%d", info->icount.txabort);
2661                if (info->icount.rxshort)
2662                        seq_printf(m, " rxshort:%d", info->icount.rxshort);
2663                if (info->icount.rxlong)
2664                        seq_printf(m, " rxlong:%d", info->icount.rxlong);
2665                if (info->icount.rxover)
2666                        seq_printf(m, " rxover:%d", info->icount.rxover);
2667                if (info->icount.rxcrc)
2668                        seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2669        } else {
2670                seq_printf(m, " ASYNC tx:%d rx:%d",
2671                              info->icount.tx, info->icount.rx);
2672                if (info->icount.frame)
2673                        seq_printf(m, " fe:%d", info->icount.frame);
2674                if (info->icount.parity)
2675                        seq_printf(m, " pe:%d", info->icount.parity);
2676                if (info->icount.brk)
2677                        seq_printf(m, " brk:%d", info->icount.brk);
2678                if (info->icount.overrun)
2679                        seq_printf(m, " oe:%d", info->icount.overrun);
2680        }
2681
2682        /* Append serial signal status to end */
2683        seq_printf(m, " %s\n", stat_buf+1);
2684
2685        seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2686                       info->tx_active,info->bh_requested,info->bh_running,
2687                       info->pending_bh);
2688}
2689
2690/* Called to print information about devices
2691 */
2692static int mgslpc_proc_show(struct seq_file *m, void *v)
2693{
2694        MGSLPC_INFO *info;
2695
2696        seq_printf(m, "synclink driver:%s\n", driver_version);
2697
2698        info = mgslpc_device_list;
2699        while( info ) {
2700                line_info(m, info);
2701                info = info->next_device;
2702        }
2703        return 0;
2704}
2705
2706static int mgslpc_proc_open(struct inode *inode, struct file *file)
2707{
2708        return single_open(file, mgslpc_proc_show, NULL);
2709}
2710
2711static const struct file_operations mgslpc_proc_fops = {
2712        .owner          = THIS_MODULE,
2713        .open           = mgslpc_proc_open,
2714        .read           = seq_read,
2715        .llseek         = seq_lseek,
2716        .release        = single_release,
2717};
2718
2719static int rx_alloc_buffers(MGSLPC_INFO *info)
2720{
2721        /* each buffer has header and data */
2722        info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2723
2724        /* calculate total allocation size for 8 buffers */
2725        info->rx_buf_total_size = info->rx_buf_size * 8;
2726
2727        /* limit total allocated memory */
2728        if (info->rx_buf_total_size > 0x10000)
2729                info->rx_buf_total_size = 0x10000;
2730
2731        /* calculate number of buffers */
2732        info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2733
2734        info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2735        if (info->rx_buf == NULL)
2736                return -ENOMEM;
2737
2738        rx_reset_buffers(info);
2739        return 0;
2740}
2741
2742static void rx_free_buffers(MGSLPC_INFO *info)
2743{
2744        kfree(info->rx_buf);
2745        info->rx_buf = NULL;
2746}
2747
2748static int claim_resources(MGSLPC_INFO *info)
2749{
2750        if (rx_alloc_buffers(info) < 0 ) {
2751                printk( "Cant allocate rx buffer %s\n", info->device_name);
2752                release_resources(info);
2753                return -ENODEV;
2754        }
2755        return 0;
2756}
2757
2758static void release_resources(MGSLPC_INFO *info)
2759{
2760        if (debug_level >= DEBUG_LEVEL_INFO)
2761                printk("release_resources(%s)\n", info->device_name);
2762        rx_free_buffers(info);
2763}
2764
2765/* Add the specified device instance data structure to the
2766 * global linked list of devices and increment the device count.
2767 *
2768 * Arguments:           info    pointer to device instance data
2769 */
2770static void mgslpc_add_device(MGSLPC_INFO *info)
2771{
2772        info->next_device = NULL;
2773        info->line = mgslpc_device_count;
2774        sprintf(info->device_name,"ttySLP%d",info->line);
2775
2776        if (info->line < MAX_DEVICE_COUNT) {
2777                if (maxframe[info->line])
2778                        info->max_frame_size = maxframe[info->line];
2779        }
2780
2781        mgslpc_device_count++;
2782
2783        if (!mgslpc_device_list)
2784                mgslpc_device_list = info;
2785        else {
2786                MGSLPC_INFO *current_dev = mgslpc_device_list;
2787                while( current_dev->next_device )
2788                        current_dev = current_dev->next_device;
2789                current_dev->next_device = info;
2790        }
2791
2792        if (info->max_frame_size < 4096)
2793                info->max_frame_size = 4096;
2794        else if (info->max_frame_size > 65535)
2795                info->max_frame_size = 65535;
2796
2797        printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2798                info->device_name, info->io_base, info->irq_level);
2799
2800#if SYNCLINK_GENERIC_HDLC
2801        hdlcdev_init(info);
2802#endif
2803}
2804
2805static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2806{
2807        MGSLPC_INFO *info = mgslpc_device_list;
2808        MGSLPC_INFO *last = NULL;
2809
2810        while(info) {
2811                if (info == remove_info) {
2812                        if (last)
2813                                last->next_device = info->next_device;
2814                        else
2815                                mgslpc_device_list = info->next_device;
2816#if SYNCLINK_GENERIC_HDLC
2817                        hdlcdev_exit(info);
2818#endif
2819                        release_resources(info);
2820                        kfree(info);
2821                        mgslpc_device_count--;
2822                        return;
2823                }
2824                last = info;
2825                info = info->next_device;
2826        }
2827}
2828
2829static struct pcmcia_device_id mgslpc_ids[] = {
2830        PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2831        PCMCIA_DEVICE_NULL
2832};
2833MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2834
2835static struct pcmcia_driver mgslpc_driver = {
2836        .owner          = THIS_MODULE,
2837        .drv            = {
2838                .name   = "synclink_cs",
2839        },
2840        .probe          = mgslpc_probe,
2841        .remove         = mgslpc_detach,
2842        .id_table       = mgslpc_ids,
2843        .suspend        = mgslpc_suspend,
2844        .resume         = mgslpc_resume,
2845};
2846
2847static const struct tty_operations mgslpc_ops = {
2848        .open = mgslpc_open,
2849        .close = mgslpc_close,
2850        .write = mgslpc_write,
2851        .put_char = mgslpc_put_char,
2852        .flush_chars = mgslpc_flush_chars,
2853        .write_room = mgslpc_write_room,
2854        .chars_in_buffer = mgslpc_chars_in_buffer,
2855        .flush_buffer = mgslpc_flush_buffer,
2856        .ioctl = mgslpc_ioctl,
2857        .throttle = mgslpc_throttle,
2858        .unthrottle = mgslpc_unthrottle,
2859        .send_xchar = mgslpc_send_xchar,
2860        .break_ctl = mgslpc_break,
2861        .wait_until_sent = mgslpc_wait_until_sent,
2862        .set_termios = mgslpc_set_termios,
2863        .stop = tx_pause,
2864        .start = tx_release,
2865        .hangup = mgslpc_hangup,
2866        .tiocmget = tiocmget,
2867        .tiocmset = tiocmset,
2868        .proc_fops = &mgslpc_proc_fops,
2869};
2870
2871static void synclink_cs_cleanup(void)
2872{
2873        int rc;
2874
2875        printk("Unloading %s: version %s\n", driver_name, driver_version);
2876
2877        while(mgslpc_device_list)
2878                mgslpc_remove_device(mgslpc_device_list);
2879
2880        if (serial_driver) {
2881                if ((rc = tty_unregister_driver(serial_driver)))
2882                        printk("%s(%d) failed to unregister tty driver err=%d\n",
2883                               __FILE__,__LINE__,rc);
2884                put_tty_driver(serial_driver);
2885        }
2886
2887        pcmcia_unregister_driver(&mgslpc_driver);
2888}
2889
2890static int __init synclink_cs_init(void)
2891{
2892    int rc;
2893
2894    if (break_on_load) {
2895            mgslpc_get_text_ptr();
2896            BREAKPOINT();
2897    }
2898
2899    printk("%s %s\n", driver_name, driver_version);
2900
2901    if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
2902            return rc;
2903
2904    serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
2905    if (!serial_driver) {
2906            rc = -ENOMEM;
2907            goto error;
2908    }
2909
2910    /* Initialize the tty_driver structure */
2911
2912    serial_driver->owner = THIS_MODULE;
2913    serial_driver->driver_name = "synclink_cs";
2914    serial_driver->name = "ttySLP";
2915    serial_driver->major = ttymajor;
2916    serial_driver->minor_start = 64;
2917    serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2918    serial_driver->subtype = SERIAL_TYPE_NORMAL;
2919    serial_driver->init_termios = tty_std_termios;
2920    serial_driver->init_termios.c_cflag =
2921            B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2922    serial_driver->flags = TTY_DRIVER_REAL_RAW;
2923    tty_set_operations(serial_driver, &mgslpc_ops);
2924
2925    if ((rc = tty_register_driver(serial_driver)) < 0) {
2926            printk("%s(%d):Couldn't register serial driver\n",
2927                   __FILE__,__LINE__);
2928            put_tty_driver(serial_driver);
2929            serial_driver = NULL;
2930            goto error;
2931    }
2932
2933    printk("%s %s, tty major#%d\n",
2934           driver_name, driver_version,
2935           serial_driver->major);
2936
2937    return 0;
2938
2939error:
2940    synclink_cs_cleanup();
2941    return rc;
2942}
2943
2944static void __exit synclink_cs_exit(void)
2945{
2946        synclink_cs_cleanup();
2947}
2948
2949module_init(synclink_cs_init);
2950module_exit(synclink_cs_exit);
2951
2952static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2953{
2954        unsigned int M, N;
2955        unsigned char val;
2956
2957        /* note:standard BRG mode is broken in V3.2 chip
2958         * so enhanced mode is always used
2959         */
2960
2961        if (rate) {
2962                N = 3686400 / rate;
2963                if (!N)
2964                        N = 1;
2965                N >>= 1;
2966                for (M = 1; N > 64 && M < 16; M++)
2967                        N >>= 1;
2968                N--;
2969
2970                /* BGR[5..0] = N
2971                 * BGR[9..6] = M
2972                 * BGR[7..0] contained in BGR register
2973                 * BGR[9..8] contained in CCR2[7..6]
2974                 * divisor = (N+1)*2^M
2975                 *
2976                 * Note: M *must* not be zero (causes asymetric duty cycle)
2977                 */
2978                write_reg(info, (unsigned char) (channel + BGR),
2979                                  (unsigned char) ((M << 6) + N));
2980                val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2981                val |= ((M << 4) & 0xc0);
2982                write_reg(info, (unsigned char) (channel + CCR2), val);
2983        }
2984}
2985
2986/* Enabled the AUX clock output at the specified frequency.
2987 */
2988static void enable_auxclk(MGSLPC_INFO *info)
2989{
2990        unsigned char val;
2991
2992        /* MODE
2993         *
2994         * 07..06  MDS[1..0] 10 = transparent HDLC mode
2995         * 05      ADM Address Mode, 0 = no addr recognition
2996         * 04      TMD Timer Mode, 0 = external
2997         * 03      RAC Receiver Active, 0 = inactive
2998         * 02      RTS 0=RTS active during xmit, 1=RTS always active
2999         * 01      TRS Timer Resolution, 1=512
3000         * 00      TLP Test Loop, 0 = no loop
3001         *
3002         * 1000 0010
3003         */
3004        val = 0x82;
3005
3006        /* channel B RTS is used to enable AUXCLK driver on SP505 */
3007        if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3008                val |= BIT2;
3009        write_reg(info, CHB + MODE, val);
3010
3011        /* CCR0
3012         *
3013         * 07      PU Power Up, 1=active, 0=power down
3014         * 06      MCE Master Clock Enable, 1=enabled
3015         * 05      Reserved, 0
3016         * 04..02  SC[2..0] Encoding
3017         * 01..00  SM[1..0] Serial Mode, 00=HDLC
3018         *
3019         * 11000000
3020         */
3021        write_reg(info, CHB + CCR0, 0xc0);
3022
3023        /* CCR1
3024         *
3025         * 07      SFLG Shared Flag, 0 = disable shared flags
3026         * 06      GALP Go Active On Loop, 0 = not used
3027         * 05      GLP Go On Loop, 0 = not used
3028         * 04      ODS Output Driver Select, 1=TxD is push-pull output
3029         * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3030         * 02..00  CM[2..0] Clock Mode
3031         *
3032         * 0001 0111
3033         */
3034        write_reg(info, CHB + CCR1, 0x17);
3035
3036        /* CCR2 (Channel B)
3037         *
3038         * 07..06  BGR[9..8] Baud rate bits 9..8
3039         * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3040         * 04      SSEL Clock source select, 1=submode b
3041         * 03      TOE 0=TxCLK is input, 1=TxCLK is output
3042         * 02      RWX Read/Write Exchange 0=disabled
3043         * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3044         * 00      DIV, data inversion 0=disabled, 1=enabled
3045         *
3046         * 0011 1000
3047         */
3048        if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3049                write_reg(info, CHB + CCR2, 0x38);
3050        else
3051                write_reg(info, CHB + CCR2, 0x30);
3052
3053        /* CCR4
3054         *
3055         * 07      MCK4 Master Clock Divide by 4, 1=enabled
3056         * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3057         * 05      TST1 Test Pin, 0=normal operation
3058         * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3059         * 03..02  Reserved, must be 0
3060         * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3061         *
3062         * 0101 0000
3063         */
3064        write_reg(info, CHB + CCR4, 0x50);
3065
3066        /* if auxclk not enabled, set internal BRG so
3067         * CTS transitions can be detected (requires TxC)
3068         */
3069        if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3070                mgslpc_set_rate(info, CHB, info->params.clock_speed);
3071        else
3072                mgslpc_set_rate(info, CHB, 921600);
3073}
3074
3075static void loopback_enable(MGSLPC_INFO *info)
3076{
3077        unsigned char val;
3078
3079        /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
3080        val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3081        write_reg(info, CHA + CCR1, val);
3082
3083        /* CCR2:04 SSEL Clock source select, 1=submode b */
3084        val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3085        write_reg(info, CHA + CCR2, val);
3086
3087        /* set LinkSpeed if available, otherwise default to 2Mbps */
3088        if (info->params.clock_speed)
3089                mgslpc_set_rate(info, CHA, info->params.clock_speed);
3090        else
3091                mgslpc_set_rate(info, CHA, 1843200);
3092
3093        /* MODE:00 TLP Test Loop, 1=loopback enabled */
3094        val = read_reg(info, CHA + MODE) | BIT0;
3095        write_reg(info, CHA + MODE, val);
3096}
3097
3098static void hdlc_mode(MGSLPC_INFO *info)
3099{
3100        unsigned char val;
3101        unsigned char clkmode, clksubmode;
3102
3103        /* disable all interrupts */
3104        irq_disable(info, CHA, 0xffff);
3105        irq_disable(info, CHB, 0xffff);
3106        port_irq_disable(info, 0xff);
3107
3108        /* assume clock mode 0a, rcv=RxC xmt=TxC */
3109        clkmode = clksubmode = 0;
3110        if (info->params.flags & HDLC_FLAG_RXC_DPLL
3111            && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3112                /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3113                clkmode = 7;
3114        } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3115                 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3116                /* clock mode 7b, rcv = BRG, xmt = BRG */
3117                clkmode = 7;
3118                clksubmode = 1;
3119        } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3120                if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3121                        /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3122                        clkmode = 6;
3123                        clksubmode = 1;
3124                } else {
3125                        /* clock mode 6a, rcv = DPLL, xmt = TxC */
3126                        clkmode = 6;
3127                }
3128        } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3129                /* clock mode 0b, rcv = RxC, xmt = BRG */
3130                clksubmode = 1;
3131        }
3132
3133        /* MODE
3134         *
3135         * 07..06  MDS[1..0] 10 = transparent HDLC mode
3136         * 05      ADM Address Mode, 0 = no addr recognition
3137         * 04      TMD Timer Mode, 0 = external
3138         * 03      RAC Receiver Active, 0 = inactive
3139         * 02      RTS 0=RTS active during xmit, 1=RTS always active
3140         * 01      TRS Timer Resolution, 1=512
3141         * 00      TLP Test Loop, 0 = no loop
3142         *
3143         * 1000 0010
3144         */
3145        val = 0x82;
3146        if (info->params.loopback)
3147                val |= BIT0;
3148
3149        /* preserve RTS state */
3150        if (info->serial_signals & SerialSignal_RTS)
3151                val |= BIT2;
3152        write_reg(info, CHA + MODE, val);
3153
3154        /* CCR0
3155         *
3156         * 07      PU Power Up, 1=active, 0=power down
3157         * 06      MCE Master Clock Enable, 1=enabled
3158         * 05      Reserved, 0
3159         * 04..02  SC[2..0] Encoding
3160         * 01..00  SM[1..0] Serial Mode, 00=HDLC
3161         *
3162         * 11000000
3163         */
3164        val = 0xc0;
3165        switch (info->params.encoding)
3166        {
3167        case HDLC_ENCODING_NRZI:
3168                val |= BIT3;
3169                break;
3170        case HDLC_ENCODING_BIPHASE_SPACE:
3171                val |= BIT4;
3172                break;          // FM0
3173        case HDLC_ENCODING_BIPHASE_MARK:
3174                val |= BIT4 + BIT2;
3175                break;          // FM1
3176        case HDLC_ENCODING_BIPHASE_LEVEL:
3177                val |= BIT4 + BIT3;
3178                break;          // Manchester
3179        }
3180        write_reg(info, CHA + CCR0, val);
3181
3182        /* CCR1
3183         *
3184         * 07      SFLG Shared Flag, 0 = disable shared flags
3185         * 06      GALP Go Active On Loop, 0 = not used
3186         * 05      GLP Go On Loop, 0 = not used
3187         * 04      ODS Output Driver Select, 1=TxD is push-pull output
3188         * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3189         * 02..00  CM[2..0] Clock Mode
3190         *
3191         * 0001 0000
3192         */
3193        val = 0x10 + clkmode;
3194        write_reg(info, CHA + CCR1, val);
3195
3196        /* CCR2
3197         *
3198         * 07..06  BGR[9..8] Baud rate bits 9..8
3199         * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3200         * 04      SSEL Clock source select, 1=submode b
3201         * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3202         * 02      RWX Read/Write Exchange 0=disabled
3203         * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3204         * 00      DIV, data inversion 0=disabled, 1=enabled
3205         *
3206         * 0000 0000
3207         */
3208        val = 0x00;
3209        if (clkmode == 2 || clkmode == 3 || clkmode == 6
3210            || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3211                val |= BIT5;
3212        if (clksubmode)
3213                val |= BIT4;
3214        if (info->params.crc_type == HDLC_CRC_32_CCITT)
3215                val |= BIT1;
3216        if (info->params.encoding == HDLC_ENCODING_NRZB)
3217                val |= BIT0;
3218        write_reg(info, CHA + CCR2, val);
3219
3220        /* CCR3
3221         *
3222         * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3223         * 05      EPT Enable preamble transmission, 1=enabled
3224         * 04      RADD Receive address pushed to FIFO, 0=disabled
3225         * 03      CRL CRC Reset Level, 0=FFFF
3226         * 02      RCRC Rx CRC 0=On 1=Off
3227         * 01      TCRC Tx CRC 0=On 1=Off
3228         * 00      PSD DPLL Phase Shift Disable
3229         *
3230         * 0000 0000
3231         */
3232        val = 0x00;
3233        if (info->params.crc_type == HDLC_CRC_NONE)
3234                val |= BIT2 + BIT1;
3235        if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3236                val |= BIT5;
3237        switch (info->params.preamble_length)
3238        {
3239        case HDLC_PREAMBLE_LENGTH_16BITS:
3240                val |= BIT6;
3241                break;
3242        case HDLC_PREAMBLE_LENGTH_32BITS:
3243                val |= BIT6;
3244                break;
3245        case HDLC_PREAMBLE_LENGTH_64BITS:
3246                val |= BIT7 + BIT6;
3247                break;
3248        }
3249        write_reg(info, CHA + CCR3, val);
3250
3251        /* PRE - Preamble pattern */
3252        val = 0;
3253        switch (info->params.preamble)
3254        {
3255        case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3256        case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3257        case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3258        case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3259        }
3260        write_reg(info, CHA + PRE, val);
3261
3262        /* CCR4
3263         *
3264         * 07      MCK4 Master Clock Divide by 4, 1=enabled
3265         * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3266         * 05      TST1 Test Pin, 0=normal operation
3267         * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3268         * 03..02  Reserved, must be 0
3269         * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3270         *
3271         * 0101 0000
3272         */
3273        val = 0x50;
3274        write_reg(info, CHA + CCR4, val);
3275        if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3276                mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3277        else
3278                mgslpc_set_rate(info, CHA, info->params.clock_speed);
3279
3280        /* RLCR Receive length check register
3281         *
3282         * 7     1=enable receive length check
3283         * 6..0  Max frame length = (RL + 1) * 32
3284         */
3285        write_reg(info, CHA + RLCR, 0);
3286
3287        /* XBCH Transmit Byte Count High
3288         *
3289         * 07      DMA mode, 0 = interrupt driven
3290         * 06      NRM, 0=ABM (ignored)
3291         * 05      CAS Carrier Auto Start
3292         * 04      XC Transmit Continuously (ignored)
3293         * 03..00  XBC[10..8] Transmit byte count bits 10..8
3294         *
3295         * 0000 0000
3296         */
3297        val = 0x00;
3298        if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3299                val |= BIT5;
3300        write_reg(info, CHA + XBCH, val);
3301        enable_auxclk(info);
3302        if (info->params.loopback || info->testing_irq)
3303                loopback_enable(info);
3304        if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3305        {
3306                irq_enable(info, CHB, IRQ_CTS);
3307                /* PVR[3] 1=AUTO CTS active */
3308                set_reg_bits(info, CHA + PVR, BIT3);
3309        } else
3310                clear_reg_bits(info, CHA + PVR, BIT3);
3311
3312        irq_enable(info, CHA,
3313                         IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3314                         IRQ_UNDERRUN + IRQ_TXFIFO);
3315        issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3316        wait_command_complete(info, CHA);
3317        read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3318
3319        /* Master clock mode enabled above to allow reset commands
3320         * to complete even if no data clocks are present.
3321         *
3322         * Disable master clock mode for normal communications because
3323         * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3324         * IRQ when in master clock mode.
3325         *
3326         * Leave master clock mode enabled for IRQ test because the
3327         * timer IRQ used by the test can only happen in master clock mode.
3328         */
3329        if (!info->testing_irq)
3330                clear_reg_bits(info, CHA + CCR0, BIT6);
3331
3332        tx_set_idle(info);
3333
3334        tx_stop(info);
3335        rx_stop(info);
3336}
3337
3338static void rx_stop(MGSLPC_INFO *info)
3339{
3340        if (debug_level >= DEBUG_LEVEL_ISR)
3341                printk("%s(%d):rx_stop(%s)\n",
3342                         __FILE__,__LINE__, info->device_name );
3343
3344        /* MODE:03 RAC Receiver Active, 0=inactive */
3345        clear_reg_bits(info, CHA + MODE, BIT3);
3346
3347        info->rx_enabled = false;
3348        info->rx_overflow = false;
3349}
3350
3351static void rx_start(MGSLPC_INFO *info)
3352{
3353        if (debug_level >= DEBUG_LEVEL_ISR)
3354                printk("%s(%d):rx_start(%s)\n",
3355                         __FILE__,__LINE__, info->device_name );
3356
3357        rx_reset_buffers(info);
3358        info->rx_enabled = false;
3359        info->rx_overflow = false;
3360
3361        /* MODE:03 RAC Receiver Active, 1=active */
3362        set_reg_bits(info, CHA + MODE, BIT3);
3363
3364        info->rx_enabled = true;
3365}
3366
3367static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3368{
3369        if (debug_level >= DEBUG_LEVEL_ISR)
3370                printk("%s(%d):tx_start(%s)\n",
3371                         __FILE__,__LINE__, info->device_name );
3372
3373        if (info->tx_count) {
3374                /* If auto RTS enabled and RTS is inactive, then assert */
3375                /* RTS and set a flag indicating that the driver should */
3376                /* negate RTS when the transmission completes. */
3377                info->drop_rts_on_tx_done = false;
3378
3379                if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3380                        get_signals(info);
3381                        if (!(info->serial_signals & SerialSignal_RTS)) {
3382                                info->serial_signals |= SerialSignal_RTS;
3383                                set_signals(info);
3384                                info->drop_rts_on_tx_done = true;
3385                        }
3386                }
3387
3388                if (info->params.mode == MGSL_MODE_ASYNC) {
3389                        if (!info->tx_active) {
3390                                info->tx_active = true;
3391                                tx_ready(info, tty);
3392                        }
3393                } else {
3394                        info->tx_active = true;
3395                        tx_ready(info, tty);
3396                        mod_timer(&info->tx_timer, jiffies +
3397                                        msecs_to_jiffies(5000));
3398                }
3399        }
3400
3401        if (!info->tx_enabled)
3402                info->tx_enabled = true;
3403}
3404
3405static void tx_stop(MGSLPC_INFO *info)
3406{
3407        if (debug_level >= DEBUG_LEVEL_ISR)
3408                printk("%s(%d):tx_stop(%s)\n",
3409                         __FILE__,__LINE__, info->device_name );
3410
3411        del_timer(&info->tx_timer);
3412
3413        info->tx_enabled = false;
3414        info->tx_active = false;
3415}
3416
3417/* Reset the adapter to a known state and prepare it for further use.
3418 */
3419static void reset_device(MGSLPC_INFO *info)
3420{
3421        /* power up both channels (set BIT7) */
3422        write_reg(info, CHA + CCR0, 0x80);
3423        write_reg(info, CHB + CCR0, 0x80);
3424        write_reg(info, CHA + MODE, 0);
3425        write_reg(info, CHB + MODE, 0);
3426
3427        /* disable all interrupts */
3428        irq_disable(info, CHA, 0xffff);
3429        irq_disable(info, CHB, 0xffff);
3430        port_irq_disable(info, 0xff);
3431
3432        /* PCR Port Configuration Register
3433         *
3434         * 07..04  DEC[3..0] Serial I/F select outputs
3435         * 03      output, 1=AUTO CTS control enabled
3436         * 02      RI Ring Indicator input 0=active
3437         * 01      DSR input 0=active
3438         * 00      DTR output 0=active
3439         *
3440         * 0000 0110
3441         */
3442        write_reg(info, PCR, 0x06);
3443
3444        /* PVR Port Value Register
3445         *
3446         * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3447         * 03      AUTO CTS output 1=enabled
3448         * 02      RI Ring Indicator input
3449         * 01      DSR input
3450         * 00      DTR output (1=inactive)
3451         *
3452         * 0000 0001
3453         */
3454//      write_reg(info, PVR, PVR_DTR);
3455
3456        /* IPC Interrupt Port Configuration
3457         *
3458         * 07      VIS 1=Masked interrupts visible
3459         * 06..05  Reserved, 0
3460         * 04..03  SLA Slave address, 00 ignored
3461         * 02      CASM Cascading Mode, 1=daisy chain
3462         * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3463         *
3464         * 0000 0101
3465         */
3466        write_reg(info, IPC, 0x05);
3467}
3468
3469static void async_mode(MGSLPC_INFO *info)
3470{
3471        unsigned char val;
3472
3473        /* disable all interrupts */
3474        irq_disable(info, CHA, 0xffff);
3475        irq_disable(info, CHB, 0xffff);
3476        port_irq_disable(info, 0xff);
3477
3478        /* MODE
3479         *
3480         * 07      Reserved, 0
3481         * 06      FRTS RTS State, 0=active
3482         * 05      FCTS Flow Control on CTS
3483         * 04      FLON Flow Control Enable
3484         * 03      RAC Receiver Active, 0 = inactive
3485         * 02      RTS 0=Auto RTS, 1=manual RTS
3486         * 01      TRS Timer Resolution, 1=512
3487         * 00      TLP Test Loop, 0 = no loop
3488         *
3489         * 0000 0110
3490         */
3491        val = 0x06;
3492        if (info->params.loopback)
3493                val |= BIT0;
3494
3495        /* preserve RTS state */
3496        if (!(info->serial_signals & SerialSignal_RTS))
3497                val |= BIT6;
3498        write_reg(info, CHA + MODE, val);
3499
3500        /* CCR0
3501         *
3502         * 07      PU Power Up, 1=active, 0=power down
3503         * 06      MCE Master Clock Enable, 1=enabled
3504         * 05      Reserved, 0
3505         * 04..02  SC[2..0] Encoding, 000=NRZ
3506         * 01..00  SM[1..0] Serial Mode, 11=Async
3507         *
3508         * 1000 0011
3509         */
3510        write_reg(info, CHA + CCR0, 0x83);
3511
3512        /* CCR1
3513         *
3514         * 07..05  Reserved, 0
3515         * 04      ODS Output Driver Select, 1=TxD is push-pull output
3516         * 03      BCR Bit Clock Rate, 1=16x
3517         * 02..00  CM[2..0] Clock Mode, 111=BRG
3518         *
3519         * 0001 1111
3520         */
3521        write_reg(info, CHA + CCR1, 0x1f);
3522
3523        /* CCR2 (channel A)
3524         *
3525         * 07..06  BGR[9..8] Baud rate bits 9..8
3526         * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3527         * 04      SSEL Clock source select, 1=submode b
3528         * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3529         * 02      RWX Read/Write Exchange 0=disabled
3530         * 01      Reserved, 0
3531         * 00      DIV, data inversion 0=disabled, 1=enabled
3532         *
3533         * 0001 0000
3534         */
3535        write_reg(info, CHA + CCR2, 0x10);
3536
3537        /* CCR3
3538         *
3539         * 07..01  Reserved, 0
3540         * 00      PSD DPLL Phase Shift Disable
3541         *
3542         * 0000 0000
3543         */
3544        write_reg(info, CHA + CCR3, 0);
3545
3546        /* CCR4
3547         *
3548         * 07      MCK4 Master Clock Divide by 4, 1=enabled
3549         * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3550         * 05      TST1 Test Pin, 0=normal operation
3551         * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3552         * 03..00  Reserved, must be 0
3553         *
3554         * 0101 0000
3555         */
3556        write_reg(info, CHA + CCR4, 0x50);
3557        mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3558
3559        /* DAFO Data Format
3560         *
3561         * 07      Reserved, 0
3562         * 06      XBRK transmit break, 0=normal operation
3563         * 05      Stop bits (0=1, 1=2)
3564         * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3565         * 02      PAREN Parity Enable
3566         * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3567         *
3568         */
3569        val = 0x00;
3570        if (info->params.data_bits != 8)
3571                val |= BIT0;    /* 7 bits */
3572        if (info->params.stop_bits != 1)
3573                val |= BIT5;
3574        if (info->params.parity != ASYNC_PARITY_NONE)
3575        {
3576                val |= BIT2;    /* Parity enable */
3577                if (info->params.parity == ASYNC_PARITY_ODD)
3578                        val |= BIT3;
3579                else
3580                        val |= BIT4;
3581        }
3582        write_reg(info, CHA + DAFO, val);
3583
3584        /* RFC Rx FIFO Control
3585         *
3586         * 07      Reserved, 0
3587         * 06      DPS, 1=parity bit not stored in data byte
3588         * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3589         * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3590         * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3591         * 01      Reserved, 0
3592         * 00      TCDE Terminate Char Detect Enable, 0=disabled
3593         *
3594         * 0101 1100
3595         */
3596        write_reg(info, CHA + RFC, 0x5c);
3597
3598        /* RLCR Receive length check register
3599         *
3600         * Max frame length = (RL + 1) * 32
3601         */
3602        write_reg(info, CHA + RLCR, 0);
3603
3604        /* XBCH Transmit Byte Count High
3605         *
3606         * 07      DMA mode, 0 = interrupt driven
3607         * 06      NRM, 0=ABM (ignored)
3608         * 05      CAS Carrier Auto Start
3609         * 04      XC Transmit Continuously (ignored)
3610         * 03..00  XBC[10..8] Transmit byte count bits 10..8
3611         *
3612         * 0000 0000
3613         */
3614        val = 0x00;
3615        if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3616                val |= BIT5;
3617        write_reg(info, CHA + XBCH, val);
3618        if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3619                irq_enable(info, CHA, IRQ_CTS);
3620
3621        /* MODE:03 RAC Receiver Active, 1=active */
3622        set_reg_bits(info, CHA + MODE, BIT3);
3623        enable_auxclk(info);
3624        if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3625                irq_enable(info, CHB, IRQ_CTS);
3626                /* PVR[3] 1=AUTO CTS active */
3627                set_reg_bits(info, CHA + PVR, BIT3);
3628        } else
3629                clear_reg_bits(info, CHA + PVR, BIT3);
3630        irq_enable(info, CHA,
3631                          IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3632                          IRQ_ALLSENT + IRQ_TXFIFO);
3633        issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3634        wait_command_complete(info, CHA);
3635        read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3636}
3637
3638/* Set the HDLC idle mode for the transmitter.
3639 */
3640static void tx_set_idle(MGSLPC_INFO *info)
3641{
3642        /* Note: ESCC2 only supports flags and one idle modes */
3643        if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3644                set_reg_bits(info, CHA + CCR1, BIT3);
3645        else
3646                clear_reg_bits(info, CHA + CCR1, BIT3);
3647}
3648
3649/* get state of the V24 status (input) signals.
3650 */
3651static void get_signals(MGSLPC_INFO *info)
3652{
3653        unsigned char status = 0;
3654
3655        /* preserve DTR and RTS */
3656        info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3657
3658        if (read_reg(info, CHB + VSTR) & BIT7)
3659                info->serial_signals |= SerialSignal_DCD;
3660        if (read_reg(info, CHB + STAR) & BIT1)
3661                info->serial_signals |= SerialSignal_CTS;
3662
3663        status = read_reg(info, CHA + PVR);
3664        if (!(status & PVR_RI))
3665                info->serial_signals |= SerialSignal_RI;
3666        if (!(status & PVR_DSR))
3667                info->serial_signals |= SerialSignal_DSR;
3668}
3669
3670/* Set the state of DTR and RTS based on contents of
3671 * serial_signals member of device extension.
3672 */
3673static void set_signals(MGSLPC_INFO *info)
3674{
3675        unsigned char val;
3676
3677        val = read_reg(info, CHA + MODE);
3678        if (info->params.mode == MGSL_MODE_ASYNC) {
3679                if (info->serial_signals & SerialSignal_RTS)
3680                        val &= ~BIT6;
3681                else
3682                        val |= BIT6;
3683        } else {
3684                if (info->serial_signals & SerialSignal_RTS)
3685                        val |= BIT2;
3686                else
3687                        val &= ~BIT2;
3688        }
3689        write_reg(info, CHA + MODE, val);
3690
3691        if (info->serial_signals & SerialSignal_DTR)
3692                clear_reg_bits(info, CHA + PVR, PVR_DTR);
3693        else
3694                set_reg_bits(info, CHA + PVR, PVR_DTR);
3695}
3696
3697static void rx_reset_buffers(MGSLPC_INFO *info)
3698{
3699        RXBUF *buf;
3700        int i;
3701
3702        info->rx_put = 0;
3703        info->rx_get = 0;
3704        info->rx_frame_count = 0;
3705        for (i=0 ; i < info->rx_buf_count ; i++) {
3706                buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3707                buf->status = buf->count = 0;
3708        }
3709}
3710
3711/* Attempt to return a received HDLC frame
3712 * Only frames received without errors are returned.
3713 *
3714 * Returns true if frame returned, otherwise false
3715 */
3716static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3717{
3718        unsigned short status;
3719        RXBUF *buf;
3720        unsigned int framesize = 0;
3721        unsigned long flags;
3722        bool return_frame = false;
3723
3724        if (info->rx_frame_count == 0)
3725                return false;
3726
3727        buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3728
3729        status = buf->status;
3730
3731        /* 07  VFR  1=valid frame
3732         * 06  RDO  1=data overrun
3733         * 05  CRC  1=OK, 0=error
3734         * 04  RAB  1=frame aborted
3735         */
3736        if ((status & 0xf0) != 0xA0) {
3737                if (!(status & BIT7) || (status & BIT4))
3738                        info->icount.rxabort++;
3739                else if (status & BIT6)
3740                        info->icount.rxover++;
3741                else if (!(status & BIT5)) {
3742                        info->icount.rxcrc++;
3743                        if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3744                                return_frame = true;
3745                }
3746                framesize = 0;
3747#if SYNCLINK_GENERIC_HDLC
3748                {
3749                        info->netdev->stats.rx_errors++;
3750                        info->netdev->stats.rx_frame_errors++;
3751                }
3752#endif
3753        } else
3754                return_frame = true;
3755
3756        if (return_frame)
3757                framesize = buf->count;
3758
3759        if (debug_level >= DEBUG_LEVEL_BH)
3760                printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3761                        __FILE__,__LINE__,info->device_name,status,framesize);
3762
3763        if (debug_level >= DEBUG_LEVEL_DATA)
3764                trace_block(info, buf->data, framesize, 0);
3765
3766        if (framesize) {
3767                if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3768                      framesize+1 > info->max_frame_size) ||
3769                    framesize > info->max_frame_size)
3770                        info->icount.rxlong++;
3771                else {
3772                        if (status & BIT5)
3773                                info->icount.rxok++;
3774
3775                        if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3776                                *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3777                                ++framesize;
3778                        }
3779
3780#if SYNCLINK_GENERIC_HDLC
3781                        if (info->netcount)
3782                                hdlcdev_rx(info, buf->data, framesize);
3783                        else
3784#endif
3785                                ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3786                }
3787        }
3788
3789        spin_lock_irqsave(&info->lock,flags);
3790        buf->status = buf->count = 0;
3791        info->rx_frame_count--;
3792        info->rx_get++;
3793        if (info->rx_get >= info->rx_buf_count)
3794                info->rx_get = 0;
3795        spin_unlock_irqrestore(&info->lock,flags);
3796
3797        return true;
3798}
3799
3800static bool register_test(MGSLPC_INFO *info)
3801{
3802        static unsigned char patterns[] =
3803            { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3804        static unsigned int count = ARRAY_SIZE(patterns);
3805        unsigned int i;
3806        bool rc = true;
3807        unsigned long flags;
3808
3809        spin_lock_irqsave(&info->lock,flags);
3810        reset_device(info);
3811
3812        for (i = 0; i < count; i++) {
3813                write_reg(info, XAD1, patterns[i]);
3814                write_reg(info, XAD2, patterns[(i + 1) % count]);
3815                if ((read_reg(info, XAD1) != patterns[i]) ||
3816                    (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3817                        rc = false;
3818                        break;
3819                }
3820        }
3821
3822        spin_unlock_irqrestore(&info->lock,flags);
3823        return rc;
3824}
3825
3826static bool irq_test(MGSLPC_INFO *info)
3827{
3828        unsigned long end_time;
3829        unsigned long flags;
3830
3831        spin_lock_irqsave(&info->lock,flags);
3832        reset_device(info);
3833
3834        info->testing_irq = true;
3835        hdlc_mode(info);
3836
3837        info->irq_occurred = false;
3838
3839        /* init hdlc mode */
3840
3841        irq_enable(info, CHA, IRQ_TIMER);
3842        write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3843        issue_command(info, CHA, CMD_START_TIMER);
3844
3845        spin_unlock_irqrestore(&info->lock,flags);
3846
3847        end_time=100;
3848        while(end_time-- && !info->irq_occurred) {
3849                msleep_interruptible(10);
3850        }
3851
3852        info->testing_irq = false;
3853
3854        spin_lock_irqsave(&info->lock,flags);
3855        reset_device(info);
3856        spin_unlock_irqrestore(&info->lock,flags);
3857
3858        return info->irq_occurred;
3859}
3860
3861static int adapter_test(MGSLPC_INFO *info)
3862{
3863        if (!register_test(info)) {
3864                info->init_error = DiagStatus_AddressFailure;
3865                printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
3866                        __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
3867                return -ENODEV;
3868        }
3869
3870        if (!irq_test(info)) {
3871                info->init_error = DiagStatus_IrqFailure;
3872                printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3873                        __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
3874                return -ENODEV;
3875        }
3876
3877        if (debug_level >= DEBUG_LEVEL_INFO)
3878                printk("%s(%d):device %s passed diagnostics\n",
3879                        __FILE__,__LINE__,info->device_name);
3880        return 0;
3881}
3882
3883static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3884{
3885        int i;
3886        int linecount;
3887        if (xmit)
3888                printk("%s tx data:\n",info->device_name);
3889        else
3890                printk("%s rx data:\n",info->device_name);
3891
3892        while(count) {
3893                if (count > 16)
3894                        linecount = 16;
3895                else
3896                        linecount = count;
3897
3898                for(i=0;i<linecount;i++)
3899                        printk("%02X ",(unsigned char)data[i]);
3900                for(;i<17;i++)
3901                        printk("   ");
3902                for(i=0;i<linecount;i++) {
3903                        if (data[i]>=040 && data[i]<=0176)
3904                                printk("%c",data[i]);
3905                        else
3906                                printk(".");
3907                }
3908                printk("\n");
3909
3910                data  += linecount;
3911                count -= linecount;
3912        }
3913}
3914
3915/* HDLC frame time out
3916 * update stats and do tx completion processing
3917 */
3918static void tx_timeout(unsigned long context)
3919{
3920        MGSLPC_INFO *info = (MGSLPC_INFO*)context;
3921        unsigned long flags;
3922
3923        if ( debug_level >= DEBUG_LEVEL_INFO )
3924                printk( "%s(%d):tx_timeout(%s)\n",
3925                        __FILE__,__LINE__,info->device_name);
3926        if(info->tx_active &&
3927           info->params.mode == MGSL_MODE_HDLC) {
3928                info->icount.txtimeout++;
3929        }
3930        spin_lock_irqsave(&info->lock,flags);
3931        info->tx_active = false;
3932        info->tx_count = info->tx_put = info->tx_get = 0;
3933
3934        spin_unlock_irqrestore(&info->lock,flags);
3935
3936#if SYNCLINK_GENERIC_HDLC
3937        if (info->netcount)
3938                hdlcdev_tx_done(info);
3939        else
3940#endif
3941        {
3942                struct tty_struct *tty = tty_port_tty_get(&info->port);
3943                bh_transmit(info, tty);
3944                tty_kref_put(tty);
3945        }
3946}
3947
3948#if SYNCLINK_GENERIC_HDLC
3949
3950/**
3951 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3952 * set encoding and frame check sequence (FCS) options
3953 *
3954 * dev       pointer to network device structure
3955 * encoding  serial encoding setting
3956 * parity    FCS setting
3957 *
3958 * returns 0 if success, otherwise error code
3959 */
3960static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3961                          unsigned short parity)
3962{
3963        MGSLPC_INFO *info = dev_to_port(dev);
3964        struct tty_struct *tty;
3965        unsigned char  new_encoding;
3966        unsigned short new_crctype;
3967
3968        /* return error if TTY interface open */
3969        if (info->port.count)
3970                return -EBUSY;
3971
3972        switch (encoding)
3973        {
3974        case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
3975        case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3976        case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3977        case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3978        case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3979        default: return -EINVAL;
3980        }
3981
3982        switch (parity)
3983        {
3984        case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
3985        case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3986        case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3987        default: return -EINVAL;
3988        }
3989
3990        info->params.encoding = new_encoding;
3991        info->params.crc_type = new_crctype;
3992
3993        /* if network interface up, reprogram hardware */
3994        if (info->netcount) {
3995                tty = tty_port_tty_get(&info->port);
3996                mgslpc_program_hw(info, tty);
3997                tty_kref_put(tty);
3998        }
3999
4000        return 0;
4001}
4002
4003/**
4004 * called by generic HDLC layer to send frame
4005 *
4006 * skb  socket buffer containing HDLC frame
4007 * dev  pointer to network device structure
4008 */
4009static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
4010                                      struct net_device *dev)
4011{
4012        MGSLPC_INFO *info = dev_to_port(dev);
4013        unsigned long flags;
4014
4015        if (debug_level >= DEBUG_LEVEL_INFO)
4016                printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4017
4018        /* stop sending until this frame completes */
4019        netif_stop_queue(dev);
4020
4021        /* copy data to device buffers */
4022        skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
4023        info->tx_get = 0;
4024        info->tx_put = info->tx_count = skb->len;
4025
4026        /* update network statistics */
4027        dev->stats.tx_packets++;
4028        dev->stats.tx_bytes += skb->len;
4029
4030        /* done with socket buffer, so free it */
4031        dev_kfree_skb(skb);
4032
4033        /* save start time for transmit timeout detection */
4034        dev->trans_start = jiffies;
4035
4036        /* start hardware transmitter if necessary */
4037        spin_lock_irqsave(&info->lock,flags);
4038        if (!info->tx_active) {
4039                struct tty_struct *tty = tty_port_tty_get(&info->port);
4040                tx_start(info, tty);
4041                tty_kref_put(tty);
4042        }
4043        spin_unlock_irqrestore(&info->lock,flags);
4044
4045        return NETDEV_TX_OK;
4046}
4047
4048/**
4049 * called by network layer when interface enabled
4050 * claim resources and initialize hardware
4051 *
4052 * dev  pointer to network device structure
4053 *
4054 * returns 0 if success, otherwise error code
4055 */
4056static int hdlcdev_open(struct net_device *dev)
4057{
4058        MGSLPC_INFO *info = dev_to_port(dev);
4059        struct tty_struct *tty;
4060        int rc;
4061        unsigned long flags;
4062
4063        if (debug_level >= DEBUG_LEVEL_INFO)
4064                printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4065
4066        /* generic HDLC layer open processing */
4067        if ((rc = hdlc_open(dev)))
4068                return rc;
4069
4070        /* arbitrate between network and tty opens */
4071        spin_lock_irqsave(&info->netlock, flags);
4072        if (info->port.count != 0 || info->netcount != 0) {
4073                printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4074                spin_unlock_irqrestore(&info->netlock, flags);
4075                return -EBUSY;
4076        }
4077        info->netcount=1;
4078        spin_unlock_irqrestore(&info->netlock, flags);
4079
4080        tty = tty_port_tty_get(&info->port);
4081        /* claim resources and init adapter */
4082        if ((rc = startup(info, tty)) != 0) {
4083                tty_kref_put(tty);
4084                spin_lock_irqsave(&info->netlock, flags);
4085                info->netcount=0;
4086                spin_unlock_irqrestore(&info->netlock, flags);
4087                return rc;
4088        }
4089        /* assert DTR and RTS, apply hardware settings */
4090        info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4091        mgslpc_program_hw(info, tty);
4092        tty_kref_put(tty);
4093
4094        /* enable network layer transmit */
4095        dev->trans_start = jiffies;
4096        netif_start_queue(dev);
4097
4098        /* inform generic HDLC layer of current DCD status */
4099        spin_lock_irqsave(&info->lock, flags);
4100        get_signals(info);
4101        spin_unlock_irqrestore(&info->lock, flags);
4102        if (info->serial_signals & SerialSignal_DCD)
4103                netif_carrier_on(dev);
4104        else
4105                netif_carrier_off(dev);
4106        return 0;
4107}
4108
4109/**
4110 * called by network layer when interface is disabled
4111 * shutdown hardware and release resources
4112 *
4113 * dev  pointer to network device structure
4114 *
4115 * returns 0 if success, otherwise error code
4116 */
4117static int hdlcdev_close(struct net_device *dev)
4118{
4119        MGSLPC_INFO *info = dev_to_port(dev);
4120        struct tty_struct *tty = tty_port_tty_get(&info->port);
4121        unsigned long flags;
4122
4123        if (debug_level >= DEBUG_LEVEL_INFO)
4124                printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4125
4126        netif_stop_queue(dev);
4127
4128        /* shutdown adapter and release resources */
4129        shutdown(info, tty);
4130        tty_kref_put(tty);
4131        hdlc_close(dev);
4132
4133        spin_lock_irqsave(&info->netlock, flags);
4134        info->netcount=0;
4135        spin_unlock_irqrestore(&info->netlock, flags);
4136
4137        return 0;
4138}
4139
4140/**
4141 * called by network layer to process IOCTL call to network device
4142 *
4143 * dev  pointer to network device structure
4144 * ifr  pointer to network interface request structure
4145 * cmd  IOCTL command code
4146 *
4147 * returns 0 if success, otherwise error code
4148 */
4149static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4150{
4151        const size_t size = sizeof(sync_serial_settings);
4152        sync_serial_settings new_line;
4153        sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4154        MGSLPC_INFO *info = dev_to_port(dev);
4155        unsigned int flags;
4156
4157        if (debug_level >= DEBUG_LEVEL_INFO)
4158                printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4159
4160        /* return error if TTY interface open */
4161        if (info->port.count)
4162                return -EBUSY;
4163
4164        if (cmd != SIOCWANDEV)
4165                return hdlc_ioctl(dev, ifr, cmd);
4166
4167        switch(ifr->ifr_settings.type) {
4168        case IF_GET_IFACE: /* return current sync_serial_settings */
4169
4170                ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4171                if (ifr->ifr_settings.size < size) {
4172                        ifr->ifr_settings.size = size; /* data size wanted */
4173                        return -ENOBUFS;
4174                }
4175
4176                flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4177                                              HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4178                                              HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4179                                              HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4180
4181                switch (flags){
4182                case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4183                case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4184                case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4185                case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4186                default: new_line.clock_type = CLOCK_DEFAULT;
4187                }
4188
4189                new_line.clock_rate = info->params.clock_speed;
4190                new_line.loopback   = info->params.loopback ? 1:0;
4191
4192                if (copy_to_user(line, &new_line, size))
4193                        return -EFAULT;
4194                return 0;
4195
4196        case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4197
4198                if(!capable(CAP_NET_ADMIN))
4199                        return -EPERM;
4200                if (copy_from_user(&new_line, line, size))
4201                        return -EFAULT;
4202
4203                switch (new_line.clock_type)
4204                {
4205                case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4206                case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4207                case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4208                case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4209                case CLOCK_DEFAULT:  flags = info->params.flags &
4210                                             (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4211                                              HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4212                                              HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4213                                              HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4214                default: return -EINVAL;
4215                }
4216
4217                if (new_line.loopback != 0 && new_line.loopback != 1)
4218                        return -EINVAL;
4219
4220                info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4221                                        HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4222                                        HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4223                                        HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4224                info->params.flags |= flags;
4225
4226                info->params.loopback = new_line.loopback;
4227
4228                if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4229                        info->params.clock_speed = new_line.clock_rate;
4230                else
4231                        info->params.clock_speed = 0;
4232
4233                /* if network interface up, reprogram hardware */
4234                if (info->netcount) {
4235                        struct tty_struct *tty = tty_port_tty_get(&info->port);
4236                        mgslpc_program_hw(info, tty);
4237                        tty_kref_put(tty);
4238                }
4239                return 0;
4240
4241        default:
4242                return hdlc_ioctl(dev, ifr, cmd);
4243        }
4244}
4245
4246/**
4247 * called by network layer when transmit timeout is detected
4248 *
4249 * dev  pointer to network device structure
4250 */
4251static void hdlcdev_tx_timeout(struct net_device *dev)
4252{
4253        MGSLPC_INFO *info = dev_to_port(dev);
4254        unsigned long flags;
4255
4256        if (debug_level >= DEBUG_LEVEL_INFO)
4257                printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4258
4259        dev->stats.tx_errors++;
4260        dev->stats.tx_aborted_errors++;
4261
4262        spin_lock_irqsave(&info->lock,flags);
4263        tx_stop(info);
4264        spin_unlock_irqrestore(&info->lock,flags);
4265
4266        netif_wake_queue(dev);
4267}
4268
4269/**
4270 * called by device driver when transmit completes
4271 * reenable network layer transmit if stopped
4272 *
4273 * info  pointer to device instance information
4274 */
4275static void hdlcdev_tx_done(MGSLPC_INFO *info)
4276{
4277        if (netif_queue_stopped(info->netdev))
4278                netif_wake_queue(info->netdev);
4279}
4280
4281/**
4282 * called by device driver when frame received
4283 * pass frame to network layer
4284 *
4285 * info  pointer to device instance information
4286 * buf   pointer to buffer contianing frame data
4287 * size  count of data bytes in buf
4288 */
4289static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4290{
4291        struct sk_buff *skb = dev_alloc_skb(size);
4292        struct net_device *dev = info->netdev;
4293
4294        if (debug_level >= DEBUG_LEVEL_INFO)
4295                printk("hdlcdev_rx(%s)\n",dev->name);
4296
4297        if (skb == NULL) {
4298                printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4299                dev->stats.rx_dropped++;
4300                return;
4301        }
4302
4303        memcpy(skb_put(skb, size), buf, size);
4304
4305        skb->protocol = hdlc_type_trans(skb, dev);
4306
4307        dev->stats.rx_packets++;
4308        dev->stats.rx_bytes += size;
4309
4310        netif_rx(skb);
4311}
4312
4313static const struct net_device_ops hdlcdev_ops = {
4314        .ndo_open       = hdlcdev_open,
4315        .ndo_stop       = hdlcdev_close,
4316        .ndo_change_mtu = hdlc_change_mtu,
4317        .ndo_start_xmit = hdlc_start_xmit,
4318        .ndo_do_ioctl   = hdlcdev_ioctl,
4319        .ndo_tx_timeout = hdlcdev_tx_timeout,
4320};
4321
4322/**
4323 * called by device driver when adding device instance
4324 * do generic HDLC initialization
4325 *
4326 * info  pointer to device instance information
4327 *
4328 * returns 0 if success, otherwise error code
4329 */
4330static int hdlcdev_init(MGSLPC_INFO *info)
4331{
4332        int rc;
4333        struct net_device *dev;
4334        hdlc_device *hdlc;
4335
4336        /* allocate and initialize network and HDLC layer objects */
4337
4338        if (!(dev = alloc_hdlcdev(info))) {
4339                printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4340                return -ENOMEM;
4341        }
4342
4343        /* for network layer reporting purposes only */
4344        dev->base_addr = info->io_base;
4345        dev->irq       = info->irq_level;
4346
4347        /* network layer callbacks and settings */
4348        dev->netdev_ops     = &hdlcdev_ops;
4349        dev->watchdog_timeo = 10 * HZ;
4350        dev->tx_queue_len   = 50;
4351
4352        /* generic HDLC layer callbacks and settings */
4353        hdlc         = dev_to_hdlc(dev);
4354        hdlc->attach = hdlcdev_attach;
4355        hdlc->xmit   = hdlcdev_xmit;
4356
4357        /* register objects with HDLC layer */
4358        if ((rc = register_hdlc_device(dev))) {
4359                printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4360                free_netdev(dev);
4361                return rc;
4362        }
4363
4364        info->netdev = dev;
4365        return 0;
4366}
4367
4368/**
4369 * called by device driver when removing device instance
4370 * do generic HDLC cleanup
4371 *
4372 * info  pointer to device instance information
4373 */
4374static void hdlcdev_exit(MGSLPC_INFO *info)
4375{
4376        unregister_hdlc_device(info->netdev);
4377        free_netdev(info->netdev);
4378        info->netdev = NULL;
4379}
4380
4381#endif /* CONFIG_HDLC */
4382
4383