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29#include <linux/kernel.h>
30#include <linux/i2c.h>
31#include <linux/i2c-algo-bit.h>
32#include "drmP.h"
33#include "drm_edid.h"
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
49
50#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
51
52#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
53
54#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
55
56
57
58#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
59
60#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
61
62#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
63
64#define MAX_EDID_EXT_NUM 4
65
66#define LEVEL_DMT 0
67#define LEVEL_GTF 1
68#define LEVEL_CVT 2
69
70static struct edid_quirk {
71 char *vendor;
72 int product_id;
73 u32 quirks;
74} edid_quirk_list[] = {
75
76 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
77
78 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
79
80 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
81
82
83 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
84 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
85
86
87 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
88
89
90 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
91 EDID_QUIRK_DETAILED_IN_CM },
92
93
94 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
95 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
96
97
98 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
99
100
101 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
102
103
104 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
105
106 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
107 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
108};
109
110
111
112static const u8 edid_header[] = {
113 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
114};
115
116
117
118
119
120
121
122
123
124static bool edid_is_valid(struct edid *edid)
125{
126 int i;
127 u8 csum = 0;
128 u8 *raw_edid = (u8 *)edid;
129
130 if (memcmp(edid->header, edid_header, sizeof(edid_header)))
131 goto bad;
132 if (edid->version != 1) {
133 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
134 goto bad;
135 }
136 if (edid->revision > 4)
137 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
138
139 for (i = 0; i < EDID_LENGTH; i++)
140 csum += raw_edid[i];
141 if (csum) {
142 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
143 goto bad;
144 }
145
146 return 1;
147
148bad:
149 if (raw_edid) {
150 DRM_ERROR("Raw EDID:\n");
151 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
152 printk("\n");
153 }
154 return 0;
155}
156
157
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159
160
161
162
163
164static bool edid_vendor(struct edid *edid, char *vendor)
165{
166 char edid_vendor[3];
167
168 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
169 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
170 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
171 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
172
173 return !strncmp(edid_vendor, vendor, 3);
174}
175
176
177
178
179
180
181
182static u32 edid_get_quirks(struct edid *edid)
183{
184 struct edid_quirk *quirk;
185 int i;
186
187 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
188 quirk = &edid_quirk_list[i];
189
190 if (edid_vendor(edid, quirk->vendor) &&
191 (EDID_PRODUCT_ID(edid) == quirk->product_id))
192 return quirk->quirks;
193 }
194
195 return 0;
196}
197
198#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
199#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
200
201
202
203
204
205
206
207
208
209
210static void edid_fixup_preferred(struct drm_connector *connector,
211 u32 quirks)
212{
213 struct drm_display_mode *t, *cur_mode, *preferred_mode;
214 int target_refresh = 0;
215
216 if (list_empty(&connector->probed_modes))
217 return;
218
219 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
220 target_refresh = 60;
221 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
222 target_refresh = 75;
223
224 preferred_mode = list_first_entry(&connector->probed_modes,
225 struct drm_display_mode, head);
226
227 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
228 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
229
230 if (cur_mode == preferred_mode)
231 continue;
232
233
234 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
235 preferred_mode = cur_mode;
236
237
238 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
239 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
240 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
241 preferred_mode = cur_mode;
242 }
243 }
244
245 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
246}
247
248
249
250
251
252
253static struct drm_display_mode drm_dmt_modes[] = {
254
255 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
256 736, 832, 0, 350, 382, 385, 445, 0,
257 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
258
259 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
260 736, 832, 0, 400, 401, 404, 445, 0,
261 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
262
263 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
264 828, 936, 0, 400, 401, 404, 446, 0,
265 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
266
267 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
268 752, 800, 0, 480, 489, 492, 525, 0,
269 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
270
271 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
272 704, 832, 0, 480, 489, 492, 520, 0,
273 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
274
275 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
276 720, 840, 0, 480, 481, 484, 500, 0,
277 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
278
279 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
280 752, 832, 0, 480, 481, 484, 509, 0,
281 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
282
283 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
284 896, 1024, 0, 600, 601, 603, 625, 0,
285 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
286
287 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
288 968, 1056, 0, 600, 601, 605, 628, 0,
289 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
290
291 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
292 976, 1040, 0, 600, 637, 643, 666, 0,
293 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
294
295 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
296 896, 1056, 0, 600, 601, 604, 625, 0,
297 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
298
299 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
300 896, 1048, 0, 600, 601, 604, 631, 0,
301 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
302
303 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
304 976, 1088, 0, 480, 486, 494, 517, 0,
305 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
306
307 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
308 1208, 1264, 0, 768, 768, 772, 817, 0,
309 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
310 DRM_MODE_FLAG_INTERLACE) },
311
312 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
313 1184, 1344, 0, 768, 771, 777, 806, 0,
314 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
315
316 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
317 1184, 1328, 0, 768, 771, 777, 806, 0,
318 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
319
320 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
321 1136, 1312, 0, 768, 769, 772, 800, 0,
322 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
323
324 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
325 1072, 1376, 0, 768, 769, 772, 808, 0,
326 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
327
328 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
329 1344, 1600, 0, 864, 865, 868, 900, 0,
330 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
331
332 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
333 1472, 1664, 0, 768, 771, 778, 798, 0,
334 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
335
336 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
337 1488, 1696, 0, 768, 771, 778, 805, 0,
338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
339
340 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
341 1496, 1712, 0, 768, 771, 778, 809, 0,
342 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
343
344 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
345 1480, 1680, 0, 800, 803, 809, 831, 0,
346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
347
348 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
349 1488, 1696, 0, 800, 803, 809, 838, 0,
350 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
351
352 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
353 1496, 1712, 0, 800, 803, 809, 843, 0,
354 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
355
356 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
357 1488, 1800, 0, 960, 961, 964, 1000, 0,
358 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
359
360 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
361 1504, 1728, 0, 960, 961, 964, 1011, 0,
362 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
363
364 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
365 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
366 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
367
368 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
369 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
370 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
371
372 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
373 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
374 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
375
376 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
377 1536, 1792, 0, 768, 771, 777, 795, 0,
378 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
379
380 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
381 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
382 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
383
384 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
385 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
386 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
387
388 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
389 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
390 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
391
392 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
393 1672, 1904, 0, 900, 903, 909, 934, 0,
394 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
395
396 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
397 1688, 1936, 0, 900, 903, 909, 942, 0,
398 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
399
400 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
401 1696, 1952, 0, 900, 903, 909, 948, 0,
402 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
403
404 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
405 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
406 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
407
408 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
409 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
410 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
411
412 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
413 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
414 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
415
416 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
417 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
418 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
419
420 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
421 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
422 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
423
424 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
425 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
426 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
427
428 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
429 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
430 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
431
432 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
433 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
434 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
435
436 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
437 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
438 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
439
440 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
441 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
442 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
443
444 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
445 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
447
448 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
449 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
451
452 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
453 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
455
456 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
457 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
458 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
459
460 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
461 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
462 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
463
464 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
465 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
466 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
467
468 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
469 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
471
472 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
473 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
474 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
475
476 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
477 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
478 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
479
480 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
481 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
483};
484
485static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
486 int hsize, int vsize, int fresh)
487{
488 int i, count;
489 struct drm_display_mode *ptr, *mode;
490
491 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
492 mode = NULL;
493 for (i = 0; i < count; i++) {
494 ptr = &drm_dmt_modes[i];
495 if (hsize == ptr->hdisplay &&
496 vsize == ptr->vdisplay &&
497 fresh == drm_mode_vrefresh(ptr)) {
498
499 mode = drm_mode_duplicate(dev, ptr);
500 break;
501 }
502 }
503 return mode;
504}
505
506
507
508
509
510static int
511bad_std_timing(u8 a, u8 b)
512{
513 return (a == 0x00 && b == 0x00) ||
514 (a == 0x01 && b == 0x01) ||
515 (a == 0x20 && b == 0x20);
516}
517
518
519
520
521
522
523
524
525
526
527
528
529struct drm_display_mode *drm_mode_std(struct drm_device *dev,
530 struct std_timing *t,
531 int revision,
532 int timing_level)
533{
534 struct drm_display_mode *mode;
535 int hsize, vsize;
536 int vrefresh_rate;
537 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
538 >> EDID_TIMING_ASPECT_SHIFT;
539 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
540 >> EDID_TIMING_VFREQ_SHIFT;
541
542 if (bad_std_timing(t->hsize, t->vfreq_aspect))
543 return NULL;
544
545
546 hsize = t->hsize * 8 + 248;
547
548 vrefresh_rate = vfreq + 60;
549
550 if (aspect_ratio == 0) {
551 if (revision < 3)
552 vsize = hsize;
553 else
554 vsize = (hsize * 10) / 16;
555 } else if (aspect_ratio == 1)
556 vsize = (hsize * 3) / 4;
557 else if (aspect_ratio == 2)
558 vsize = (hsize * 4) / 5;
559 else
560 vsize = (hsize * 9) / 16;
561
562 if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
563 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
564 false);
565 mode->hdisplay = 1366;
566 mode->vsync_start = mode->vsync_start - 1;
567 mode->vsync_end = mode->vsync_end - 1;
568 return mode;
569 }
570 mode = NULL;
571
572 mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
573 if (mode)
574 return mode;
575
576 switch (timing_level) {
577 case LEVEL_DMT:
578 break;
579 case LEVEL_GTF:
580 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
581 break;
582 case LEVEL_CVT:
583 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
584 false);
585 break;
586 }
587 return mode;
588}
589
590
591
592
593
594
595
596
597
598
599
600static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
601 struct edid *edid,
602 struct detailed_timing *timing,
603 u32 quirks)
604{
605 struct drm_display_mode *mode;
606 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
607 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
608 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
609 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
610 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
611 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
612 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
613 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
614 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
615
616
617 if (hactive < 64 || vactive < 64)
618 return NULL;
619
620 if (pt->misc & DRM_EDID_PT_STEREO) {
621 printk(KERN_WARNING "stereo mode not supported\n");
622 return NULL;
623 }
624 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
625 printk(KERN_WARNING "integrated sync not supported\n");
626 return NULL;
627 }
628
629
630 if (!hsync_pulse_width || !vsync_pulse_width) {
631 DRM_DEBUG_KMS("Incorrect Detailed timing. "
632 "Wrong Hsync/Vsync pulse width\n");
633 return NULL;
634 }
635 mode = drm_mode_create(dev);
636 if (!mode)
637 return NULL;
638
639 mode->type = DRM_MODE_TYPE_DRIVER;
640
641 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
642 timing->pixel_clock = cpu_to_le16(1088);
643
644 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
645
646 mode->hdisplay = hactive;
647 mode->hsync_start = mode->hdisplay + hsync_offset;
648 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
649 mode->htotal = mode->hdisplay + hblank;
650
651 mode->vdisplay = vactive;
652 mode->vsync_start = mode->vdisplay + vsync_offset;
653 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
654 mode->vtotal = mode->vdisplay + vblank;
655
656
657 if (mode->hsync_end > mode->htotal ||
658 mode->vsync_end > mode->vtotal) {
659 drm_mode_destroy(dev, mode);
660 DRM_DEBUG_KMS("Incorrect detailed timing. "
661 "Sync is beyond the blank.\n");
662 return NULL;
663 }
664
665
666 if (mode->hsync_end > mode->htotal)
667 mode->htotal = mode->hsync_end + 1;
668 if (mode->vsync_end > mode->vtotal)
669 mode->vtotal = mode->vsync_end + 1;
670
671 drm_mode_set_name(mode);
672
673 if (pt->misc & DRM_EDID_PT_INTERLACED)
674 mode->flags |= DRM_MODE_FLAG_INTERLACE;
675
676 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
677 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
678 }
679
680 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
681 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
682 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
683 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
684
685 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
686 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
687
688 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
689 mode->width_mm *= 10;
690 mode->height_mm *= 10;
691 }
692
693 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
694 mode->width_mm = edid->width_cm * 10;
695 mode->height_mm = edid->height_cm * 10;
696 }
697
698 return mode;
699}
700
701
702
703
704static struct drm_display_mode edid_est_modes[] = {
705 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
706 968, 1056, 0, 600, 601, 605, 628, 0,
707 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
708 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
709 896, 1024, 0, 600, 601, 603, 625, 0,
710 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
711 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
712 720, 840, 0, 480, 481, 484, 500, 0,
713 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
714 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
715 704, 832, 0, 480, 489, 491, 520, 0,
716 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
717 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
718 768, 864, 0, 480, 483, 486, 525, 0,
719 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
720 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
721 752, 800, 0, 480, 490, 492, 525, 0,
722 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
723 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
724 846, 900, 0, 400, 421, 423, 449, 0,
725 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
726 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
727 846, 900, 0, 400, 412, 414, 449, 0,
728 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
729 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
730 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
731 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
732 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
733 1136, 1312, 0, 768, 769, 772, 800, 0,
734 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
735 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
736 1184, 1328, 0, 768, 771, 777, 806, 0,
737 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
738 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
739 1184, 1344, 0, 768, 771, 777, 806, 0,
740 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
741 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
742 1208, 1264, 0, 768, 768, 776, 817, 0,
743 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) },
744 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
745 928, 1152, 0, 624, 625, 628, 667, 0,
746 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
747 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
748 896, 1056, 0, 600, 601, 604, 625, 0,
749 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
750 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
751 976, 1040, 0, 600, 637, 643, 666, 0,
752 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
753 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
754 1344, 1600, 0, 864, 865, 868, 900, 0,
755 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
756};
757
758#define EDID_EST_TIMINGS 16
759#define EDID_STD_TIMINGS 8
760#define EDID_DETAILED_TIMINGS 4
761
762
763
764
765
766
767
768
769static int add_established_modes(struct drm_connector *connector, struct edid *edid)
770{
771 struct drm_device *dev = connector->dev;
772 unsigned long est_bits = edid->established_timings.t1 |
773 (edid->established_timings.t2 << 8) |
774 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
775 int i, modes = 0;
776
777 for (i = 0; i <= EDID_EST_TIMINGS; i++)
778 if (est_bits & (1<<i)) {
779 struct drm_display_mode *newmode;
780 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
781 if (newmode) {
782 drm_mode_probed_add(connector, newmode);
783 modes++;
784 }
785 }
786
787 return modes;
788}
789
790
791
792
793static int standard_timing_level(struct edid *edid)
794{
795 if (edid->revision >= 2) {
796 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
797 return LEVEL_CVT;
798 return LEVEL_GTF;
799 }
800 return LEVEL_DMT;
801}
802
803
804
805
806
807
808
809
810static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
811{
812 struct drm_device *dev = connector->dev;
813 int i, modes = 0;
814 int timing_level;
815
816 timing_level = standard_timing_level(edid);
817
818 for (i = 0; i < EDID_STD_TIMINGS; i++) {
819 struct std_timing *t = &edid->standard_timings[i];
820 struct drm_display_mode *newmode;
821
822
823 if (t->hsize == 1 && t->vfreq_aspect == 1)
824 continue;
825
826 newmode = drm_mode_std(dev, &edid->standard_timings[i],
827 edid->revision, timing_level);
828 if (newmode) {
829 drm_mode_probed_add(connector, newmode);
830 modes++;
831 }
832 }
833
834 return modes;
835}
836
837
838
839
840
841
842
843
844
845
846static int add_detailed_info(struct drm_connector *connector,
847 struct edid *edid, u32 quirks)
848{
849 struct drm_device *dev = connector->dev;
850 int i, j, modes = 0;
851 int timing_level;
852
853 timing_level = standard_timing_level(edid);
854
855 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
856 struct detailed_timing *timing = &edid->detailed_timings[i];
857 struct detailed_non_pixel *data = &timing->data.other_data;
858 struct drm_display_mode *newmode;
859
860
861 if (edid->version == 1 && edid->revision >= 1 &&
862 !timing->pixel_clock) {
863
864 switch (data->type) {
865 case EDID_DETAIL_MONITOR_SERIAL:
866 break;
867 case EDID_DETAIL_MONITOR_STRING:
868 break;
869 case EDID_DETAIL_MONITOR_RANGE:
870
871 break;
872 case EDID_DETAIL_MONITOR_NAME:
873 break;
874 case EDID_DETAIL_MONITOR_CPDATA:
875 break;
876 case EDID_DETAIL_STD_MODES:
877 for (j = 0; j < 6; i++) {
878 struct std_timing *std;
879 struct drm_display_mode *newmode;
880
881 std = &data->data.timings[j];
882 newmode = drm_mode_std(dev, std,
883 edid->revision,
884 timing_level);
885 if (newmode) {
886 drm_mode_probed_add(connector, newmode);
887 modes++;
888 }
889 }
890 break;
891 default:
892 break;
893 }
894 } else {
895 newmode = drm_mode_detailed(dev, edid, timing, quirks);
896 if (!newmode)
897 continue;
898
899
900 if (i == 0 && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING))
901 newmode->type |= DRM_MODE_TYPE_PREFERRED;
902 drm_mode_probed_add(connector, newmode);
903
904 modes++;
905 }
906 }
907
908 return modes;
909}
910
911
912
913
914
915
916
917
918
919
920static int add_detailed_info_eedid(struct drm_connector *connector,
921 struct edid *edid, u32 quirks)
922{
923 struct drm_device *dev = connector->dev;
924 int i, j, modes = 0;
925 char *edid_ext = NULL;
926 struct detailed_timing *timing;
927 struct detailed_non_pixel *data;
928 struct drm_display_mode *newmode;
929 int edid_ext_num;
930 int start_offset, end_offset;
931 int timing_level;
932
933 if (edid->version == 1 && edid->revision < 3) {
934
935
936
937 return 0;
938 }
939 if (!edid->extensions) {
940
941
942
943 return 0;
944 }
945
946
947 edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
948 MAX_EDID_EXT_NUM : edid->extensions;
949
950
951 for (i = 0; i < edid_ext_num; i++) {
952 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
953
954 if (edid_ext[0] == 0x02)
955 break;
956 }
957
958 if (i == edid_ext_num) {
959
960 return 0;
961 }
962
963
964 start_offset = edid_ext[2];
965 if (start_offset == 0) {
966
967
968
969
970 return 0;
971 }
972
973 timing_level = standard_timing_level(edid);
974 end_offset = EDID_LENGTH;
975 end_offset -= sizeof(struct detailed_timing);
976 for (i = start_offset; i < end_offset;
977 i += sizeof(struct detailed_timing)) {
978 timing = (struct detailed_timing *)(edid_ext + i);
979 data = &timing->data.other_data;
980
981 if (timing->pixel_clock) {
982 newmode = drm_mode_detailed(dev, edid, timing, quirks);
983 if (!newmode)
984 continue;
985
986 drm_mode_probed_add(connector, newmode);
987
988 modes++;
989 continue;
990 }
991
992
993 switch (data->type) {
994 case EDID_DETAIL_MONITOR_SERIAL:
995 break;
996 case EDID_DETAIL_MONITOR_STRING:
997 break;
998 case EDID_DETAIL_MONITOR_RANGE:
999
1000 break;
1001 case EDID_DETAIL_MONITOR_NAME:
1002 break;
1003 case EDID_DETAIL_MONITOR_CPDATA:
1004 break;
1005 case EDID_DETAIL_STD_MODES:
1006
1007 for (j = 0; j < 5; i++) {
1008 struct std_timing *std;
1009 struct drm_display_mode *newmode;
1010
1011 std = &data->data.timings[j];
1012 newmode = drm_mode_std(dev, std,
1013 edid->revision,
1014 timing_level);
1015 if (newmode) {
1016 drm_mode_probed_add(connector, newmode);
1017 modes++;
1018 }
1019 }
1020 break;
1021 default:
1022 break;
1023 }
1024 }
1025
1026 return modes;
1027}
1028
1029#define DDC_ADDR 0x50
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
1041 unsigned char *buf, int len)
1042{
1043 unsigned char start = 0x0;
1044 struct i2c_msg msgs[] = {
1045 {
1046 .addr = DDC_ADDR,
1047 .flags = 0,
1048 .len = 1,
1049 .buf = &start,
1050 }, {
1051 .addr = DDC_ADDR,
1052 .flags = I2C_M_RD,
1053 .len = len,
1054 .buf = buf,
1055 }
1056 };
1057
1058 if (i2c_transfer(adapter, msgs, 2) == 2)
1059 return 0;
1060
1061 return -1;
1062}
1063EXPORT_SYMBOL(drm_do_probe_ddc_edid);
1064
1065static int drm_ddc_read_edid(struct drm_connector *connector,
1066 struct i2c_adapter *adapter,
1067 char *buf, int len)
1068{
1069 int ret;
1070
1071 ret = drm_do_probe_ddc_edid(adapter, buf, len);
1072 if (ret != 0) {
1073 goto end;
1074 }
1075 if (!edid_is_valid((struct edid *)buf)) {
1076 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1077 drm_get_connector_name(connector));
1078 ret = -1;
1079 }
1080end:
1081 return ret;
1082}
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093struct edid *drm_get_edid(struct drm_connector *connector,
1094 struct i2c_adapter *adapter)
1095{
1096 int ret;
1097 struct edid *edid;
1098
1099 edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1),
1100 GFP_KERNEL);
1101 if (edid == NULL) {
1102 dev_warn(&connector->dev->pdev->dev,
1103 "Failed to allocate EDID\n");
1104 goto end;
1105 }
1106
1107
1108 ret = drm_ddc_read_edid(connector, adapter,
1109 (unsigned char *)edid, EDID_LENGTH);
1110 if (ret != 0)
1111 goto clean_up;
1112
1113
1114 if (edid->extensions != 0) {
1115 int edid_ext_num = edid->extensions;
1116
1117 if (edid_ext_num > MAX_EDID_EXT_NUM) {
1118 dev_warn(&connector->dev->pdev->dev,
1119 "The number of extension(%d) is "
1120 "over max (%d), actually read number (%d)\n",
1121 edid_ext_num, MAX_EDID_EXT_NUM,
1122 MAX_EDID_EXT_NUM);
1123
1124 edid_ext_num = MAX_EDID_EXT_NUM;
1125 }
1126
1127 ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
1128 EDID_LENGTH * (edid_ext_num + 1));
1129 if (ret != 0)
1130 goto clean_up;
1131
1132 }
1133
1134 connector->display_info.raw_edid = (char *)edid;
1135 goto end;
1136
1137clean_up:
1138 kfree(edid);
1139 edid = NULL;
1140end:
1141 return edid;
1142
1143}
1144EXPORT_SYMBOL(drm_get_edid);
1145
1146#define HDMI_IDENTIFIER 0x000C03
1147#define VENDOR_BLOCK 0x03
1148
1149
1150
1151
1152
1153
1154
1155bool drm_detect_hdmi_monitor(struct edid *edid)
1156{
1157 char *edid_ext = NULL;
1158 int i, hdmi_id, edid_ext_num;
1159 int start_offset, end_offset;
1160 bool is_hdmi = false;
1161
1162
1163 if (edid == NULL || edid->extensions == 0)
1164 goto end;
1165
1166
1167 edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
1168 MAX_EDID_EXT_NUM : edid->extensions;
1169
1170
1171 for (i = 0; i < edid_ext_num; i++) {
1172 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1173
1174 if (edid_ext[0] == 0x02)
1175 break;
1176 }
1177
1178 if (i == edid_ext_num)
1179 goto end;
1180
1181
1182 start_offset = 4;
1183 end_offset = edid_ext[2];
1184
1185
1186
1187
1188
1189 for (i = start_offset; i < end_offset;
1190
1191 i += ((edid_ext[i] & 0x1f) + 1)) {
1192
1193 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1194 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1195 edid_ext[i + 3] << 16;
1196
1197 if (hdmi_id == HDMI_IDENTIFIER)
1198 is_hdmi = true;
1199 break;
1200 }
1201 }
1202
1203end:
1204 return is_hdmi;
1205}
1206EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1218{
1219 int num_modes = 0;
1220 u32 quirks;
1221
1222 if (edid == NULL) {
1223 return 0;
1224 }
1225 if (!edid_is_valid(edid)) {
1226 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1227 drm_get_connector_name(connector));
1228 return 0;
1229 }
1230
1231 quirks = edid_get_quirks(edid);
1232
1233 num_modes += add_established_modes(connector, edid);
1234 num_modes += add_standard_modes(connector, edid);
1235 num_modes += add_detailed_info(connector, edid, quirks);
1236 num_modes += add_detailed_info_eedid(connector, edid, quirks);
1237
1238 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1239 edid_fixup_preferred(connector, quirks);
1240
1241 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
1242 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
1243 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
1244 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
1245 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
1246 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
1247 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
1248 connector->display_info.width_mm = edid->width_cm * 10;
1249 connector->display_info.height_mm = edid->height_cm * 10;
1250 connector->display_info.gamma = edid->gamma;
1251 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
1252 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
1253 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
1254 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
1255 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
1256 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
1257 connector->display_info.gamma = edid->gamma;
1258
1259 return num_modes;
1260}
1261EXPORT_SYMBOL(drm_add_edid_modes);
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274int drm_add_modes_noedid(struct drm_connector *connector,
1275 int hdisplay, int vdisplay)
1276{
1277 int i, count, num_modes = 0;
1278 struct drm_display_mode *mode, *ptr;
1279 struct drm_device *dev = connector->dev;
1280
1281 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1282 if (hdisplay < 0)
1283 hdisplay = 0;
1284 if (vdisplay < 0)
1285 vdisplay = 0;
1286
1287 for (i = 0; i < count; i++) {
1288 ptr = &drm_dmt_modes[i];
1289 if (hdisplay && vdisplay) {
1290
1291
1292
1293
1294
1295 if (ptr->hdisplay > hdisplay ||
1296 ptr->vdisplay > vdisplay)
1297 continue;
1298 }
1299 mode = drm_mode_duplicate(dev, ptr);
1300 if (mode) {
1301 drm_mode_probed_add(connector, mode);
1302 num_modes++;
1303 }
1304 }
1305 return num_modes;
1306}
1307EXPORT_SYMBOL(drm_add_modes_noedid);
1308