1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32#ifndef __IWCH_PROVIDER_H__
33#define __IWCH_PROVIDER_H__
34
35#include <linux/list.h>
36#include <linux/spinlock.h>
37#include <rdma/ib_verbs.h>
38#include <asm/types.h>
39#include "t3cdev.h"
40#include "iwch.h"
41#include "cxio_wr.h"
42#include "cxio_hal.h"
43
44struct iwch_pd {
45 struct ib_pd ibpd;
46 u32 pdid;
47 struct iwch_dev *rhp;
48};
49
50static inline struct iwch_pd *to_iwch_pd(struct ib_pd *ibpd)
51{
52 return container_of(ibpd, struct iwch_pd, ibpd);
53}
54
55struct tpt_attributes {
56 u32 stag;
57 u32 state:1;
58 u32 type:2;
59 u32 rsvd:1;
60 enum tpt_mem_perm perms;
61 u32 remote_invaliate_disable:1;
62 u32 zbva:1;
63 u32 mw_bind_enable:1;
64 u32 page_size:5;
65
66 u32 pdid;
67 u32 qpid;
68 u32 pbl_addr;
69 u32 len;
70 u64 va_fbo;
71 u32 pbl_size;
72};
73
74struct iwch_mr {
75 struct ib_mr ibmr;
76 struct ib_umem *umem;
77 struct iwch_dev *rhp;
78 u64 kva;
79 struct tpt_attributes attr;
80};
81
82typedef struct iwch_mw iwch_mw_handle;
83
84static inline struct iwch_mr *to_iwch_mr(struct ib_mr *ibmr)
85{
86 return container_of(ibmr, struct iwch_mr, ibmr);
87}
88
89struct iwch_mw {
90 struct ib_mw ibmw;
91 struct iwch_dev *rhp;
92 u64 kva;
93 struct tpt_attributes attr;
94};
95
96static inline struct iwch_mw *to_iwch_mw(struct ib_mw *ibmw)
97{
98 return container_of(ibmw, struct iwch_mw, ibmw);
99}
100
101struct iwch_cq {
102 struct ib_cq ibcq;
103 struct iwch_dev *rhp;
104 struct t3_cq cq;
105 spinlock_t lock;
106 atomic_t refcnt;
107 wait_queue_head_t wait;
108 u32 __user *user_rptr_addr;
109};
110
111static inline struct iwch_cq *to_iwch_cq(struct ib_cq *ibcq)
112{
113 return container_of(ibcq, struct iwch_cq, ibcq);
114}
115
116enum IWCH_QP_FLAGS {
117 QP_QUIESCED = 0x01
118};
119
120struct iwch_mpa_attributes {
121 u8 initiator;
122 u8 recv_marker_enabled;
123 u8 xmit_marker_enabled;
124 u8 crc_enabled;
125 u8 version;
126};
127
128struct iwch_qp_attributes {
129 u32 scq;
130 u32 rcq;
131 u32 sq_num_entries;
132 u32 rq_num_entries;
133 u32 sq_max_sges;
134 u32 sq_max_sges_rdma_write;
135 u32 rq_max_sges;
136 u32 state;
137 u8 enable_rdma_read;
138 u8 enable_rdma_write;
139 u8 enable_bind;
140 u8 enable_mmid0_fastreg;
141
142
143
144
145 u32 max_ord;
146 u32 max_ird;
147 u32 pd;
148 u32 next_state;
149 char terminate_buffer[52];
150 u32 terminate_msg_len;
151 u8 is_terminate_local;
152 struct iwch_mpa_attributes mpa_attr;
153 struct iwch_ep *llp_stream_handle;
154 char *stream_msg_buf;
155 u32 stream_msg_buf_len;
156};
157
158struct iwch_qp {
159 struct ib_qp ibqp;
160 struct iwch_dev *rhp;
161 struct iwch_ep *ep;
162 struct iwch_qp_attributes attr;
163 struct t3_wq wq;
164 spinlock_t lock;
165 atomic_t refcnt;
166 wait_queue_head_t wait;
167 enum IWCH_QP_FLAGS flags;
168 struct timer_list timer;
169};
170
171static inline int qp_quiesced(struct iwch_qp *qhp)
172{
173 return qhp->flags & QP_QUIESCED;
174}
175
176static inline struct iwch_qp *to_iwch_qp(struct ib_qp *ibqp)
177{
178 return container_of(ibqp, struct iwch_qp, ibqp);
179}
180
181void iwch_qp_add_ref(struct ib_qp *qp);
182void iwch_qp_rem_ref(struct ib_qp *qp);
183
184struct iwch_ucontext {
185 struct ib_ucontext ibucontext;
186 struct cxio_ucontext uctx;
187 u32 key;
188 spinlock_t mmap_lock;
189 struct list_head mmaps;
190};
191
192static inline struct iwch_ucontext *to_iwch_ucontext(struct ib_ucontext *c)
193{
194 return container_of(c, struct iwch_ucontext, ibucontext);
195}
196
197struct iwch_mm_entry {
198 struct list_head entry;
199 u64 addr;
200 u32 key;
201 unsigned len;
202};
203
204static inline struct iwch_mm_entry *remove_mmap(struct iwch_ucontext *ucontext,
205 u32 key, unsigned len)
206{
207 struct list_head *pos, *nxt;
208 struct iwch_mm_entry *mm;
209
210 spin_lock(&ucontext->mmap_lock);
211 list_for_each_safe(pos, nxt, &ucontext->mmaps) {
212
213 mm = list_entry(pos, struct iwch_mm_entry, entry);
214 if (mm->key == key && mm->len == len) {
215 list_del_init(&mm->entry);
216 spin_unlock(&ucontext->mmap_lock);
217 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,
218 key, (unsigned long long) mm->addr, mm->len);
219 return mm;
220 }
221 }
222 spin_unlock(&ucontext->mmap_lock);
223 return NULL;
224}
225
226static inline void insert_mmap(struct iwch_ucontext *ucontext,
227 struct iwch_mm_entry *mm)
228{
229 spin_lock(&ucontext->mmap_lock);
230 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,
231 mm->key, (unsigned long long) mm->addr, mm->len);
232 list_add_tail(&mm->entry, &ucontext->mmaps);
233 spin_unlock(&ucontext->mmap_lock);
234}
235
236enum iwch_qp_attr_mask {
237 IWCH_QP_ATTR_NEXT_STATE = 1 << 0,
238 IWCH_QP_ATTR_ENABLE_RDMA_READ = 1 << 7,
239 IWCH_QP_ATTR_ENABLE_RDMA_WRITE = 1 << 8,
240 IWCH_QP_ATTR_ENABLE_RDMA_BIND = 1 << 9,
241 IWCH_QP_ATTR_MAX_ORD = 1 << 11,
242 IWCH_QP_ATTR_MAX_IRD = 1 << 12,
243 IWCH_QP_ATTR_LLP_STREAM_HANDLE = 1 << 22,
244 IWCH_QP_ATTR_STREAM_MSG_BUFFER = 1 << 23,
245 IWCH_QP_ATTR_MPA_ATTR = 1 << 24,
246 IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE = 1 << 25,
247 IWCH_QP_ATTR_VALID_MODIFY = (IWCH_QP_ATTR_ENABLE_RDMA_READ |
248 IWCH_QP_ATTR_ENABLE_RDMA_WRITE |
249 IWCH_QP_ATTR_MAX_ORD |
250 IWCH_QP_ATTR_MAX_IRD |
251 IWCH_QP_ATTR_LLP_STREAM_HANDLE |
252 IWCH_QP_ATTR_STREAM_MSG_BUFFER |
253 IWCH_QP_ATTR_MPA_ATTR |
254 IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE)
255};
256
257int iwch_modify_qp(struct iwch_dev *rhp,
258 struct iwch_qp *qhp,
259 enum iwch_qp_attr_mask mask,
260 struct iwch_qp_attributes *attrs,
261 int internal);
262
263enum iwch_qp_state {
264 IWCH_QP_STATE_IDLE,
265 IWCH_QP_STATE_RTS,
266 IWCH_QP_STATE_ERROR,
267 IWCH_QP_STATE_TERMINATE,
268 IWCH_QP_STATE_CLOSING,
269 IWCH_QP_STATE_TOT
270};
271
272static inline int iwch_convert_state(enum ib_qp_state ib_state)
273{
274 switch (ib_state) {
275 case IB_QPS_RESET:
276 case IB_QPS_INIT:
277 return IWCH_QP_STATE_IDLE;
278 case IB_QPS_RTS:
279 return IWCH_QP_STATE_RTS;
280 case IB_QPS_SQD:
281 return IWCH_QP_STATE_CLOSING;
282 case IB_QPS_SQE:
283 return IWCH_QP_STATE_TERMINATE;
284 case IB_QPS_ERR:
285 return IWCH_QP_STATE_ERROR;
286 default:
287 return -1;
288 }
289}
290
291static inline u32 iwch_ib_to_tpt_access(int acc)
292{
293 return (acc & IB_ACCESS_REMOTE_WRITE ? TPT_REMOTE_WRITE : 0) |
294 (acc & IB_ACCESS_REMOTE_READ ? TPT_REMOTE_READ : 0) |
295 (acc & IB_ACCESS_LOCAL_WRITE ? TPT_LOCAL_WRITE : 0) |
296 (acc & IB_ACCESS_MW_BIND ? TPT_MW_BIND : 0) |
297 TPT_LOCAL_READ;
298}
299
300static inline u32 iwch_ib_to_tpt_bind_access(int acc)
301{
302 return (acc & IB_ACCESS_REMOTE_WRITE ? TPT_REMOTE_WRITE : 0) |
303 (acc & IB_ACCESS_REMOTE_READ ? TPT_REMOTE_READ : 0);
304}
305
306enum iwch_mmid_state {
307 IWCH_STAG_STATE_VALID,
308 IWCH_STAG_STATE_INVALID
309};
310
311enum iwch_qp_query_flags {
312 IWCH_QP_QUERY_CONTEXT_NONE = 0x0,
313 IWCH_QP_QUERY_CONTEXT_GET = 0x1,
314 IWCH_QP_QUERY_CONTEXT_SUSPEND = 0x2,
315
316
317
318
319
320 IWCH_QP_QUERY_CONTEXT_QUIESCE = 0x4,
321 IWCH_QP_QUERY_CONTEXT_REMOVE = 0x8,
322 IWCH_QP_QUERY_TEST_USERWRITE = 0x32
323};
324
325u16 iwch_rqes_posted(struct iwch_qp *qhp);
326int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
327 struct ib_send_wr **bad_wr);
328int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
329 struct ib_recv_wr **bad_wr);
330int iwch_bind_mw(struct ib_qp *qp,
331 struct ib_mw *mw,
332 struct ib_mw_bind *mw_bind);
333int iwch_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
334int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg);
335int iwch_post_zb_read(struct iwch_qp *qhp);
336int iwch_register_device(struct iwch_dev *dev);
337void iwch_unregister_device(struct iwch_dev *dev);
338int iwch_quiesce_qps(struct iwch_cq *chp);
339int iwch_resume_qps(struct iwch_cq *chp);
340void stop_read_rep_timer(struct iwch_qp *qhp);
341int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
342 struct iwch_mr *mhp, int shift);
343int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
344 struct iwch_mr *mhp,
345 int shift,
346 int npages);
347int iwch_alloc_pbl(struct iwch_mr *mhp, int npages);
348void iwch_free_pbl(struct iwch_mr *mhp);
349int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset);
350int build_phys_page_list(struct ib_phys_buf *buffer_list,
351 int num_phys_buf,
352 u64 *iova_start,
353 u64 *total_size,
354 int *npages,
355 int *shift,
356 __be64 **page_list);
357
358
359#define IWCH_NODE_DESC "cxgb3 Chelsio Communications"
360
361#endif
362
