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34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37
38#include "ipath_kernel.h"
39#include "ipath_common.h"
40
41
42
43
44#define IPATH_MIN_USER_PORT_BUFCNT 7
45
46
47
48
49
50static ushort ipath_cfgports;
51
52module_param_named(cfgports, ipath_cfgports, ushort, S_IRUGO);
53MODULE_PARM_DESC(cfgports, "Set max number of ports to use");
54
55
56
57
58
59
60
61static ushort ipath_kpiobufs;
62
63static int ipath_set_kpiobufs(const char *val, struct kernel_param *kp);
64
65module_param_call(kpiobufs, ipath_set_kpiobufs, param_get_ushort,
66 &ipath_kpiobufs, S_IWUSR | S_IRUGO);
67MODULE_PARM_DESC(kpiobufs, "Set number of PIO buffers for driver");
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84static int create_port0_egr(struct ipath_devdata *dd)
85{
86 unsigned e, egrcnt;
87 struct ipath_skbinfo *skbinfo;
88 int ret;
89
90 egrcnt = dd->ipath_p0_rcvegrcnt;
91
92 skbinfo = vmalloc(sizeof(*dd->ipath_port0_skbinfo) * egrcnt);
93 if (skbinfo == NULL) {
94 ipath_dev_err(dd, "allocation error for eager TID "
95 "skb array\n");
96 ret = -ENOMEM;
97 goto bail;
98 }
99 for (e = 0; e < egrcnt; e++) {
100
101
102
103
104
105
106
107
108 skbinfo[e].skb = ipath_alloc_skb(dd, GFP_KERNEL);
109 if (!skbinfo[e].skb) {
110 ipath_dev_err(dd, "SKB allocation error for "
111 "eager TID %u\n", e);
112 while (e != 0)
113 dev_kfree_skb(skbinfo[--e].skb);
114 vfree(skbinfo);
115 ret = -ENOMEM;
116 goto bail;
117 }
118 }
119
120
121
122
123 dd->ipath_port0_skbinfo = skbinfo;
124
125 for (e = 0; e < egrcnt; e++) {
126 dd->ipath_port0_skbinfo[e].phys =
127 ipath_map_single(dd->pcidev,
128 dd->ipath_port0_skbinfo[e].skb->data,
129 dd->ipath_ibmaxlen, PCI_DMA_FROMDEVICE);
130 dd->ipath_f_put_tid(dd, e + (u64 __iomem *)
131 ((char __iomem *) dd->ipath_kregbase +
132 dd->ipath_rcvegrbase),
133 RCVHQ_RCV_TYPE_EAGER,
134 dd->ipath_port0_skbinfo[e].phys);
135 }
136
137 ret = 0;
138
139bail:
140 return ret;
141}
142
143static int bringup_link(struct ipath_devdata *dd)
144{
145 u64 val, ibc;
146 int ret = 0;
147
148
149 dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
150 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
151 dd->ipath_control);
152
153
154
155
156
157 val = (dd->ipath_ibmaxlen >> 2) + 1;
158 ibc = val << dd->ibcc_mpl_shift;
159
160
161 ibc |= 0x5ULL << INFINIPATH_IBCC_FLOWCTRLWATERMARK_SHIFT;
162
163
164
165
166
167 ibc |= 0x3ULL << INFINIPATH_IBCC_FLOWCTRLPERIOD_SHIFT;
168
169 ibc |= 0xfULL << INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT;
170
171 ibc |= 4ULL << INFINIPATH_IBCC_CREDITSCALE_SHIFT;
172
173 ibc |= 0xfULL << INFINIPATH_IBCC_OVERRUNTHRESHOLD_SHIFT;
174
175 dd->ipath_ibcctrl = ibc;
176
177
178
179
180
181
182
183 ibc |= INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
184 INFINIPATH_IBCC_LINKINITCMD_SHIFT;
185 dd->ipath_flags |= IPATH_IB_LINK_DISABLED;
186 ipath_cdbg(VERBOSE, "Writing 0x%llx to ibcctrl\n",
187 (unsigned long long) ibc);
188 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl, ibc);
189
190
191 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
192
193 ret = dd->ipath_f_bringup_serdes(dd);
194
195 if (ret)
196 dev_info(&dd->pcidev->dev, "Could not initialize SerDes, "
197 "not usable\n");
198 else {
199
200 dd->ipath_control |= INFINIPATH_C_LINKENABLE;
201 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
202 dd->ipath_control);
203 }
204
205 return ret;
206}
207
208static struct ipath_portdata *create_portdata0(struct ipath_devdata *dd)
209{
210 struct ipath_portdata *pd = NULL;
211
212 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
213 if (pd) {
214 pd->port_dd = dd;
215 pd->port_cnt = 1;
216
217 pd->port_pkeys[0] = IPATH_DEFAULT_P_KEY;
218 pd->port_seq_cnt = 1;
219 }
220 return pd;
221}
222
223static int init_chip_first(struct ipath_devdata *dd)
224{
225 struct ipath_portdata *pd;
226 int ret = 0;
227 u64 val;
228
229 spin_lock_init(&dd->ipath_kernel_tid_lock);
230 spin_lock_init(&dd->ipath_user_tid_lock);
231 spin_lock_init(&dd->ipath_sendctrl_lock);
232 spin_lock_init(&dd->ipath_uctxt_lock);
233 spin_lock_init(&dd->ipath_sdma_lock);
234 spin_lock_init(&dd->ipath_gpio_lock);
235 spin_lock_init(&dd->ipath_eep_st_lock);
236 spin_lock_init(&dd->ipath_sdepb_lock);
237 mutex_init(&dd->ipath_eep_lock);
238
239
240
241
242
243
244
245 dd->ipath_f_config_ports(dd, ipath_cfgports);
246 if (!ipath_cfgports)
247 dd->ipath_cfgports = dd->ipath_portcnt;
248 else if (ipath_cfgports <= dd->ipath_portcnt) {
249 dd->ipath_cfgports = ipath_cfgports;
250 ipath_dbg("Configured to use %u ports out of %u in chip\n",
251 dd->ipath_cfgports, ipath_read_kreg32(dd,
252 dd->ipath_kregs->kr_portcnt));
253 } else {
254 dd->ipath_cfgports = dd->ipath_portcnt;
255 ipath_dbg("Tried to configured to use %u ports; chip "
256 "only supports %u\n", ipath_cfgports,
257 ipath_read_kreg32(dd,
258 dd->ipath_kregs->kr_portcnt));
259 }
260
261
262
263
264 dd->ipath_pd = kzalloc(sizeof(*dd->ipath_pd) * dd->ipath_portcnt,
265 GFP_KERNEL);
266
267 if (!dd->ipath_pd) {
268 ipath_dev_err(dd, "Unable to allocate portdata array, "
269 "failing\n");
270 ret = -ENOMEM;
271 goto done;
272 }
273
274 pd = create_portdata0(dd);
275 if (!pd) {
276 ipath_dev_err(dd, "Unable to allocate portdata for port "
277 "0, failing\n");
278 ret = -ENOMEM;
279 goto done;
280 }
281 dd->ipath_pd[0] = pd;
282
283 dd->ipath_rcvtidcnt =
284 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
285 dd->ipath_rcvtidbase =
286 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
287 dd->ipath_rcvegrcnt =
288 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
289 dd->ipath_rcvegrbase =
290 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
291 dd->ipath_palign =
292 ipath_read_kreg32(dd, dd->ipath_kregs->kr_pagealign);
293 dd->ipath_piobufbase =
294 ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufbase);
295 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiosize);
296 dd->ipath_piosize2k = val & ~0U;
297 dd->ipath_piosize4k = val >> 32;
298 if (dd->ipath_piosize4k == 0 && ipath_mtu4096)
299 ipath_mtu4096 = 0;
300 dd->ipath_ibmtu = ipath_mtu4096 ? 4096 : 2048;
301 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufcnt);
302 dd->ipath_piobcnt2k = val & ~0U;
303 dd->ipath_piobcnt4k = val >> 32;
304 dd->ipath_pio2kbase =
305 (u32 __iomem *) (((char __iomem *) dd->ipath_kregbase) +
306 (dd->ipath_piobufbase & 0xffffffff));
307 if (dd->ipath_piobcnt4k) {
308 dd->ipath_pio4kbase = (u32 __iomem *)
309 (((char __iomem *) dd->ipath_kregbase) +
310 (dd->ipath_piobufbase >> 32));
311
312
313
314
315
316 dd->ipath_4kalign = ALIGN(dd->ipath_piosize4k,
317 dd->ipath_palign);
318 ipath_dbg("%u 2k(%x) piobufs @ %p, %u 4k(%x) @ %p "
319 "(%x aligned)\n",
320 dd->ipath_piobcnt2k, dd->ipath_piosize2k,
321 dd->ipath_pio2kbase, dd->ipath_piobcnt4k,
322 dd->ipath_piosize4k, dd->ipath_pio4kbase,
323 dd->ipath_4kalign);
324 }
325 else ipath_dbg("%u 2k piobufs @ %p\n",
326 dd->ipath_piobcnt2k, dd->ipath_pio2kbase);
327
328done:
329 return ret;
330}
331
332
333
334
335
336
337
338
339
340static int init_chip_reset(struct ipath_devdata *dd)
341{
342 u32 rtmp;
343 int i;
344 unsigned long flags;
345
346
347
348
349
350 dd->ipath_rcvctrl &= ~(1ULL << dd->ipath_r_tailupd_shift);
351 for (i = 0; i < dd->ipath_portcnt; i++) {
352 clear_bit(dd->ipath_r_portenable_shift + i,
353 &dd->ipath_rcvctrl);
354 clear_bit(dd->ipath_r_intravail_shift + i,
355 &dd->ipath_rcvctrl);
356 }
357 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
358 dd->ipath_rcvctrl);
359
360 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
361 dd->ipath_sendctrl = 0U;
362 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
363 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
364 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
365
366 ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL);
367
368 rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
369 if (rtmp != dd->ipath_rcvtidcnt)
370 dev_info(&dd->pcidev->dev, "tidcnt was %u before "
371 "reset, now %u, using original\n",
372 dd->ipath_rcvtidcnt, rtmp);
373 rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
374 if (rtmp != dd->ipath_rcvtidbase)
375 dev_info(&dd->pcidev->dev, "tidbase was %u before "
376 "reset, now %u, using original\n",
377 dd->ipath_rcvtidbase, rtmp);
378 rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
379 if (rtmp != dd->ipath_rcvegrcnt)
380 dev_info(&dd->pcidev->dev, "egrcnt was %u before "
381 "reset, now %u, using original\n",
382 dd->ipath_rcvegrcnt, rtmp);
383 rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
384 if (rtmp != dd->ipath_rcvegrbase)
385 dev_info(&dd->pcidev->dev, "egrbase was %u before "
386 "reset, now %u, using original\n",
387 dd->ipath_rcvegrbase, rtmp);
388
389 return 0;
390}
391
392static int init_pioavailregs(struct ipath_devdata *dd)
393{
394 int ret;
395
396 dd->ipath_pioavailregs_dma = dma_alloc_coherent(
397 &dd->pcidev->dev, PAGE_SIZE, &dd->ipath_pioavailregs_phys,
398 GFP_KERNEL);
399 if (!dd->ipath_pioavailregs_dma) {
400 ipath_dev_err(dd, "failed to allocate PIOavail reg area "
401 "in memory\n");
402 ret = -ENOMEM;
403 goto done;
404 }
405
406
407
408
409
410 dd->ipath_statusp = (u64 *)
411 ((char *)dd->ipath_pioavailregs_dma +
412 ((2 * L1_CACHE_BYTES +
413 dd->ipath_pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES));
414
415 *dd->ipath_statusp = dd->_ipath_status;
416
417
418
419
420 dd->ipath_freezemsg = (char *)&dd->ipath_statusp[1];
421
422 dd->ipath_freezelen = L1_CACHE_BYTES - sizeof(dd->ipath_statusp[0]);
423
424 ret = 0;
425
426done:
427 return ret;
428}
429
430
431
432
433
434
435
436
437
438
439static void init_shadow_tids(struct ipath_devdata *dd)
440{
441 struct page **pages;
442 dma_addr_t *addrs;
443
444 pages = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
445 sizeof(struct page *));
446 if (!pages) {
447 ipath_dev_err(dd, "failed to allocate shadow page * "
448 "array, no expected sends!\n");
449 dd->ipath_pageshadow = NULL;
450 return;
451 }
452
453 addrs = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
454 sizeof(dma_addr_t));
455 if (!addrs) {
456 ipath_dev_err(dd, "failed to allocate shadow dma handle "
457 "array, no expected sends!\n");
458 vfree(pages);
459 dd->ipath_pageshadow = NULL;
460 return;
461 }
462
463 memset(pages, 0, dd->ipath_cfgports * dd->ipath_rcvtidcnt *
464 sizeof(struct page *));
465
466 dd->ipath_pageshadow = pages;
467 dd->ipath_physshadow = addrs;
468}
469
470static void enable_chip(struct ipath_devdata *dd, int reinit)
471{
472 u32 val;
473 u64 rcvmask;
474 unsigned long flags;
475 int i;
476
477 if (!reinit)
478 init_waitqueue_head(&ipath_state_wait);
479
480 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
481 dd->ipath_rcvctrl);
482
483 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
484
485 dd->ipath_sendctrl = INFINIPATH_S_PIOENABLE |
486 INFINIPATH_S_PIOBUFAVAILUPD;
487
488
489
490
491
492 if (dd->ipath_pioupd_thresh)
493 dd->ipath_sendctrl |= dd->ipath_pioupd_thresh
494 << INFINIPATH_S_UPDTHRESH_SHIFT;
495 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
496 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
497 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
498
499
500
501
502
503 rcvmask = 1ULL;
504 dd->ipath_rcvctrl |= (rcvmask << dd->ipath_r_portenable_shift) |
505 (rcvmask << dd->ipath_r_intravail_shift);
506 if (!(dd->ipath_flags & IPATH_NODMA_RTAIL))
507 dd->ipath_rcvctrl |= (1ULL << dd->ipath_r_tailupd_shift);
508
509 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
510 dd->ipath_rcvctrl);
511
512
513
514
515
516 dd->ipath_flags |= IPATH_INITTED;
517
518
519
520
521
522 val = ipath_read_ureg32(dd, ur_rcvegrindextail, 0);
523 ipath_write_ureg(dd, ur_rcvegrindexhead, val, 0);
524
525
526 ipath_write_ureg(dd, ur_rcvhdrhead,
527 dd->ipath_rhdrhead_intr_off |
528 dd->ipath_pd[0]->port_head, 0);
529
530
531
532
533
534
535
536 for (i = 0; i < dd->ipath_pioavregs; i++) {
537 __le64 pioavail;
538
539
540
541
542 if (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS))
543 pioavail = dd->ipath_pioavailregs_dma[i ^ 1];
544 else
545 pioavail = dd->ipath_pioavailregs_dma[i];
546
547
548
549
550
551 dd->ipath_pioavailshadow[i] = le64_to_cpu(pioavail);
552 }
553
554 dd->ipath_flags |= IPATH_PRESENT;
555}
556
557static int init_housekeeping(struct ipath_devdata *dd, int reinit)
558{
559 char boardn[40];
560 int ret = 0;
561
562
563
564
565
566
567 dd->ipath_rcvhdrsize = 0;
568
569
570
571
572
573
574
575
576
577 dd->ipath_flags |= IPATH_LINKUNK | IPATH_PRESENT;
578 dd->ipath_flags &= ~(IPATH_LINKACTIVE | IPATH_LINKARMED |
579 IPATH_LINKDOWN | IPATH_LINKINIT);
580
581 ipath_cdbg(VERBOSE, "Try to read spc chip revision\n");
582 dd->ipath_revision =
583 ipath_read_kreg64(dd, dd->ipath_kregs->kr_revision);
584
585
586
587
588
589
590 dd->ipath_sregbase =
591 ipath_read_kreg32(dd, dd->ipath_kregs->kr_sendregbase);
592 dd->ipath_cregbase =
593 ipath_read_kreg32(dd, dd->ipath_kregs->kr_counterregbase);
594 dd->ipath_uregbase =
595 ipath_read_kreg32(dd, dd->ipath_kregs->kr_userregbase);
596 ipath_cdbg(VERBOSE, "ipath_kregbase %p, sendbase %x usrbase %x, "
597 "cntrbase %x\n", dd->ipath_kregbase, dd->ipath_sregbase,
598 dd->ipath_uregbase, dd->ipath_cregbase);
599 if ((dd->ipath_revision & 0xffffffff) == 0xffffffff
600 || (dd->ipath_sregbase & 0xffffffff) == 0xffffffff
601 || (dd->ipath_cregbase & 0xffffffff) == 0xffffffff
602 || (dd->ipath_uregbase & 0xffffffff) == 0xffffffff) {
603 ipath_dev_err(dd, "Register read failures from chip, "
604 "giving up initialization\n");
605 dd->ipath_flags &= ~IPATH_PRESENT;
606 ret = -ENODEV;
607 goto done;
608 }
609
610
611
612 ipath_write_kreg (dd, dd->ipath_kregs->kr_hwdiagctrl, 0);
613
614
615 ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
616 INFINIPATH_E_RESET);
617
618 ipath_cdbg(VERBOSE, "Revision %llx (PCI %x)\n",
619 (unsigned long long) dd->ipath_revision,
620 dd->ipath_pcirev);
621
622 if (((dd->ipath_revision >> INFINIPATH_R_SOFTWARE_SHIFT) &
623 INFINIPATH_R_SOFTWARE_MASK) != IPATH_CHIP_SWVERSION) {
624 ipath_dev_err(dd, "Driver only handles version %d, "
625 "chip swversion is %d (%llx), failng\n",
626 IPATH_CHIP_SWVERSION,
627 (int)(dd->ipath_revision >>
628 INFINIPATH_R_SOFTWARE_SHIFT) &
629 INFINIPATH_R_SOFTWARE_MASK,
630 (unsigned long long) dd->ipath_revision);
631 ret = -ENOSYS;
632 goto done;
633 }
634 dd->ipath_majrev = (u8) ((dd->ipath_revision >>
635 INFINIPATH_R_CHIPREVMAJOR_SHIFT) &
636 INFINIPATH_R_CHIPREVMAJOR_MASK);
637 dd->ipath_minrev = (u8) ((dd->ipath_revision >>
638 INFINIPATH_R_CHIPREVMINOR_SHIFT) &
639 INFINIPATH_R_CHIPREVMINOR_MASK);
640 dd->ipath_boardrev = (u8) ((dd->ipath_revision >>
641 INFINIPATH_R_BOARDID_SHIFT) &
642 INFINIPATH_R_BOARDID_MASK);
643
644 ret = dd->ipath_f_get_boardname(dd, boardn, sizeof boardn);
645
646 snprintf(dd->ipath_boardversion, sizeof(dd->ipath_boardversion),
647 "ChipABI %u.%u, %s, InfiniPath%u %u.%u, PCI %u, "
648 "SW Compat %u\n",
649 IPATH_CHIP_VERS_MAJ, IPATH_CHIP_VERS_MIN, boardn,
650 (unsigned)(dd->ipath_revision >> INFINIPATH_R_ARCH_SHIFT) &
651 INFINIPATH_R_ARCH_MASK,
652 dd->ipath_majrev, dd->ipath_minrev, dd->ipath_pcirev,
653 (unsigned)(dd->ipath_revision >>
654 INFINIPATH_R_SOFTWARE_SHIFT) &
655 INFINIPATH_R_SOFTWARE_MASK);
656
657 ipath_dbg("%s", dd->ipath_boardversion);
658
659 if (ret)
660 goto done;
661
662 if (reinit)
663 ret = init_chip_reset(dd);
664 else
665 ret = init_chip_first(dd);
666
667done:
668 return ret;
669}
670
671static void verify_interrupt(unsigned long opaque)
672{
673 struct ipath_devdata *dd = (struct ipath_devdata *) opaque;
674
675 if (!dd)
676 return;
677
678
679
680
681
682 if (dd->ipath_int_counter == 0) {
683 if (!dd->ipath_f_intr_fallback(dd))
684 dev_err(&dd->pcidev->dev, "No interrupts detected, "
685 "not usable.\n");
686 else
687 mod_timer(&dd->ipath_intrchk_timer, jiffies + HZ/2);
688 } else
689 ipath_cdbg(VERBOSE, "%u interrupts at timer check\n",
690 dd->ipath_int_counter);
691}
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708int ipath_init_chip(struct ipath_devdata *dd, int reinit)
709{
710 int ret = 0;
711 u32 kpiobufs, defkbufs;
712 u32 piobufs, uports;
713 u64 val;
714 struct ipath_portdata *pd;
715 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
716
717 ret = init_housekeeping(dd, reinit);
718 if (ret)
719 goto done;
720
721
722
723
724
725 if (ret == 2) {
726
727 ret = -EPERM;
728 goto done;
729 }
730
731
732
733
734
735
736
737 dd->ipath_rcvhdrcnt = max(dd->ipath_p0_rcvegrcnt, dd->ipath_rcvegrcnt);
738 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrcnt,
739 dd->ipath_rcvhdrcnt);
740
741
742
743
744
745
746
747 piobufs = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
748
749
750
751
752 dd->ipath_pioavregs = ALIGN(piobufs, sizeof(u64) * BITS_PER_BYTE / 2)
753 / (sizeof(u64) * BITS_PER_BYTE / 2);
754 uports = dd->ipath_cfgports ? dd->ipath_cfgports - 1 : 0;
755 if (piobufs > 144)
756 defkbufs = 32 + dd->ipath_pioreserved;
757 else
758 defkbufs = 16 + dd->ipath_pioreserved;
759
760 if (ipath_kpiobufs && (ipath_kpiobufs +
761 (uports * IPATH_MIN_USER_PORT_BUFCNT)) > piobufs) {
762 int i = (int) piobufs -
763 (int) (uports * IPATH_MIN_USER_PORT_BUFCNT);
764 if (i < 1)
765 i = 1;
766 dev_info(&dd->pcidev->dev, "Allocating %d PIO bufs of "
767 "%d for kernel leaves too few for %d user ports "
768 "(%d each); using %u\n", ipath_kpiobufs,
769 piobufs, uports, IPATH_MIN_USER_PORT_BUFCNT, i);
770
771
772
773
774 kpiobufs = i;
775 } else if (ipath_kpiobufs)
776 kpiobufs = ipath_kpiobufs;
777 else
778 kpiobufs = defkbufs;
779 dd->ipath_lastport_piobuf = piobufs - kpiobufs;
780 dd->ipath_pbufsport =
781 uports ? dd->ipath_lastport_piobuf / uports : 0;
782
783 dd->ipath_ports_extrabuf = dd->ipath_lastport_piobuf -
784 (dd->ipath_pbufsport * uports);
785 if (dd->ipath_ports_extrabuf)
786 ipath_dbg("%u pbufs/port leaves some unused, add 1 buffer to "
787 "ports <= %u\n", dd->ipath_pbufsport,
788 dd->ipath_ports_extrabuf);
789 dd->ipath_lastpioindex = 0;
790 dd->ipath_lastpioindexl = dd->ipath_piobcnt2k;
791
792 ipath_cdbg(VERBOSE, "%d PIO bufs for kernel out of %d total %u "
793 "each for %u user ports\n", kpiobufs,
794 piobufs, dd->ipath_pbufsport, uports);
795 ret = dd->ipath_f_early_init(dd);
796 if (ret) {
797 ipath_dev_err(dd, "Early initialization failure\n");
798 goto done;
799 }
800
801
802
803
804
805 dd->ipath_hdrqlast =
806 dd->ipath_rcvhdrentsize * (dd->ipath_rcvhdrcnt - 1);
807 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrentsize,
808 dd->ipath_rcvhdrentsize);
809 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
810 dd->ipath_rcvhdrsize);
811
812 if (!reinit) {
813 ret = init_pioavailregs(dd);
814 init_shadow_tids(dd);
815 if (ret)
816 goto done;
817 }
818
819 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendpioavailaddr,
820 dd->ipath_pioavailregs_phys);
821
822
823
824
825
826 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpioavailaddr);
827 if (val != dd->ipath_pioavailregs_phys) {
828 ipath_dev_err(dd, "Catastrophic software error, "
829 "SendPIOAvailAddr written as %lx, "
830 "read back as %llx\n",
831 (unsigned long) dd->ipath_pioavailregs_phys,
832 (unsigned long long) val);
833 ret = -EINVAL;
834 goto done;
835 }
836
837 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvbthqp, IPATH_KD_QP);
838
839
840
841
842
843 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask, 0ULL);
844 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
845 ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
846 ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL);
847
848
849
850
851
852 if (bringup_link(dd)) {
853 dev_info(&dd->pcidev->dev, "Failed to bringup IB link\n");
854 ret = -ENETDOWN;
855 goto done;
856 }
857
858
859
860
861
862
863 dd->ipath_f_init_hwerrors(dd);
864 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
865 ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
866 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
867 dd->ipath_hwerrmask);
868
869
870 ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
871
872 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
873 ~dd->ipath_maskederrs);
874 dd->ipath_maskederrs = 0;
875 dd->ipath_errormask =
876 ipath_read_kreg64(dd, dd->ipath_kregs->kr_errormask);
877
878 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
879
880 dd->ipath_f_tidtemplate(dd);
881
882
883
884
885
886
887
888 pd = dd->ipath_pd[0];
889 if (reinit) {
890 struct ipath_portdata *npd;
891
892
893
894
895
896
897 npd = create_portdata0(dd);
898 if (npd) {
899 ipath_free_pddata(dd, pd);
900 dd->ipath_pd[0] = npd;
901 pd = npd;
902 } else {
903 ipath_dev_err(dd, "Unable to allocate portdata"
904 " for port 0, failing\n");
905 ret = -ENOMEM;
906 goto done;
907 }
908 }
909 ret = ipath_create_rcvhdrq(dd, pd);
910 if (!ret)
911 ret = create_port0_egr(dd);
912 if (ret) {
913 ipath_dev_err(dd, "failed to allocate kernel port's "
914 "rcvhdrq and/or egr bufs\n");
915 goto done;
916 }
917 else
918 enable_chip(dd, reinit);
919
920
921 ipath_chg_pioavailkernel(dd, 0, piobufs, 1);
922
923
924
925
926
927
928
929
930
931 ipath_cancel_sends(dd, 1);
932
933 if (!reinit) {
934
935
936
937
938 dd->ipath_dummy_hdrq = dma_alloc_coherent(
939 &dd->pcidev->dev, dd->ipath_pd[0]->port_rcvhdrq_size,
940 &dd->ipath_dummy_hdrq_phys,
941 gfp_flags);
942 if (!dd->ipath_dummy_hdrq) {
943 dev_info(&dd->pcidev->dev,
944 "Couldn't allocate 0x%lx bytes for dummy hdrq\n",
945 dd->ipath_pd[0]->port_rcvhdrq_size);
946
947 dd->ipath_dummy_hdrq_phys = 0UL;
948 }
949 }
950
951
952
953
954
955 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
956
957 if (!dd->ipath_stats_timer_active) {
958
959
960
961
962
963 init_timer(&dd->ipath_stats_timer);
964 dd->ipath_stats_timer.function = ipath_get_faststats;
965 dd->ipath_stats_timer.data = (unsigned long) dd;
966
967 dd->ipath_stats_timer.expires = jiffies + 5 * HZ;
968
969 add_timer(&dd->ipath_stats_timer);
970 dd->ipath_stats_timer_active = 1;
971 }
972
973
974 if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
975 ret = setup_sdma(dd);
976
977
978 init_timer(&dd->ipath_hol_timer);
979 dd->ipath_hol_timer.function = ipath_hol_event;
980 dd->ipath_hol_timer.data = (unsigned long)dd;
981 dd->ipath_hol_state = IPATH_HOL_UP;
982
983done:
984 if (!ret) {
985 *dd->ipath_statusp |= IPATH_STATUS_CHIP_PRESENT;
986 if (!dd->ipath_f_intrsetup(dd)) {
987
988 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
989 -1LL);
990
991 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear,
992 0ULL);
993
994 *dd->ipath_statusp |= IPATH_STATUS_INITTED;
995
996
997
998
999
1000 if (!reinit) {
1001 init_timer(&dd->ipath_intrchk_timer);
1002 dd->ipath_intrchk_timer.function =
1003 verify_interrupt;
1004 dd->ipath_intrchk_timer.data =
1005 (unsigned long) dd;
1006 }
1007 dd->ipath_intrchk_timer.expires = jiffies + HZ/2;
1008 add_timer(&dd->ipath_intrchk_timer);
1009 } else
1010 ipath_dev_err(dd, "No interrupts enabled, couldn't "
1011 "setup interrupt address\n");
1012
1013 if (dd->ipath_cfgports > ipath_stats.sps_nports)
1014
1015
1016
1017
1018
1019
1020
1021
1022 ipath_stats.sps_nports = dd->ipath_cfgports;
1023 } else
1024 ipath_dbg("Failed (%d) to initialize chip\n", ret);
1025
1026
1027
1028 return ret;
1029}
1030
1031static int ipath_set_kpiobufs(const char *str, struct kernel_param *kp)
1032{
1033 struct ipath_devdata *dd;
1034 unsigned long flags;
1035 unsigned short val;
1036 int ret;
1037
1038 ret = ipath_parse_ushort(str, &val);
1039
1040 spin_lock_irqsave(&ipath_devs_lock, flags);
1041
1042 if (ret < 0)
1043 goto bail;
1044
1045 if (val == 0) {
1046 ret = -EINVAL;
1047 goto bail;
1048 }
1049
1050 list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
1051 if (dd->ipath_kregbase)
1052 continue;
1053 if (val > (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k -
1054 (dd->ipath_cfgports *
1055 IPATH_MIN_USER_PORT_BUFCNT)))
1056 {
1057 ipath_dev_err(
1058 dd,
1059 "Allocating %d PIO bufs for kernel leaves "
1060 "too few for %d user ports (%d each)\n",
1061 val, dd->ipath_cfgports - 1,
1062 IPATH_MIN_USER_PORT_BUFCNT);
1063 ret = -EINVAL;
1064 goto bail;
1065 }
1066 dd->ipath_lastport_piobuf =
1067 dd->ipath_piobcnt2k + dd->ipath_piobcnt4k - val;
1068 }
1069
1070 ipath_kpiobufs = val;
1071 ret = 0;
1072bail:
1073 spin_unlock_irqrestore(&ipath_devs_lock, flags);
1074
1075 return ret;
1076}
1077