linux/drivers/infiniband/hw/nes/nes.h
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   1/*
   2 * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
   3 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
   4 *
   5 * This software is available to you under a choice of one of two
   6 * licenses.  You may choose to be licensed under the terms of the GNU
   7 * General Public License (GPL) Version 2, available from the file
   8 * COPYING in the main directory of this source tree, or the
   9 * OpenIB.org BSD license below:
  10 *
  11 *     Redistribution and use in source and binary forms, with or
  12 *     without modification, are permitted provided that the following
  13 *     conditions are met:
  14 *
  15 *      - Redistributions of source code must retain the above
  16 *        copyright notice, this list of conditions and the following
  17 *        disclaimer.
  18 *
  19 *      - Redistributions in binary form must reproduce the above
  20 *        copyright notice, this list of conditions and the following
  21 *        disclaimer in the documentation and/or other materials
  22 *        provided with the distribution.
  23 *
  24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31 * SOFTWARE.
  32 */
  33
  34#ifndef __NES_H
  35#define __NES_H
  36
  37#include <linux/netdevice.h>
  38#include <linux/inetdevice.h>
  39#include <linux/spinlock.h>
  40#include <linux/kernel.h>
  41#include <linux/delay.h>
  42#include <linux/pci.h>
  43#include <linux/dma-mapping.h>
  44#include <linux/workqueue.h>
  45#include <linux/slab.h>
  46#include <asm/io.h>
  47#include <linux/crc32c.h>
  48
  49#include <rdma/ib_smi.h>
  50#include <rdma/ib_verbs.h>
  51#include <rdma/ib_pack.h>
  52#include <rdma/rdma_cm.h>
  53#include <rdma/iw_cm.h>
  54
  55#define NES_SEND_FIRST_WRITE
  56
  57#define QUEUE_DISCONNECTS
  58
  59#define DRV_NAME    "iw_nes"
  60#define DRV_VERSION "1.5.0.0"
  61#define PFX         DRV_NAME ": "
  62
  63/*
  64 * NetEffect PCI vendor id and NE010 PCI device id.
  65 */
  66#ifndef PCI_VENDOR_ID_NETEFFECT /* not in pci.ids yet */
  67#define PCI_VENDOR_ID_NETEFFECT       0x1678
  68#define PCI_DEVICE_ID_NETEFFECT_NE020 0x0100
  69#endif
  70
  71#define NE020_REV   4
  72#define NE020_REV1  5
  73
  74#define BAR_0       0
  75#define BAR_1       2
  76
  77#define RX_BUF_SIZE             (1536 + 8)
  78#define NES_REG0_SIZE           (4 * 1024)
  79#define NES_TX_TIMEOUT          (6*HZ)
  80#define NES_FIRST_QPN           64
  81#define NES_SW_CONTEXT_ALIGN    1024
  82
  83#define NES_NIC_MAX_NICS        16
  84#define NES_MAX_ARP_TABLE_SIZE  4096
  85
  86#define NES_NIC_CEQ_SIZE        8
  87/* NICs will be on a separate CQ */
  88#define NES_CCEQ_SIZE ((nesadapter->max_cq / nesadapter->port_count) - 32)
  89
  90#define NES_MAX_PORT_COUNT 4
  91
  92#define MAX_DPC_ITERATIONS               128
  93
  94#define NES_DRV_OPT_ENABLE_MPA_VER_0     0x00000001
  95#define NES_DRV_OPT_DISABLE_MPA_CRC      0x00000002
  96#define NES_DRV_OPT_DISABLE_FIRST_WRITE  0x00000004
  97#define NES_DRV_OPT_DISABLE_INTF         0x00000008
  98#define NES_DRV_OPT_ENABLE_MSI           0x00000010
  99#define NES_DRV_OPT_DUAL_LOGICAL_PORT    0x00000020
 100#define NES_DRV_OPT_SUPRESS_OPTION_BC    0x00000040
 101#define NES_DRV_OPT_NO_INLINE_DATA       0x00000080
 102#define NES_DRV_OPT_DISABLE_INT_MOD      0x00000100
 103#define NES_DRV_OPT_DISABLE_VIRT_WQ      0x00000200
 104
 105#define NES_AEQ_EVENT_TIMEOUT         2500
 106#define NES_DISCONNECT_EVENT_TIMEOUT  2000
 107
 108/* debug levels */
 109/* must match userspace */
 110#define NES_DBG_HW          0x00000001
 111#define NES_DBG_INIT        0x00000002
 112#define NES_DBG_ISR         0x00000004
 113#define NES_DBG_PHY         0x00000008
 114#define NES_DBG_NETDEV      0x00000010
 115#define NES_DBG_CM          0x00000020
 116#define NES_DBG_CM1         0x00000040
 117#define NES_DBG_NIC_RX      0x00000080
 118#define NES_DBG_NIC_TX      0x00000100
 119#define NES_DBG_CQP         0x00000200
 120#define NES_DBG_MMAP        0x00000400
 121#define NES_DBG_MR          0x00000800
 122#define NES_DBG_PD          0x00001000
 123#define NES_DBG_CQ          0x00002000
 124#define NES_DBG_QP          0x00004000
 125#define NES_DBG_MOD_QP      0x00008000
 126#define NES_DBG_AEQ         0x00010000
 127#define NES_DBG_IW_RX       0x00020000
 128#define NES_DBG_IW_TX       0x00040000
 129#define NES_DBG_SHUTDOWN    0x00080000
 130#define NES_DBG_RSVD1       0x10000000
 131#define NES_DBG_RSVD2       0x20000000
 132#define NES_DBG_RSVD3       0x40000000
 133#define NES_DBG_RSVD4       0x80000000
 134#define NES_DBG_ALL         0xffffffff
 135
 136#ifdef CONFIG_INFINIBAND_NES_DEBUG
 137#define nes_debug(level, fmt, args...) \
 138do { \
 139        if (level & nes_debug_level) \
 140                printk(KERN_ERR PFX "%s[%u]: " fmt, __func__, __LINE__, ##args); \
 141} while (0)
 142
 143#define assert(expr) \
 144do { \
 145        if (!(expr)) { \
 146                printk(KERN_ERR PFX "Assertion failed! %s, %s, %s, line %d\n", \
 147                           #expr, __FILE__, __func__, __LINE__); \
 148        } \
 149} while (0)
 150
 151#define NES_EVENT_TIMEOUT   1200000
 152#else
 153#define nes_debug(level, fmt, args...)
 154#define assert(expr)          do {} while (0)
 155
 156#define NES_EVENT_TIMEOUT   100000
 157#endif
 158
 159#include "nes_hw.h"
 160#include "nes_verbs.h"
 161#include "nes_context.h"
 162#include "nes_user.h"
 163#include "nes_cm.h"
 164
 165extern int max_mtu;
 166#define max_frame_len (max_mtu+ETH_HLEN)
 167extern int interrupt_mod_interval;
 168extern int nes_if_count;
 169extern int mpa_version;
 170extern int disable_mpa_crc;
 171extern unsigned int send_first;
 172extern unsigned int nes_drv_opt;
 173extern unsigned int nes_debug_level;
 174extern unsigned int wqm_quanta;
 175extern struct list_head nes_adapter_list;
 176
 177extern atomic_t cm_connects;
 178extern atomic_t cm_accepts;
 179extern atomic_t cm_disconnects;
 180extern atomic_t cm_closes;
 181extern atomic_t cm_connecteds;
 182extern atomic_t cm_connect_reqs;
 183extern atomic_t cm_rejects;
 184extern atomic_t mod_qp_timouts;
 185extern atomic_t qps_created;
 186extern atomic_t qps_destroyed;
 187extern atomic_t sw_qps_destroyed;
 188extern u32 mh_detected;
 189extern u32 mh_pauses_sent;
 190extern u32 cm_packets_sent;
 191extern u32 cm_packets_bounced;
 192extern u32 cm_packets_created;
 193extern u32 cm_packets_received;
 194extern u32 cm_packets_dropped;
 195extern u32 cm_packets_retrans;
 196extern u32 cm_listens_created;
 197extern u32 cm_listens_destroyed;
 198extern u32 cm_backlog_drops;
 199extern atomic_t cm_loopbacks;
 200extern atomic_t cm_nodes_created;
 201extern atomic_t cm_nodes_destroyed;
 202extern atomic_t cm_accel_dropped_pkts;
 203extern atomic_t cm_resets_recvd;
 204
 205extern u32 int_mod_timer_init;
 206extern u32 int_mod_cq_depth_256;
 207extern u32 int_mod_cq_depth_128;
 208extern u32 int_mod_cq_depth_32;
 209extern u32 int_mod_cq_depth_24;
 210extern u32 int_mod_cq_depth_16;
 211extern u32 int_mod_cq_depth_4;
 212extern u32 int_mod_cq_depth_1;
 213
 214struct nes_device {
 215        struct nes_adapter         *nesadapter;
 216        void __iomem           *regs;
 217        void __iomem           *index_reg;
 218        struct pci_dev         *pcidev;
 219        struct net_device      *netdev[NES_NIC_MAX_NICS];
 220        u64                    link_status_interrupts;
 221        struct tasklet_struct  dpc_tasklet;
 222        spinlock_t             indexed_regs_lock;
 223        unsigned long          csr_start;
 224        unsigned long          doorbell_region;
 225        unsigned long          doorbell_start;
 226        unsigned long          mac_tx_errors;
 227        unsigned long          mac_pause_frames_sent;
 228        unsigned long          mac_pause_frames_received;
 229        unsigned long          mac_rx_errors;
 230        unsigned long          mac_rx_crc_errors;
 231        unsigned long          mac_rx_symbol_err_frames;
 232        unsigned long          mac_rx_jabber_frames;
 233        unsigned long          mac_rx_oversized_frames;
 234        unsigned long          mac_rx_short_frames;
 235        unsigned long          port_rx_discards;
 236        unsigned long          port_tx_discards;
 237        unsigned int           mac_index;
 238        unsigned int           nes_stack_start;
 239
 240        /* Control Structures */
 241        void                   *cqp_vbase;
 242        dma_addr_t             cqp_pbase;
 243        u32                    cqp_mem_size;
 244        u8                     ceq_index;
 245        u8                     nic_ceq_index;
 246        struct nes_hw_cqp      cqp;
 247        struct nes_hw_cq       ccq;
 248        struct list_head       cqp_avail_reqs;
 249        struct list_head       cqp_pending_reqs;
 250        struct nes_cqp_request *nes_cqp_requests;
 251
 252        u32                    int_req;
 253        u32                    int_stat;
 254        u32                    timer_int_req;
 255        u32                    timer_only_int_count;
 256        u32                    intf_int_req;
 257        u32                    last_mac_tx_pauses;
 258        u32                    last_used_chunks_tx;
 259        struct list_head       list;
 260
 261        u16                    base_doorbell_index;
 262        u16                    currcq_count;
 263        u16                    deepcq_count;
 264        u8                     msi_enabled;
 265        u8                     netdev_count;
 266        u8                     napi_isr_ran;
 267        u8                     disable_rx_flow_control;
 268        u8                     disable_tx_flow_control;
 269};
 270
 271
 272static inline __le32 get_crc_value(struct nes_v4_quad *nes_quad)
 273{
 274        u32 crc_value;
 275        crc_value = crc32c(~0, (void *)nes_quad, sizeof (struct nes_v4_quad));
 276
 277        /*
 278         * With commit ef19454b ("[LIB] crc32c: Keep intermediate crc
 279         * state in cpu order"), behavior of crc32c changes on
 280         * big-endian platforms.  Our algorithm expects the previous
 281         * behavior; otherwise we have RDMA connection establishment
 282         * issue on big-endian.
 283         */
 284        return cpu_to_le32(crc_value);
 285}
 286
 287static inline void
 288set_wqe_64bit_value(__le32 *wqe_words, u32 index, u64 value)
 289{
 290        wqe_words[index]     = cpu_to_le32((u32) value);
 291        wqe_words[index + 1] = cpu_to_le32(upper_32_bits(value));
 292}
 293
 294static inline void
 295set_wqe_32bit_value(__le32 *wqe_words, u32 index, u32 value)
 296{
 297        wqe_words[index] = cpu_to_le32(value);
 298}
 299
 300static inline void
 301nes_fill_init_cqp_wqe(struct nes_hw_cqp_wqe *cqp_wqe, struct nes_device *nesdev)
 302{
 303        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_COMP_CTX_LOW_IDX,
 304                        (u64)((unsigned long) &nesdev->cqp));
 305        cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX]   = 0;
 306        cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX]  = 0;
 307        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX] = 0;
 308        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_LEN_IDX]       = 0;
 309        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_LOW_IDX]       = 0;
 310        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_LOW_IDX]        = 0;
 311        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_HIGH_IDX]       = 0;
 312}
 313
 314static inline void
 315nes_fill_init_qp_wqe(struct nes_hw_qp_wqe *wqe, struct nes_qp *nesqp, u32 head)
 316{
 317        u32 value;
 318        value = ((u32)((unsigned long) nesqp)) | head;
 319        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_HIGH_IDX,
 320                        (u32)(upper_32_bits((unsigned long)(nesqp))));
 321        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, value);
 322}
 323
 324/* Read from memory-mapped device */
 325static inline u32 nes_read_indexed(struct nes_device *nesdev, u32 reg_index)
 326{
 327        unsigned long flags;
 328        void __iomem *addr = nesdev->index_reg;
 329        u32 value;
 330
 331        spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
 332
 333        writel(reg_index, addr);
 334        value = readl((void __iomem *)addr + 4);
 335
 336        spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
 337        return value;
 338}
 339
 340static inline u32 nes_read32(const void __iomem *addr)
 341{
 342        return readl(addr);
 343}
 344
 345static inline u16 nes_read16(const void __iomem *addr)
 346{
 347        return readw(addr);
 348}
 349
 350static inline u8 nes_read8(const void __iomem *addr)
 351{
 352        return readb(addr);
 353}
 354
 355/* Write to memory-mapped device */
 356static inline void nes_write_indexed(struct nes_device *nesdev, u32 reg_index, u32 val)
 357{
 358        unsigned long flags;
 359        void __iomem *addr = nesdev->index_reg;
 360
 361        spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
 362
 363        writel(reg_index, addr);
 364        writel(val, (void __iomem *)addr + 4);
 365
 366        spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
 367}
 368
 369static inline void nes_write32(void __iomem *addr, u32 val)
 370{
 371        writel(val, addr);
 372}
 373
 374static inline void nes_write16(void __iomem *addr, u16 val)
 375{
 376        writew(val, addr);
 377}
 378
 379static inline void nes_write8(void __iomem *addr, u8 val)
 380{
 381        writeb(val, addr);
 382}
 383
 384
 385
 386static inline int nes_alloc_resource(struct nes_adapter *nesadapter,
 387                unsigned long *resource_array, u32 max_resources,
 388                u32 *req_resource_num, u32 *next)
 389{
 390        unsigned long flags;
 391        u32 resource_num;
 392
 393        spin_lock_irqsave(&nesadapter->resource_lock, flags);
 394
 395        resource_num = find_next_zero_bit(resource_array, max_resources, *next);
 396        if (resource_num >= max_resources) {
 397                resource_num = find_first_zero_bit(resource_array, max_resources);
 398                if (resource_num >= max_resources) {
 399                        printk(KERN_ERR PFX "%s: No available resourcess.\n", __func__);
 400                        spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 401                        return -EMFILE;
 402                }
 403        }
 404        set_bit(resource_num, resource_array);
 405        *next = resource_num+1;
 406        if (*next == max_resources) {
 407                *next = 0;
 408        }
 409        spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 410        *req_resource_num = resource_num;
 411
 412        return 0;
 413}
 414
 415static inline int nes_is_resource_allocated(struct nes_adapter *nesadapter,
 416                unsigned long *resource_array, u32 resource_num)
 417{
 418        unsigned long flags;
 419        int bit_is_set;
 420
 421        spin_lock_irqsave(&nesadapter->resource_lock, flags);
 422
 423        bit_is_set = test_bit(resource_num, resource_array);
 424        nes_debug(NES_DBG_HW, "resource_num %u is%s allocated.\n",
 425                        resource_num, (bit_is_set ? "": " not"));
 426        spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 427
 428        return bit_is_set;
 429}
 430
 431static inline void nes_free_resource(struct nes_adapter *nesadapter,
 432                unsigned long *resource_array, u32 resource_num)
 433{
 434        unsigned long flags;
 435
 436        spin_lock_irqsave(&nesadapter->resource_lock, flags);
 437        clear_bit(resource_num, resource_array);
 438        spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 439}
 440
 441static inline struct nes_vnic *to_nesvnic(struct ib_device *ibdev)
 442{
 443        return container_of(ibdev, struct nes_ib_device, ibdev)->nesvnic;
 444}
 445
 446static inline struct nes_pd *to_nespd(struct ib_pd *ibpd)
 447{
 448        return container_of(ibpd, struct nes_pd, ibpd);
 449}
 450
 451static inline struct nes_ucontext *to_nesucontext(struct ib_ucontext *ibucontext)
 452{
 453        return container_of(ibucontext, struct nes_ucontext, ibucontext);
 454}
 455
 456static inline struct nes_mr *to_nesmr(struct ib_mr *ibmr)
 457{
 458        return container_of(ibmr, struct nes_mr, ibmr);
 459}
 460
 461static inline struct nes_mr *to_nesmr_from_ibfmr(struct ib_fmr *ibfmr)
 462{
 463        return container_of(ibfmr, struct nes_mr, ibfmr);
 464}
 465
 466static inline struct nes_mr *to_nesmw(struct ib_mw *ibmw)
 467{
 468        return container_of(ibmw, struct nes_mr, ibmw);
 469}
 470
 471static inline struct nes_fmr *to_nesfmr(struct nes_mr *nesmr)
 472{
 473        return container_of(nesmr, struct nes_fmr, nesmr);
 474}
 475
 476static inline struct nes_cq *to_nescq(struct ib_cq *ibcq)
 477{
 478        return container_of(ibcq, struct nes_cq, ibcq);
 479}
 480
 481static inline struct nes_qp *to_nesqp(struct ib_qp *ibqp)
 482{
 483        return container_of(ibqp, struct nes_qp, ibqp);
 484}
 485
 486
 487
 488/* nes.c */
 489void nes_add_ref(struct ib_qp *);
 490void nes_rem_ref(struct ib_qp *);
 491struct ib_qp *nes_get_qp(struct ib_device *, int);
 492
 493
 494/* nes_hw.c */
 495struct nes_adapter *nes_init_adapter(struct nes_device *, u8);
 496void  nes_nic_init_timer_defaults(struct nes_device *, u8);
 497void nes_destroy_adapter(struct nes_adapter *);
 498int nes_init_cqp(struct nes_device *);
 499int nes_init_phy(struct nes_device *);
 500int nes_init_nic_qp(struct nes_device *, struct net_device *);
 501void nes_destroy_nic_qp(struct nes_vnic *);
 502int nes_napi_isr(struct nes_device *);
 503void nes_dpc(unsigned long);
 504void nes_nic_ce_handler(struct nes_device *, struct nes_hw_nic_cq *);
 505void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *);
 506int nes_destroy_cqp(struct nes_device *);
 507int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
 508
 509/* nes_nic.c */
 510struct net_device *nes_netdev_init(struct nes_device *, void __iomem *);
 511void nes_netdev_destroy(struct net_device *);
 512int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
 513
 514/* nes_cm.c */
 515void *nes_cm_create(struct net_device *);
 516int nes_cm_recv(struct sk_buff *, struct net_device *);
 517void nes_update_arp(unsigned char *, u32, u32, u16, u16);
 518void nes_manage_arp_cache(struct net_device *, unsigned char *, u32, u32);
 519void nes_sock_release(struct nes_qp *, unsigned long *);
 520void flush_wqes(struct nes_device *nesdev, struct nes_qp *, u32, u32);
 521int nes_manage_apbvt(struct nes_vnic *, u32, u32, u32);
 522int nes_cm_disconn(struct nes_qp *);
 523void nes_cm_disconn_worker(void *);
 524
 525/* nes_verbs.c */
 526int nes_hw_modify_qp(struct nes_device *, struct nes_qp *, u32, u32, u32);
 527int nes_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
 528struct nes_ib_device *nes_init_ofa_device(struct net_device *);
 529void nes_destroy_ofa_device(struct nes_ib_device *);
 530int nes_register_ofa_device(struct nes_ib_device *);
 531
 532/* nes_util.c */
 533int nes_read_eeprom_values(struct nes_device *, struct nes_adapter *);
 534void nes_write_1G_phy_reg(struct nes_device *, u8, u8, u16);
 535void nes_read_1G_phy_reg(struct nes_device *, u8, u8, u16 *);
 536void nes_write_10G_phy_reg(struct nes_device *, u16, u8, u16, u16);
 537void nes_read_10G_phy_reg(struct nes_device *, u8, u8, u16);
 538struct nes_cqp_request *nes_get_cqp_request(struct nes_device *);
 539void nes_free_cqp_request(struct nes_device *nesdev,
 540                          struct nes_cqp_request *cqp_request);
 541void nes_put_cqp_request(struct nes_device *nesdev,
 542                         struct nes_cqp_request *cqp_request);
 543void nes_post_cqp_request(struct nes_device *, struct nes_cqp_request *);
 544int nes_arp_table(struct nes_device *, u32, u8 *, u32);
 545void nes_mh_fix(unsigned long);
 546void nes_clc(unsigned long);
 547void nes_dump_mem(unsigned int, void *, int);
 548u32 nes_crc32(u32, u32, u32, u32, u8 *, u32, u32, u32);
 549
 550#endif  /* __NES_H */
 551