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21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/completion.h>
24#include <linux/delay.h>
25#include <linux/input.h>
26#include <linux/device.h>
27#include <linux/interrupt.h>
28#include <linux/suspend.h>
29#include <linux/slab.h>
30#include <linux/kthread.h>
31#include <linux/freezer.h>
32#include <linux/ucb1400.h>
33
34static int adcsync;
35static int ts_delay = 55;
36static int ts_delay_pressure;
37
38
39static inline void ucb1400_ts_mode_int(struct snd_ac97 *ac97)
40{
41 ucb1400_reg_write(ac97, UCB_TS_CR,
42 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
43 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
44 UCB_TS_CR_MODE_INT);
45}
46
47
48
49
50
51static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400_ts *ucb)
52{
53 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
54 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
55 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
56 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
57 udelay(ts_delay_pressure);
58 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
59}
60
61
62
63
64
65
66
67static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400_ts *ucb)
68{
69 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
70 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
71 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
72 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
73 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
74 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
75 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
76 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
77 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
78
79 udelay(ts_delay);
80
81 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
82}
83
84
85
86
87
88
89
90static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400_ts *ucb)
91{
92 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
93 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
94 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
95 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
96 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
97 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
98 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
99 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
100 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
101
102 udelay(ts_delay);
103
104 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPX, adcsync);
105}
106
107
108
109
110
111static inline unsigned int ucb1400_ts_read_xres(struct ucb1400_ts *ucb)
112{
113 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
114 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
115 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
116 return ucb1400_adc_read(ucb->ac97, 0, adcsync);
117}
118
119
120
121
122
123static inline unsigned int ucb1400_ts_read_yres(struct ucb1400_ts *ucb)
124{
125 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
126 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
127 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
128 return ucb1400_adc_read(ucb->ac97, 0, adcsync);
129}
130
131static inline int ucb1400_ts_pen_up(struct snd_ac97 *ac97)
132{
133 unsigned short val = ucb1400_reg_read(ac97, UCB_TS_CR);
134
135 return val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW);
136}
137
138static inline void ucb1400_ts_irq_enable(struct snd_ac97 *ac97)
139{
140 ucb1400_reg_write(ac97, UCB_IE_CLEAR, UCB_IE_TSPX);
141 ucb1400_reg_write(ac97, UCB_IE_CLEAR, 0);
142 ucb1400_reg_write(ac97, UCB_IE_FAL, UCB_IE_TSPX);
143}
144
145static inline void ucb1400_ts_irq_disable(struct snd_ac97 *ac97)
146{
147 ucb1400_reg_write(ac97, UCB_IE_FAL, 0);
148}
149
150static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
151{
152 input_report_abs(idev, ABS_X, x);
153 input_report_abs(idev, ABS_Y, y);
154 input_report_abs(idev, ABS_PRESSURE, pressure);
155 input_report_key(idev, BTN_TOUCH, 1);
156 input_sync(idev);
157}
158
159static void ucb1400_ts_event_release(struct input_dev *idev)
160{
161 input_report_abs(idev, ABS_PRESSURE, 0);
162 input_report_key(idev, BTN_TOUCH, 0);
163 input_sync(idev);
164}
165
166static void ucb1400_handle_pending_irq(struct ucb1400_ts *ucb)
167{
168 unsigned int isr;
169
170 isr = ucb1400_reg_read(ucb->ac97, UCB_IE_STATUS);
171 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, isr);
172 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
173
174 if (isr & UCB_IE_TSPX)
175 ucb1400_ts_irq_disable(ucb->ac97);
176 else
177 dev_dbg(&ucb->ts_idev->dev, "ucb1400: unexpected IE_STATUS = %#x\n", isr);
178 enable_irq(ucb->irq);
179}
180
181static int ucb1400_ts_thread(void *_ucb)
182{
183 struct ucb1400_ts *ucb = _ucb;
184 struct task_struct *tsk = current;
185 int valid = 0;
186 struct sched_param param = { .sched_priority = 1 };
187
188 sched_setscheduler(tsk, SCHED_FIFO, ¶m);
189
190 set_freezable();
191 while (!kthread_should_stop()) {
192 unsigned int x, y, p;
193 long timeout;
194
195 ucb->ts_restart = 0;
196
197 if (ucb->irq_pending) {
198 ucb->irq_pending = 0;
199 ucb1400_handle_pending_irq(ucb);
200 }
201
202 ucb1400_adc_enable(ucb->ac97);
203 x = ucb1400_ts_read_xpos(ucb);
204 y = ucb1400_ts_read_ypos(ucb);
205 p = ucb1400_ts_read_pressure(ucb);
206 ucb1400_adc_disable(ucb->ac97);
207
208
209 ucb1400_ts_mode_int(ucb->ac97);
210
211 msleep(10);
212
213 if (ucb1400_ts_pen_up(ucb->ac97)) {
214 ucb1400_ts_irq_enable(ucb->ac97);
215
216
217
218
219
220 if (valid) {
221 ucb1400_ts_event_release(ucb->ts_idev);
222 valid = 0;
223 }
224
225 timeout = MAX_SCHEDULE_TIMEOUT;
226 } else {
227 valid = 1;
228 ucb1400_ts_evt_add(ucb->ts_idev, p, x, y);
229 timeout = msecs_to_jiffies(10);
230 }
231
232 wait_event_freezable_timeout(ucb->ts_wait,
233 ucb->irq_pending || ucb->ts_restart ||
234 kthread_should_stop(), timeout);
235 }
236
237
238 if (valid)
239 ucb1400_ts_event_release(ucb->ts_idev);
240
241 ucb->ts_task = NULL;
242 return 0;
243}
244
245
246
247
248
249
250
251
252
253
254
255static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
256{
257 struct ucb1400_ts *ucb = devid;
258
259 if (irqnr == ucb->irq) {
260 disable_irq_nosync(ucb->irq);
261 ucb->irq_pending = 1;
262 wake_up(&ucb->ts_wait);
263 return IRQ_HANDLED;
264 }
265 return IRQ_NONE;
266}
267
268static int ucb1400_ts_open(struct input_dev *idev)
269{
270 struct ucb1400_ts *ucb = input_get_drvdata(idev);
271 int ret = 0;
272
273 BUG_ON(ucb->ts_task);
274
275 ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts");
276 if (IS_ERR(ucb->ts_task)) {
277 ret = PTR_ERR(ucb->ts_task);
278 ucb->ts_task = NULL;
279 }
280
281 return ret;
282}
283
284static void ucb1400_ts_close(struct input_dev *idev)
285{
286 struct ucb1400_ts *ucb = input_get_drvdata(idev);
287
288 if (ucb->ts_task)
289 kthread_stop(ucb->ts_task);
290
291 ucb1400_ts_irq_disable(ucb->ac97);
292 ucb1400_reg_write(ucb->ac97, UCB_TS_CR, 0);
293}
294
295#ifndef NO_IRQ
296#define NO_IRQ 0
297#endif
298
299
300
301
302
303static int ucb1400_ts_detect_irq(struct ucb1400_ts *ucb)
304{
305 unsigned long mask, timeout;
306
307 mask = probe_irq_on();
308
309
310 ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, UCB_IE_ADC);
311 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_ADC);
312 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
313 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
314
315
316 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA);
317 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
318
319
320 timeout = jiffies + HZ/2;
321 while (!(ucb1400_reg_read(ucb->ac97, UCB_ADC_DATA) &
322 UCB_ADC_DAT_VALID)) {
323 cpu_relax();
324 if (time_after(jiffies, timeout)) {
325 printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
326 probe_irq_off(mask);
327 return -ENODEV;
328 }
329 }
330 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, 0);
331
332
333 ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, 0);
334 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0);
335 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
336 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
337
338
339 ucb->irq = probe_irq_off(mask);
340 if (ucb->irq < 0 || ucb->irq == NO_IRQ)
341 return -ENODEV;
342
343 return 0;
344}
345
346static int ucb1400_ts_probe(struct platform_device *dev)
347{
348 int error, x_res, y_res;
349 u16 fcsr;
350 struct ucb1400_ts *ucb = dev->dev.platform_data;
351
352 ucb->ts_idev = input_allocate_device();
353 if (!ucb->ts_idev) {
354 error = -ENOMEM;
355 goto err;
356 }
357
358 error = ucb1400_ts_detect_irq(ucb);
359 if (error) {
360 printk(KERN_ERR "UCB1400: IRQ probe failed\n");
361 goto err_free_devs;
362 }
363
364 init_waitqueue_head(&ucb->ts_wait);
365
366 error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
367 "UCB1400", ucb);
368 if (error) {
369 printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n",
370 ucb->irq, error);
371 goto err_free_devs;
372 }
373 printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);
374
375 input_set_drvdata(ucb->ts_idev, ucb);
376
377 ucb->ts_idev->dev.parent = &dev->dev;
378 ucb->ts_idev->name = "UCB1400 touchscreen interface";
379 ucb->ts_idev->id.vendor = ucb1400_reg_read(ucb->ac97,
380 AC97_VENDOR_ID1);
381 ucb->ts_idev->id.product = ucb->id;
382 ucb->ts_idev->open = ucb1400_ts_open;
383 ucb->ts_idev->close = ucb1400_ts_close;
384 ucb->ts_idev->evbit[0] = BIT_MASK(EV_ABS) | BIT_MASK(EV_KEY);
385 ucb->ts_idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
386
387
388
389
390
391
392 fcsr = ucb1400_reg_read(ucb->ac97, UCB_FCSR);
393 ucb1400_reg_write(ucb->ac97, UCB_FCSR, fcsr | UCB_FCSR_AVE);
394
395 ucb1400_adc_enable(ucb->ac97);
396 x_res = ucb1400_ts_read_xres(ucb);
397 y_res = ucb1400_ts_read_yres(ucb);
398 ucb1400_adc_disable(ucb->ac97);
399 printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);
400
401 input_set_abs_params(ucb->ts_idev, ABS_X, 0, x_res, 0, 0);
402 input_set_abs_params(ucb->ts_idev, ABS_Y, 0, y_res, 0, 0);
403 input_set_abs_params(ucb->ts_idev, ABS_PRESSURE, 0, 0, 0, 0);
404
405 error = input_register_device(ucb->ts_idev);
406 if (error)
407 goto err_free_irq;
408
409 return 0;
410
411err_free_irq:
412 free_irq(ucb->irq, ucb);
413err_free_devs:
414 input_free_device(ucb->ts_idev);
415err:
416 return error;
417
418}
419
420static int ucb1400_ts_remove(struct platform_device *dev)
421{
422 struct ucb1400_ts *ucb = dev->dev.platform_data;
423
424 free_irq(ucb->irq, ucb);
425 input_unregister_device(ucb->ts_idev);
426 return 0;
427}
428
429#ifdef CONFIG_PM
430static int ucb1400_ts_resume(struct platform_device *dev)
431{
432 struct ucb1400_ts *ucb = dev->dev.platform_data;
433
434 if (ucb->ts_task) {
435
436
437
438
439
440 ucb->ts_restart = 1;
441 wake_up(&ucb->ts_wait);
442 }
443 return 0;
444}
445#else
446#define ucb1400_ts_resume NULL
447#endif
448
449static struct platform_driver ucb1400_ts_driver = {
450 .probe = ucb1400_ts_probe,
451 .remove = ucb1400_ts_remove,
452 .resume = ucb1400_ts_resume,
453 .driver = {
454 .name = "ucb1400_ts",
455 },
456};
457
458static int __init ucb1400_ts_init(void)
459{
460 return platform_driver_register(&ucb1400_ts_driver);
461}
462
463static void __exit ucb1400_ts_exit(void)
464{
465 platform_driver_unregister(&ucb1400_ts_driver);
466}
467
468module_param(adcsync, bool, 0444);
469MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin.");
470
471module_param(ts_delay, int, 0444);
472MODULE_PARM_DESC(ts_delay, "Delay between panel setup and"
473 " position read. Default = 55us.");
474
475module_param(ts_delay_pressure, int, 0444);
476MODULE_PARM_DESC(ts_delay_pressure,
477 "delay between panel setup and pressure read."
478 " Default = 0us.");
479
480module_init(ucb1400_ts_init);
481module_exit(ucb1400_ts_exit);
482
483MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
484MODULE_LICENSE("GPL");
485