linux/drivers/isdn/pcbit/layer2.h
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   1/*
   2 * PCBIT-D low-layer interface definitions
   3 *
   4 * Copyright (C) 1996 Universidade de Lisboa
   5 * 
   6 * Written by Pedro Roque Marques (roque@di.fc.ul.pt)
   7 *
   8 * This software may be used and distributed according to the terms of 
   9 * the GNU General Public License, incorporated herein by reference.
  10 */
  11
  12/*
  13 * 19991203 - Fernando Carvalho - takion@superbofh.org
  14 * Hacked to compile with egcs and run with current version of isdn modules
  15*/
  16
  17#ifndef LAYER2_H
  18#define LAYER2_H
  19
  20#include <linux/interrupt.h>
  21
  22#include <asm/byteorder.h>
  23
  24#define BANK1 0x0000U /* PC -> Board */
  25#define BANK2 0x01ffU /* Board -> PC */
  26#define BANK3 0x03feU /* Att Board */
  27#define BANK4 0x03ffU /* Att PC */
  28
  29#define BANKLEN 0x01FFU
  30
  31#define LOAD_ZONE_START 0x03f8U
  32#define LOAD_ZONE_END   0x03fdU
  33
  34#define LOAD_RETRY      18000000
  35
  36
  37
  38/* TAM - XX - C - S  - NUM */
  39#define PREHDR_LEN 8
  40/* TT  - M  - I - TH - TD  */      
  41#define FRAME_HDR_LEN  8   
  42
  43#define MSG_CONN_REQ            0x08000100
  44#define MSG_CONN_CONF           0x00000101
  45#define MSG_CONN_IND            0x00000102
  46#define MSG_CONN_RESP           0x08000103
  47
  48#define MSG_CONN_ACTV_REQ       0x08000300
  49#define MSG_CONN_ACTV_CONF      0x00000301
  50#define MSG_CONN_ACTV_IND       0x00000302
  51#define MSG_CONN_ACTV_RESP      0x08000303
  52
  53#define MSG_DISC_REQ            0x08000400
  54#define MSG_DISC_CONF           0x00000401
  55#define MSG_DISC_IND            0x00000402
  56#define MSG_DISC_RESP           0x08000403
  57
  58#define MSG_TDATA_REQ           0x0908E200
  59#define MSG_TDATA_CONF          0x0000E201
  60#define MSG_TDATA_IND           0x0000E202
  61#define MSG_TDATA_RESP          0x0908E203
  62
  63#define MSG_SELP_REQ            0x09004000
  64#define MSG_SELP_CONF           0x00004001
  65
  66#define MSG_ACT_TRANSP_REQ      0x0908E000
  67#define MSG_ACT_TRANSP_CONF     0x0000E001
  68
  69#define MSG_STPROT_REQ          0x09004100
  70#define MSG_STPROT_CONF         0x00004101
  71
  72#define MSG_PING188_REQ         0x09030500
  73#define MSG_PING188_CONF        0x000005bc
  74
  75#define MSG_WATCH188            0x09030400
  76
  77#define MSG_API_ON              0x08020102
  78#define MSG_POOL_PCBIT          0x08020400
  79#define MSG_POOL_PCBIT_CONF     0x00000401
  80
  81#define MSG_INFO_IND            0x00002602
  82#define MSG_INFO_RESP           0x08002603
  83
  84#define MSG_DEBUG_188           0x0000ff00
  85
  86/*
  87   
  88   long  4 3 2 1
  89   Intel 1 2 3 4
  90*/
  91
  92#ifdef __LITTLE_ENDIAN
  93#define SET_MSG_SCMD(msg, ch)   (msg = (msg & 0xffffff00) | (((ch) & 0xff)))
  94#define SET_MSG_CMD(msg, ch)    (msg = (msg & 0xffff00ff) | (((ch) & 0xff) << 8))
  95#define SET_MSG_PROC(msg, ch)   (msg = (msg & 0xff00ffff) | (((ch) & 0xff) << 16))
  96#define SET_MSG_CPU(msg, ch)    (msg = (msg & 0x00ffffff) | (((ch) & 0xff) << 24))
  97
  98#define GET_MSG_SCMD(msg)       ((msg) & 0xFF)
  99#define GET_MSG_CMD(msg)        ((msg) >> 8 & 0xFF)
 100#define GET_MSG_PROC(msg)       ((msg) >> 16 & 0xFF)
 101#define GET_MSG_CPU(msg)        ((msg) >> 24)
 102
 103#else
 104#error "Non-Intel CPU"
 105#endif
 106
 107#define MAX_QUEUED 7
 108
 109#define SCHED_READ    0x01
 110#define SCHED_WRITE   0x02
 111
 112#define SET_RUN_TIMEOUT 2*HZ /* 2 seconds */
 113     
 114struct frame_buf {
 115        ulong msg;
 116        unsigned int refnum;
 117        unsigned int dt_len;
 118        unsigned int hdr_len;
 119        struct sk_buff *skb;
 120        unsigned int copied;
 121        struct frame_buf * next;
 122};
 123
 124extern int pcbit_l2_write(struct pcbit_dev * dev, ulong msg, ushort refnum, 
 125                          struct sk_buff *skb, unsigned short hdr_len);
 126
 127extern irqreturn_t pcbit_irq_handler(int interrupt, void *);
 128
 129extern struct pcbit_dev * dev_pcbit[MAX_PCBIT_CARDS];
 130
 131#ifdef DEBUG
 132static __inline__ void log_state(struct pcbit_dev *dev) {
 133        printk(KERN_DEBUG "writeptr = %ld\n", 
 134               (ulong) (dev->writeptr - dev->sh_mem));
 135        printk(KERN_DEBUG "readptr  = %ld\n", 
 136               (ulong) (dev->readptr - (dev->sh_mem + BANK2)));
 137        printk(KERN_DEBUG "{rcv_seq=%01x, send_seq=%01x, unack_seq=%01x}\n", 
 138               dev->rcv_seq, dev->send_seq, dev->unack_seq);
 139}
 140#endif
 141
 142static __inline__ struct pcbit_dev * chan2dev(struct pcbit_chan * chan) 
 143{
 144        struct pcbit_dev * dev;
 145        int i;
 146
 147
 148        for (i=0; i<MAX_PCBIT_CARDS; i++)
 149                if ((dev=dev_pcbit[i]))
 150                        if (dev->b1 == chan || dev->b2 == chan)
 151                                return dev;
 152        return NULL;
 153
 154}
 155
 156static __inline__ struct pcbit_dev * finddev(int id)
 157{
 158  struct pcbit_dev * dev;
 159  int i;
 160
 161  for (i=0; i<MAX_PCBIT_CARDS; i++)
 162    if ((dev=dev_pcbit[i]))
 163      if (dev->id == id)
 164        return dev;
 165  return NULL;
 166}
 167
 168
 169/*
 170 *  Support routines for reading and writing in the board
 171 */
 172
 173static __inline__ void pcbit_writeb(struct pcbit_dev *dev, unsigned char dt)
 174{
 175  writeb(dt, dev->writeptr++);
 176  if (dev->writeptr == dev->sh_mem + BANKLEN)
 177    dev->writeptr = dev->sh_mem;
 178}
 179
 180static __inline__ void pcbit_writew(struct pcbit_dev *dev, unsigned short dt)
 181{
 182  int dist;
 183
 184  dist = BANKLEN - (dev->writeptr - dev->sh_mem);
 185  switch (dist) {
 186  case 2:
 187    writew(dt, dev->writeptr);
 188    dev->writeptr = dev->sh_mem;
 189    break;
 190  case 1:
 191    writeb((u_char) (dt & 0x00ffU), dev->writeptr);    
 192    dev->writeptr = dev->sh_mem;
 193    writeb((u_char) (dt >> 8), dev->writeptr++);    
 194    break;
 195  default:
 196    writew(dt, dev->writeptr);
 197    dev->writeptr += 2;
 198    break;
 199  };
 200}
 201
 202static __inline__ void memcpy_topcbit(struct pcbit_dev * dev, u_char * data, 
 203                                      int len)
 204{
 205  int diff;
 206
 207  diff = len - (BANKLEN - (dev->writeptr - dev->sh_mem) );
 208
 209  if (diff > 0)
 210    {
 211      memcpy_toio(dev->writeptr, data, len - diff);
 212      memcpy_toio(dev->sh_mem, data + (len - diff), diff);
 213      dev->writeptr = dev->sh_mem + diff;
 214    }
 215  else
 216    {
 217      memcpy_toio(dev->writeptr, data, len);
 218
 219      dev->writeptr += len;
 220      if (diff == 0)
 221        dev->writeptr = dev->sh_mem;
 222    }
 223}
 224
 225static __inline__ unsigned char pcbit_readb(struct pcbit_dev *dev)
 226{
 227  unsigned char val;
 228
 229  val = readb(dev->readptr++);
 230  if (dev->readptr == dev->sh_mem + BANK2 + BANKLEN)
 231    dev->readptr = dev->sh_mem + BANK2;
 232
 233  return val;
 234}
 235
 236static __inline__ unsigned short pcbit_readw(struct pcbit_dev *dev)
 237{
 238  int dist;
 239  unsigned short val;
 240
 241  dist = BANKLEN - ( dev->readptr - (dev->sh_mem + BANK2 ) );
 242  switch (dist) {
 243  case 2:
 244    val = readw(dev->readptr);
 245    dev->readptr = dev->sh_mem + BANK2;
 246    break;
 247  case 1:
 248    val = readb(dev->readptr);
 249    dev->readptr = dev->sh_mem + BANK2;
 250    val = (readb(dev->readptr++) << 8) | val;
 251    break;
 252  default:
 253    val = readw(dev->readptr);
 254    dev->readptr += 2;
 255    break;
 256  };
 257  return val;
 258}
 259
 260static __inline__ void memcpy_frompcbit(struct pcbit_dev * dev, u_char * data, int len)
 261{
 262  int diff;
 263
 264  diff = len - (BANKLEN - (dev->readptr - (dev->sh_mem + BANK2) ) ); 
 265  if (diff > 0)
 266    {
 267      memcpy_fromio(data, dev->readptr, len - diff);
 268      memcpy_fromio(data + (len - diff), dev->sh_mem + BANK2 , diff);
 269      dev->readptr = dev->sh_mem + BANK2 + diff;
 270    }
 271  else
 272    {
 273      memcpy_fromio(data, dev->readptr, len);
 274      dev->readptr += len;
 275      if (diff == 0)
 276        dev->readptr = dev->sh_mem + BANK2;
 277    }
 278}
 279
 280
 281#endif
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