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25#include "cx18-driver.h"
26#include "cx18-io.h"
27#include "cx18-fileops.h"
28#include "cx18-mailbox.h"
29#include "cx18-i2c.h"
30#include "cx18-queue.h"
31#include "cx18-ioctl.h"
32#include "cx18-streams.h"
33#include "cx18-cards.h"
34#include "cx18-scb.h"
35#include "cx18-dvb.h"
36
37#define CX18_DSP0_INTERRUPT_MASK 0xd0004C
38
39static struct v4l2_file_operations cx18_v4l2_enc_fops = {
40 .owner = THIS_MODULE,
41 .read = cx18_v4l2_read,
42 .open = cx18_v4l2_open,
43
44 .ioctl = cx18_v4l2_ioctl,
45 .release = cx18_v4l2_close,
46 .poll = cx18_v4l2_enc_poll,
47};
48
49
50#define CX18_V4L2_ENC_TS_OFFSET 16
51
52#define CX18_V4L2_ENC_PCM_OFFSET 24
53
54#define CX18_V4L2_ENC_YUV_OFFSET 32
55
56static struct {
57 const char *name;
58 int vfl_type;
59 int num_offset;
60 int dma;
61 enum v4l2_buf_type buf_type;
62} cx18_stream_info[] = {
63 {
64 "encoder MPEG",
65 VFL_TYPE_GRABBER, 0,
66 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
67 },
68 {
69 "TS",
70 VFL_TYPE_GRABBER, -1,
71 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
72 },
73 {
74 "encoder YUV",
75 VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
76 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
77 },
78 {
79 "encoder VBI",
80 VFL_TYPE_VBI, 0,
81 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
82 },
83 {
84 "encoder PCM audio",
85 VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
86 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
87 },
88 {
89 "encoder IDX",
90 VFL_TYPE_GRABBER, -1,
91 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
92 },
93 {
94 "encoder radio",
95 VFL_TYPE_RADIO, 0,
96 PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
97 },
98};
99
100static void cx18_stream_init(struct cx18 *cx, int type)
101{
102 struct cx18_stream *s = &cx->streams[type];
103 struct video_device *video_dev = s->video_dev;
104
105
106 memset(s, 0, sizeof(*s));
107 s->video_dev = video_dev;
108
109
110 s->cx = cx;
111 s->type = type;
112 s->name = cx18_stream_info[type].name;
113 s->handle = CX18_INVALID_TASK_HANDLE;
114
115 s->dma = cx18_stream_info[type].dma;
116 s->buffers = cx->stream_buffers[type];
117 s->buf_size = cx->stream_buf_size[type];
118
119 init_waitqueue_head(&s->waitq);
120 s->id = -1;
121 spin_lock_init(&s->q_free.lock);
122 cx18_queue_init(&s->q_free);
123 spin_lock_init(&s->q_busy.lock);
124 cx18_queue_init(&s->q_busy);
125 spin_lock_init(&s->q_full.lock);
126 cx18_queue_init(&s->q_full);
127
128 INIT_WORK(&s->out_work_order, cx18_out_work_handler);
129}
130
131static int cx18_prep_dev(struct cx18 *cx, int type)
132{
133 struct cx18_stream *s = &cx->streams[type];
134 u32 cap = cx->v4l2_cap;
135 int num_offset = cx18_stream_info[type].num_offset;
136 int num = cx->instance + cx18_first_minor + num_offset;
137
138
139
140
141 s->video_dev = NULL;
142 s->cx = cx;
143 s->type = type;
144 s->name = cx18_stream_info[type].name;
145
146
147 if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
148 return 0;
149
150
151 if (type == CX18_ENC_STREAM_TYPE_VBI &&
152 !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
153 return 0;
154
155
156
157 if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
158 cx->stream_buffers[type] == 0) {
159 CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
160 return 0;
161 }
162
163 cx18_stream_init(cx, type);
164
165 if (num_offset == -1)
166 return 0;
167
168
169 s->video_dev = video_device_alloc();
170 if (s->video_dev == NULL) {
171 CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
172 s->name);
173 return -ENOMEM;
174 }
175
176 snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
177 cx->v4l2_dev.name, s->name);
178
179 s->video_dev->num = num;
180 s->video_dev->v4l2_dev = &cx->v4l2_dev;
181 s->video_dev->fops = &cx18_v4l2_enc_fops;
182 s->video_dev->release = video_device_release;
183 s->video_dev->tvnorms = V4L2_STD_ALL;
184 cx18_set_funcs(s->video_dev);
185 return 0;
186}
187
188
189int cx18_streams_setup(struct cx18 *cx)
190{
191 int type, ret;
192
193
194 for (type = 0; type < CX18_MAX_STREAMS; type++) {
195
196 ret = cx18_prep_dev(cx, type);
197 if (ret < 0)
198 break;
199
200
201 ret = cx18_stream_alloc(&cx->streams[type]);
202 if (ret < 0)
203 break;
204 }
205 if (type == CX18_MAX_STREAMS)
206 return 0;
207
208
209 cx18_streams_cleanup(cx, 0);
210 return ret;
211}
212
213static int cx18_reg_dev(struct cx18 *cx, int type)
214{
215 struct cx18_stream *s = &cx->streams[type];
216 int vfl_type = cx18_stream_info[type].vfl_type;
217 int num, ret;
218
219
220
221
222 if (strcmp("TS", s->name) == 0) {
223
224 if ((cx->card->hw_all & CX18_HW_DVB) == 0)
225 return 0;
226 ret = cx18_dvb_register(s);
227 if (ret < 0) {
228 CX18_ERR("DVB failed to register\n");
229 return ret;
230 }
231 }
232
233 if (s->video_dev == NULL)
234 return 0;
235
236 num = s->video_dev->num;
237
238 if (type != CX18_ENC_STREAM_TYPE_MPG) {
239 struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
240
241 if (s_mpg->video_dev)
242 num = s_mpg->video_dev->num
243 + cx18_stream_info[type].num_offset;
244 }
245 video_set_drvdata(s->video_dev, s);
246
247
248 ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
249 if (ret < 0) {
250 CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
251 s->name, num);
252 video_device_release(s->video_dev);
253 s->video_dev = NULL;
254 return ret;
255 }
256 num = s->video_dev->num;
257
258 switch (vfl_type) {
259 case VFL_TYPE_GRABBER:
260 CX18_INFO("Registered device video%d for %s (%d x %d kB)\n",
261 num, s->name, cx->stream_buffers[type],
262 cx->stream_buf_size[type]/1024);
263 break;
264
265 case VFL_TYPE_RADIO:
266 CX18_INFO("Registered device radio%d for %s\n",
267 num, s->name);
268 break;
269
270 case VFL_TYPE_VBI:
271 if (cx->stream_buffers[type])
272 CX18_INFO("Registered device vbi%d for %s "
273 "(%d x %d bytes)\n",
274 num, s->name, cx->stream_buffers[type],
275 cx->stream_buf_size[type]);
276 else
277 CX18_INFO("Registered device vbi%d for %s\n",
278 num, s->name);
279 break;
280 }
281
282 return 0;
283}
284
285
286int cx18_streams_register(struct cx18 *cx)
287{
288 int type;
289 int err;
290 int ret = 0;
291
292
293 for (type = 0; type < CX18_MAX_STREAMS; type++) {
294 err = cx18_reg_dev(cx, type);
295 if (err && ret == 0)
296 ret = err;
297 }
298
299 if (ret == 0)
300 return 0;
301
302
303 cx18_streams_cleanup(cx, 1);
304 return ret;
305}
306
307
308void cx18_streams_cleanup(struct cx18 *cx, int unregister)
309{
310 struct video_device *vdev;
311 int type;
312
313
314 for (type = 0; type < CX18_MAX_STREAMS; type++) {
315 if (cx->streams[type].dvb.enabled) {
316 cx18_dvb_unregister(&cx->streams[type]);
317 cx->streams[type].dvb.enabled = false;
318 }
319
320 vdev = cx->streams[type].video_dev;
321
322 cx->streams[type].video_dev = NULL;
323 if (vdev == NULL)
324 continue;
325
326 cx18_stream_free(&cx->streams[type]);
327
328
329 if (unregister)
330 video_unregister_device(vdev);
331 else
332 video_device_release(vdev);
333 }
334}
335
336static void cx18_vbi_setup(struct cx18_stream *s)
337{
338 struct cx18 *cx = s->cx;
339 int raw = cx18_raw_vbi(cx);
340 u32 data[CX2341X_MBOX_MAX_DATA];
341 int lines;
342
343 if (cx->is_60hz) {
344 cx->vbi.count = 12;
345 cx->vbi.start[0] = 10;
346 cx->vbi.start[1] = 273;
347 } else {
348 cx->vbi.count = 18;
349 cx->vbi.start[0] = 6;
350 cx->vbi.start[1] = 318;
351 }
352
353
354 v4l2_subdev_call(cx->sd_av, video, s_fmt, &cx->vbi.in);
355
356
357
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359
360
361
362
363
364 if (raw) {
365 lines = cx->vbi.count * 2;
366 } else {
367
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379
380
381 lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
382 }
383
384 data[0] = s->handle;
385
386 data[1] = (lines / 2) | ((lines / 2) << 16);
387
388 data[2] = (raw ? vbi_active_samples
389 : (cx->is_60hz ? vbi_hblank_samples_60Hz
390 : vbi_hblank_samples_50Hz));
391
392
393 data[3] = 1;
394
395
396
397
398 if (raw) {
399
400
401
402
403
404 data[4] = 0x20602060;
405
406
407
408
409
410
411
412 data[5] = 0x307090d0;
413 } else {
414
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425
426
427
428 data[4] = 0xB0F0B0F0;
429
430
431
432
433
434 data[5] = 0xA0E0A0E0;
435 }
436
437 CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
438 data[0], data[1], data[2], data[3], data[4], data[5]);
439
440 cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
441}
442
443static
444struct cx18_queue *_cx18_stream_put_buf_fw(struct cx18_stream *s,
445 struct cx18_buffer *buf)
446{
447 struct cx18 *cx = s->cx;
448 struct cx18_queue *q;
449
450
451 if (s->handle == CX18_INVALID_TASK_HANDLE ||
452 test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
453 !test_bit(CX18_F_S_STREAMING, &s->s_flags))
454 return cx18_enqueue(s, buf, &s->q_free);
455
456 q = cx18_enqueue(s, buf, &s->q_busy);
457 if (q != &s->q_busy)
458 return q;
459
460 cx18_buf_sync_for_device(s, buf);
461 cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
462 (void __iomem *) &cx->scb->cpu_mdl[buf->id] - cx->enc_mem,
463 1, buf->id, s->buf_size);
464 return q;
465}
466
467static
468void _cx18_stream_load_fw_queue(struct cx18_stream *s)
469{
470 struct cx18_queue *q;
471 struct cx18_buffer *buf;
472
473 if (atomic_read(&s->q_free.buffers) == 0 ||
474 atomic_read(&s->q_busy.buffers) >= CX18_MAX_FW_MDLS_PER_STREAM)
475 return;
476
477
478 do {
479 buf = cx18_dequeue(s, &s->q_free);
480 if (buf == NULL)
481 break;
482 q = _cx18_stream_put_buf_fw(s, buf);
483 } while (atomic_read(&s->q_busy.buffers) < CX18_MAX_FW_MDLS_PER_STREAM
484 && q == &s->q_busy);
485}
486
487void cx18_out_work_handler(struct work_struct *work)
488{
489 struct cx18_stream *s =
490 container_of(work, struct cx18_stream, out_work_order);
491
492 _cx18_stream_load_fw_queue(s);
493}
494
495int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
496{
497 u32 data[MAX_MB_ARGUMENTS];
498 struct cx18 *cx = s->cx;
499 struct cx18_buffer *buf;
500 int captype = 0;
501 struct cx18_api_func_private priv;
502
503 if (s->video_dev == NULL && s->dvb.enabled == 0)
504 return -EINVAL;
505
506 CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
507
508 switch (s->type) {
509 case CX18_ENC_STREAM_TYPE_MPG:
510 captype = CAPTURE_CHANNEL_TYPE_MPEG;
511 cx->mpg_data_received = cx->vbi_data_inserted = 0;
512 cx->dualwatch_jiffies = jiffies;
513 cx->dualwatch_stereo_mode = cx->params.audio_properties & 0x300;
514 cx->search_pack_header = 0;
515 break;
516
517 case CX18_ENC_STREAM_TYPE_TS:
518 captype = CAPTURE_CHANNEL_TYPE_TS;
519 break;
520 case CX18_ENC_STREAM_TYPE_YUV:
521 captype = CAPTURE_CHANNEL_TYPE_YUV;
522 break;
523 case CX18_ENC_STREAM_TYPE_PCM:
524 captype = CAPTURE_CHANNEL_TYPE_PCM;
525 break;
526 case CX18_ENC_STREAM_TYPE_VBI:
527#ifdef CX18_ENCODER_PARSES_SLICED
528 captype = cx18_raw_vbi(cx) ?
529 CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
530#else
531
532
533
534
535 captype = CAPTURE_CHANNEL_TYPE_VBI;
536#endif
537 cx->vbi.frame = 0;
538 cx->vbi.inserted_frame = 0;
539 memset(cx->vbi.sliced_mpeg_size,
540 0, sizeof(cx->vbi.sliced_mpeg_size));
541 break;
542 default:
543 return -EINVAL;
544 }
545
546
547 clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
548
549 cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
550 s->handle = data[0];
551 cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
552
553
554
555
556
557
558
559
560
561
562
563
564 if (captype != CAPTURE_CHANNEL_TYPE_TS) {
565 cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
566 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
567 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
568 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
569
570
571
572
573
574 if (atomic_read(&cx->ana_capturing) == 0)
575 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
576 s->handle, 12);
577
578
579
580
581
582
583
584 cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
585 s->handle, 312, 313);
586
587 if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
588 cx18_vbi_setup(s);
589
590
591
592
593
594
595 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 1, 0);
596
597
598 priv.cx = cx;
599 priv.s = s;
600 cx2341x_update(&priv, cx18_api_func, NULL, &cx->params);
601
602
603
604
605
606 if (!cx->params.video_mute &&
607 test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
608 cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
609 (cx->params.video_mute_yuv << 8) | 1);
610 }
611
612 if (atomic_read(&cx->tot_capturing) == 0) {
613 clear_bit(CX18_F_I_EOS, &cx->i_flags);
614 cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
615 }
616
617 cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
618 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
619 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
620
621
622 cx18_flush_queues(s);
623 spin_lock(&s->q_free.lock);
624 list_for_each_entry(buf, &s->q_free.list, list) {
625 cx18_writel(cx, buf->dma_handle,
626 &cx->scb->cpu_mdl[buf->id].paddr);
627 cx18_writel(cx, s->buf_size, &cx->scb->cpu_mdl[buf->id].length);
628 }
629 spin_unlock(&s->q_free.lock);
630 _cx18_stream_load_fw_queue(s);
631
632
633 if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
634 CX18_DEBUG_WARN("Error starting capture!\n");
635
636 set_bit(CX18_F_S_STOPPING, &s->s_flags);
637 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
638 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
639 else
640 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
641 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
642
643 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
644 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
645 s->handle = CX18_INVALID_TASK_HANDLE;
646 clear_bit(CX18_F_S_STOPPING, &s->s_flags);
647 if (atomic_read(&cx->tot_capturing) == 0) {
648 set_bit(CX18_F_I_EOS, &cx->i_flags);
649 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
650 }
651 return -EINVAL;
652 }
653
654
655 if (captype != CAPTURE_CHANNEL_TYPE_TS)
656 atomic_inc(&cx->ana_capturing);
657 atomic_inc(&cx->tot_capturing);
658 return 0;
659}
660
661void cx18_stop_all_captures(struct cx18 *cx)
662{
663 int i;
664
665 for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
666 struct cx18_stream *s = &cx->streams[i];
667
668 if (s->video_dev == NULL && s->dvb.enabled == 0)
669 continue;
670 if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
671 cx18_stop_v4l2_encode_stream(s, 0);
672 }
673}
674
675int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
676{
677 struct cx18 *cx = s->cx;
678 unsigned long then;
679
680 if (s->video_dev == NULL && s->dvb.enabled == 0)
681 return -EINVAL;
682
683
684
685
686 CX18_DEBUG_INFO("Stop Capture\n");
687
688 if (atomic_read(&cx->tot_capturing) == 0)
689 return 0;
690
691 set_bit(CX18_F_S_STOPPING, &s->s_flags);
692 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
693 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
694 else
695 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
696
697 then = jiffies;
698
699 if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
700 CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
701 }
702
703 if (s->type != CX18_ENC_STREAM_TYPE_TS)
704 atomic_dec(&cx->ana_capturing);
705 atomic_dec(&cx->tot_capturing);
706
707
708 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
709
710
711 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
712
713 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
714 s->handle = CX18_INVALID_TASK_HANDLE;
715 clear_bit(CX18_F_S_STOPPING, &s->s_flags);
716
717 if (atomic_read(&cx->tot_capturing) > 0)
718 return 0;
719
720 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
721 wake_up(&s->waitq);
722
723 return 0;
724}
725
726u32 cx18_find_handle(struct cx18 *cx)
727{
728 int i;
729
730
731 for (i = 0; i < CX18_MAX_STREAMS; i++) {
732 struct cx18_stream *s = &cx->streams[i];
733
734 if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
735 return s->handle;
736 }
737 return CX18_INVALID_TASK_HANDLE;
738}
739
740struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
741{
742 int i;
743 struct cx18_stream *s;
744
745 if (handle == CX18_INVALID_TASK_HANDLE)
746 return NULL;
747
748 for (i = 0; i < CX18_MAX_STREAMS; i++) {
749 s = &cx->streams[i];
750 if (s->handle != handle)
751 continue;
752 if (s->video_dev || s->dvb.enabled)
753 return s;
754 }
755 return NULL;
756}
757