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20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/mii.h>
23#include <linux/netdevice.h>
24#include <linux/etherdevice.h>
25#include <linux/skbuff.h>
26#include <linux/dma-mapping.h>
27#include <linux/ethtool.h>
28#include <linux/platform_device.h>
29#include <linux/clk.h>
30
31#include <asm/io.h>
32#include <asm/uaccess.h>
33#include <asm/mach-types.h>
34
35#include <mach/at91rm9200_emac.h>
36#include <mach/gpio.h>
37#include <mach/board.h>
38
39#include "at91_ether.h"
40
41#define DRV_NAME "at91_ether"
42#define DRV_VERSION "1.0"
43
44#define LINK_POLL_INTERVAL (HZ)
45
46
47
48
49
50
51static inline unsigned long at91_emac_read(unsigned int reg)
52{
53 void __iomem *emac_base = (void __iomem *)AT91_VA_BASE_EMAC;
54
55 return __raw_readl(emac_base + reg);
56}
57
58
59
60
61static inline void at91_emac_write(unsigned int reg, unsigned long value)
62{
63 void __iomem *emac_base = (void __iomem *)AT91_VA_BASE_EMAC;
64
65 __raw_writel(value, emac_base + reg);
66}
67
68
69
70
71
72
73
74
75static void enable_mdi(void)
76{
77 unsigned long ctl;
78
79 ctl = at91_emac_read(AT91_EMAC_CTL);
80 at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_MPE);
81}
82
83
84
85
86static void disable_mdi(void)
87{
88 unsigned long ctl;
89
90 ctl = at91_emac_read(AT91_EMAC_CTL);
91 at91_emac_write(AT91_EMAC_CTL, ctl & ~AT91_EMAC_MPE);
92}
93
94
95
96
97static inline void at91_phy_wait(void) {
98 unsigned long timeout = jiffies + 2;
99
100 while (!(at91_emac_read(AT91_EMAC_SR) & AT91_EMAC_SR_IDLE)) {
101 if (time_after(jiffies, timeout)) {
102 printk("at91_ether: MIO timeout\n");
103 break;
104 }
105 cpu_relax();
106 }
107}
108
109
110
111
112
113static void write_phy(unsigned char phy_addr, unsigned char address, unsigned int value)
114{
115 at91_emac_write(AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_W
116 | ((phy_addr & 0x1f) << 23) | (address << 18) | (value & AT91_EMAC_DATA));
117
118
119 at91_phy_wait();
120}
121
122
123
124
125
126static void read_phy(unsigned char phy_addr, unsigned char address, unsigned int *value)
127{
128 at91_emac_write(AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_R
129 | ((phy_addr & 0x1f) << 23) | (address << 18));
130
131
132 at91_phy_wait();
133
134 *value = at91_emac_read(AT91_EMAC_MAN) & AT91_EMAC_DATA;
135}
136
137
138
139
140
141
142
143
144static void update_linkspeed(struct net_device *dev, int silent)
145{
146 struct at91_private *lp = netdev_priv(dev);
147 unsigned int bmsr, bmcr, lpa, mac_cfg;
148 unsigned int speed, duplex;
149
150 if (!mii_link_ok(&lp->mii)) {
151 netif_carrier_off(dev);
152 if (!silent)
153 printk(KERN_INFO "%s: Link down.\n", dev->name);
154 return;
155 }
156
157
158 read_phy(lp->phy_address, MII_BMSR, &bmsr);
159 read_phy(lp->phy_address, MII_BMCR, &bmcr);
160 if (bmcr & BMCR_ANENABLE) {
161 if (!(bmsr & BMSR_ANEGCOMPLETE))
162 return;
163
164 read_phy(lp->phy_address, MII_LPA, &lpa);
165 if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF)) speed = SPEED_100;
166 else speed = SPEED_10;
167 if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL)) duplex = DUPLEX_FULL;
168 else duplex = DUPLEX_HALF;
169 } else {
170 speed = (bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10;
171 duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
172 }
173
174
175 mac_cfg = at91_emac_read(AT91_EMAC_CFG) & ~(AT91_EMAC_SPD | AT91_EMAC_FD);
176 if (speed == SPEED_100) {
177 if (duplex == DUPLEX_FULL)
178 mac_cfg |= AT91_EMAC_SPD | AT91_EMAC_FD;
179 else
180 mac_cfg |= AT91_EMAC_SPD;
181 } else {
182 if (duplex == DUPLEX_FULL)
183 mac_cfg |= AT91_EMAC_FD;
184 else {}
185 }
186 at91_emac_write(AT91_EMAC_CFG, mac_cfg);
187
188 if (!silent)
189 printk(KERN_INFO "%s: Link now %i-%s\n", dev->name, speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex");
190 netif_carrier_on(dev);
191}
192
193
194
195
196static irqreturn_t at91ether_phy_interrupt(int irq, void *dev_id)
197{
198 struct net_device *dev = (struct net_device *) dev_id;
199 struct at91_private *lp = netdev_priv(dev);
200 unsigned int phy;
201
202
203
204
205
206
207 enable_mdi();
208 if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) {
209 read_phy(lp->phy_address, MII_DSINTR_REG, &phy);
210 if (!(phy & (1 << 0)))
211 goto done;
212 }
213 else if (lp->phy_type == MII_LXT971A_ID) {
214 read_phy(lp->phy_address, MII_ISINTS_REG, &phy);
215 if (!(phy & (1 << 2)))
216 goto done;
217 }
218 else if (lp->phy_type == MII_BCM5221_ID) {
219 read_phy(lp->phy_address, MII_BCMINTR_REG, &phy);
220 if (!(phy & (1 << 0)))
221 goto done;
222 }
223 else if (lp->phy_type == MII_KS8721_ID) {
224 read_phy(lp->phy_address, MII_TPISTATUS, &phy);
225 if (!(phy & ((1 << 2) | 1)))
226 goto done;
227 }
228 else if (lp->phy_type == MII_T78Q21x3_ID) {
229 read_phy(lp->phy_address, MII_T78Q21INT_REG, &phy);
230 if (!(phy & ((1 << 2) | 1)))
231 goto done;
232 }
233 else if (lp->phy_type == MII_DP83848_ID) {
234 read_phy(lp->phy_address, MII_DPPHYSTS_REG, &phy);
235 if (!(phy & (1 << 7)))
236 goto done;
237 }
238
239 update_linkspeed(dev, 0);
240
241done:
242 disable_mdi();
243
244 return IRQ_HANDLED;
245}
246
247
248
249
250static void enable_phyirq(struct net_device *dev)
251{
252 struct at91_private *lp = netdev_priv(dev);
253 unsigned int dsintr, irq_number;
254 int status;
255
256 irq_number = lp->board_data.phy_irq_pin;
257 if (!irq_number) {
258
259
260
261
262 mod_timer(&lp->check_timer, jiffies + LINK_POLL_INTERVAL);
263 return;
264 }
265
266 status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev);
267 if (status) {
268 printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status);
269 return;
270 }
271
272 spin_lock_irq(&lp->lock);
273 enable_mdi();
274
275 if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) {
276 read_phy(lp->phy_address, MII_DSINTR_REG, &dsintr);
277 dsintr = dsintr & ~0xf00;
278 write_phy(lp->phy_address, MII_DSINTR_REG, dsintr);
279 }
280 else if (lp->phy_type == MII_LXT971A_ID) {
281 read_phy(lp->phy_address, MII_ISINTE_REG, &dsintr);
282 dsintr = dsintr | 0xf2;
283 write_phy(lp->phy_address, MII_ISINTE_REG, dsintr);
284 }
285 else if (lp->phy_type == MII_BCM5221_ID) {
286 dsintr = (1 << 15) | ( 1 << 14);
287 write_phy(lp->phy_address, MII_BCMINTR_REG, dsintr);
288 }
289 else if (lp->phy_type == MII_KS8721_ID) {
290 dsintr = (1 << 10) | ( 1 << 8);
291 write_phy(lp->phy_address, MII_TPISTATUS, dsintr);
292 }
293 else if (lp->phy_type == MII_T78Q21x3_ID) {
294 read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr);
295 dsintr = dsintr | 0x500;
296 write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr);
297 }
298 else if (lp->phy_type == MII_DP83848_ID) {
299 read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr);
300 dsintr = dsintr | 0x3c;
301 write_phy(lp->phy_address, MII_DPMISR_REG, dsintr);
302 read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr);
303 dsintr = dsintr | 0x3;
304 write_phy(lp->phy_address, MII_DPMICR_REG, dsintr);
305 }
306
307 disable_mdi();
308 spin_unlock_irq(&lp->lock);
309}
310
311
312
313
314static void disable_phyirq(struct net_device *dev)
315{
316 struct at91_private *lp = netdev_priv(dev);
317 unsigned int dsintr;
318 unsigned int irq_number;
319
320 irq_number = lp->board_data.phy_irq_pin;
321 if (!irq_number) {
322 del_timer_sync(&lp->check_timer);
323 return;
324 }
325
326 spin_lock_irq(&lp->lock);
327 enable_mdi();
328
329 if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) {
330 read_phy(lp->phy_address, MII_DSINTR_REG, &dsintr);
331 dsintr = dsintr | 0xf00;
332 write_phy(lp->phy_address, MII_DSINTR_REG, dsintr);
333 }
334 else if (lp->phy_type == MII_LXT971A_ID) {
335 read_phy(lp->phy_address, MII_ISINTE_REG, &dsintr);
336 dsintr = dsintr & ~0xf2;
337 write_phy(lp->phy_address, MII_ISINTE_REG, dsintr);
338 }
339 else if (lp->phy_type == MII_BCM5221_ID) {
340 read_phy(lp->phy_address, MII_BCMINTR_REG, &dsintr);
341 dsintr = ~(1 << 14);
342 write_phy(lp->phy_address, MII_BCMINTR_REG, dsintr);
343 }
344 else if (lp->phy_type == MII_KS8721_ID) {
345 read_phy(lp->phy_address, MII_TPISTATUS, &dsintr);
346 dsintr = ~((1 << 10) | (1 << 8));
347 write_phy(lp->phy_address, MII_TPISTATUS, dsintr);
348 }
349 else if (lp->phy_type == MII_T78Q21x3_ID) {
350 read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr);
351 dsintr = dsintr & ~0x500;
352 write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr);
353 }
354 else if (lp->phy_type == MII_DP83848_ID) {
355 read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr);
356 dsintr = dsintr & ~0x3;
357 write_phy(lp->phy_address, MII_DPMICR_REG, dsintr);
358 read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr);
359 dsintr = dsintr & ~0x3c;
360 write_phy(lp->phy_address, MII_DPMISR_REG, dsintr);
361 }
362
363 disable_mdi();
364 spin_unlock_irq(&lp->lock);
365
366 free_irq(irq_number, dev);
367}
368
369
370
371
372#if 0
373static void reset_phy(struct net_device *dev)
374{
375 struct at91_private *lp = netdev_priv(dev);
376 unsigned int bmcr;
377
378 spin_lock_irq(&lp->lock);
379 enable_mdi();
380
381
382 write_phy(lp->phy_address, MII_BMCR, BMCR_RESET);
383
384
385 do {
386 read_phy(lp->phy_address, MII_BMCR, &bmcr);
387 } while (!(bmcr & BMCR_RESET));
388
389 disable_mdi();
390 spin_unlock_irq(&lp->lock);
391}
392#endif
393
394static void at91ether_check_link(unsigned long dev_id)
395{
396 struct net_device *dev = (struct net_device *) dev_id;
397 struct at91_private *lp = netdev_priv(dev);
398
399 enable_mdi();
400 update_linkspeed(dev, 1);
401 disable_mdi();
402
403 mod_timer(&lp->check_timer, jiffies + LINK_POLL_INTERVAL);
404}
405
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420
421static short __init unpack_mac_address(struct net_device *dev, unsigned int hi, unsigned int lo)
422{
423 char addr[6];
424
425 if (machine_is_csb337()) {
426 addr[5] = (lo & 0xff);
427 addr[4] = (lo & 0xff00) >> 8;
428 addr[3] = (lo & 0xff0000) >> 16;
429 addr[2] = (lo & 0xff000000) >> 24;
430 addr[1] = (hi & 0xff);
431 addr[0] = (hi & 0xff00) >> 8;
432 }
433 else {
434 addr[0] = (lo & 0xff);
435 addr[1] = (lo & 0xff00) >> 8;
436 addr[2] = (lo & 0xff0000) >> 16;
437 addr[3] = (lo & 0xff000000) >> 24;
438 addr[4] = (hi & 0xff);
439 addr[5] = (hi & 0xff00) >> 8;
440 }
441
442 if (is_valid_ether_addr(addr)) {
443 memcpy(dev->dev_addr, &addr, 6);
444 return 1;
445 }
446 return 0;
447}
448
449
450
451
452static void __init get_mac_address(struct net_device *dev)
453{
454
455 if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA1H), at91_emac_read(AT91_EMAC_SA1L)))
456 return;
457
458 if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA2H), at91_emac_read(AT91_EMAC_SA2L)))
459 return;
460
461 if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA3H), at91_emac_read(AT91_EMAC_SA3L)))
462 return;
463
464 if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA4H), at91_emac_read(AT91_EMAC_SA4L)))
465 return;
466
467 printk(KERN_ERR "at91_ether: Your bootloader did not configure a MAC address.\n");
468}
469
470
471
472
473static void update_mac_address(struct net_device *dev)
474{
475 at91_emac_write(AT91_EMAC_SA1L, (dev->dev_addr[3] << 24) | (dev->dev_addr[2] << 16) | (dev->dev_addr[1] << 8) | (dev->dev_addr[0]));
476 at91_emac_write(AT91_EMAC_SA1H, (dev->dev_addr[5] << 8) | (dev->dev_addr[4]));
477
478 at91_emac_write(AT91_EMAC_SA2L, 0);
479 at91_emac_write(AT91_EMAC_SA2H, 0);
480}
481
482
483
484
485static int set_mac_address(struct net_device *dev, void* addr)
486{
487 struct sockaddr *address = addr;
488
489 if (!is_valid_ether_addr(address->sa_data))
490 return -EADDRNOTAVAIL;
491
492 memcpy(dev->dev_addr, address->sa_data, dev->addr_len);
493 update_mac_address(dev);
494
495 printk("%s: Setting MAC address to %pM\n", dev->name,
496 dev->dev_addr);
497
498 return 0;
499}
500
501static int inline hash_bit_value(int bitnr, __u8 *addr)
502{
503 if (addr[bitnr / 8] & (1 << (bitnr % 8)))
504 return 1;
505 return 0;
506}
507
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539static int hash_get_index(__u8 *addr)
540{
541 int i, j, bitval;
542 int hash_index = 0;
543
544 for (j = 0; j < 6; j++) {
545 for (i = 0, bitval = 0; i < 8; i++)
546 bitval ^= hash_bit_value(i*6 + j, addr);
547
548 hash_index |= (bitval << j);
549 }
550
551 return hash_index;
552}
553
554
555
556
557static void at91ether_sethashtable(struct net_device *dev)
558{
559 struct dev_mc_list *curr;
560 unsigned long mc_filter[2];
561 unsigned int i, bitnr;
562
563 mc_filter[0] = mc_filter[1] = 0;
564
565 curr = dev->mc_list;
566 for (i = 0; i < dev->mc_count; i++, curr = curr->next) {
567 if (!curr) break;
568
569 bitnr = hash_get_index(curr->dmi_addr);
570 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
571 }
572
573 at91_emac_write(AT91_EMAC_HSL, mc_filter[0]);
574 at91_emac_write(AT91_EMAC_HSH, mc_filter[1]);
575}
576
577
578
579
580static void at91ether_set_multicast_list(struct net_device *dev)
581{
582 unsigned long cfg;
583
584 cfg = at91_emac_read(AT91_EMAC_CFG);
585
586 if (dev->flags & IFF_PROMISC)
587 cfg |= AT91_EMAC_CAF;
588 else if (dev->flags & (~IFF_PROMISC))
589 cfg &= ~AT91_EMAC_CAF;
590
591 if (dev->flags & IFF_ALLMULTI) {
592 at91_emac_write(AT91_EMAC_HSH, -1);
593 at91_emac_write(AT91_EMAC_HSL, -1);
594 cfg |= AT91_EMAC_MTI;
595 } else if (dev->mc_count > 0) {
596 at91ether_sethashtable(dev);
597 cfg |= AT91_EMAC_MTI;
598 } else if (dev->flags & (~IFF_ALLMULTI)) {
599 at91_emac_write(AT91_EMAC_HSH, 0);
600 at91_emac_write(AT91_EMAC_HSL, 0);
601 cfg &= ~AT91_EMAC_MTI;
602 }
603
604 at91_emac_write(AT91_EMAC_CFG, cfg);
605}
606
607
608
609static int mdio_read(struct net_device *dev, int phy_id, int location)
610{
611 unsigned int value;
612
613 read_phy(phy_id, location, &value);
614 return value;
615}
616
617static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
618{
619 write_phy(phy_id, location, value);
620}
621
622static int at91ether_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
623{
624 struct at91_private *lp = netdev_priv(dev);
625 int ret;
626
627 spin_lock_irq(&lp->lock);
628 enable_mdi();
629
630 ret = mii_ethtool_gset(&lp->mii, cmd);
631
632 disable_mdi();
633 spin_unlock_irq(&lp->lock);
634
635 if (lp->phy_media == PORT_FIBRE) {
636 cmd->supported = SUPPORTED_FIBRE;
637 cmd->port = PORT_FIBRE;
638 }
639
640 return ret;
641}
642
643static int at91ether_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
644{
645 struct at91_private *lp = netdev_priv(dev);
646 int ret;
647
648 spin_lock_irq(&lp->lock);
649 enable_mdi();
650
651 ret = mii_ethtool_sset(&lp->mii, cmd);
652
653 disable_mdi();
654 spin_unlock_irq(&lp->lock);
655
656 return ret;
657}
658
659static int at91ether_nwayreset(struct net_device *dev)
660{
661 struct at91_private *lp = netdev_priv(dev);
662 int ret;
663
664 spin_lock_irq(&lp->lock);
665 enable_mdi();
666
667 ret = mii_nway_restart(&lp->mii);
668
669 disable_mdi();
670 spin_unlock_irq(&lp->lock);
671
672 return ret;
673}
674
675static void at91ether_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
676{
677 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
678 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
679 strlcpy(info->bus_info, dev_name(dev->dev.parent), sizeof(info->bus_info));
680}
681
682static const struct ethtool_ops at91ether_ethtool_ops = {
683 .get_settings = at91ether_get_settings,
684 .set_settings = at91ether_set_settings,
685 .get_drvinfo = at91ether_get_drvinfo,
686 .nway_reset = at91ether_nwayreset,
687 .get_link = ethtool_op_get_link,
688};
689
690static int at91ether_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
691{
692 struct at91_private *lp = netdev_priv(dev);
693 int res;
694
695 if (!netif_running(dev))
696 return -EINVAL;
697
698 spin_lock_irq(&lp->lock);
699 enable_mdi();
700 res = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
701 disable_mdi();
702 spin_unlock_irq(&lp->lock);
703
704 return res;
705}
706
707
708
709
710
711
712static void at91ether_start(struct net_device *dev)
713{
714 struct at91_private *lp = netdev_priv(dev);
715 struct recv_desc_bufs *dlist, *dlist_phys;
716 int i;
717 unsigned long ctl;
718
719 dlist = lp->dlist;
720 dlist_phys = lp->dlist_phys;
721
722 for (i = 0; i < MAX_RX_DESCR; i++) {
723 dlist->descriptors[i].addr = (unsigned int) &dlist_phys->recv_buf[i][0];
724 dlist->descriptors[i].size = 0;
725 }
726
727
728 dlist->descriptors[i-1].addr |= EMAC_DESC_WRAP;
729
730
731 lp->rxBuffIndex = 0;
732
733
734 at91_emac_write(AT91_EMAC_RBQP, (unsigned long) dlist_phys);
735
736
737 ctl = at91_emac_read(AT91_EMAC_CTL);
738 at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_RE | AT91_EMAC_TE);
739}
740
741
742
743
744static int at91ether_open(struct net_device *dev)
745{
746 struct at91_private *lp = netdev_priv(dev);
747 unsigned long ctl;
748
749 if (!is_valid_ether_addr(dev->dev_addr))
750 return -EADDRNOTAVAIL;
751
752 clk_enable(lp->ether_clk);
753
754
755 ctl = at91_emac_read(AT91_EMAC_CTL);
756 at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_CSR);
757
758
759 update_mac_address(dev);
760
761
762 enable_phyirq(dev);
763
764
765 at91_emac_write(AT91_EMAC_IER, AT91_EMAC_RCOM | AT91_EMAC_RBNA
766 | AT91_EMAC_TUND | AT91_EMAC_RTRY | AT91_EMAC_TCOM
767 | AT91_EMAC_ROVR | AT91_EMAC_ABT);
768
769
770 spin_lock_irq(&lp->lock);
771 enable_mdi();
772 update_linkspeed(dev, 0);
773 disable_mdi();
774 spin_unlock_irq(&lp->lock);
775
776 at91ether_start(dev);
777 netif_start_queue(dev);
778 return 0;
779}
780
781
782
783
784static int at91ether_close(struct net_device *dev)
785{
786 struct at91_private *lp = netdev_priv(dev);
787 unsigned long ctl;
788
789
790 ctl = at91_emac_read(AT91_EMAC_CTL);
791 at91_emac_write(AT91_EMAC_CTL, ctl & ~(AT91_EMAC_TE | AT91_EMAC_RE));
792
793
794 disable_phyirq(dev);
795
796
797 at91_emac_write(AT91_EMAC_IDR, AT91_EMAC_RCOM | AT91_EMAC_RBNA
798 | AT91_EMAC_TUND | AT91_EMAC_RTRY | AT91_EMAC_TCOM
799 | AT91_EMAC_ROVR | AT91_EMAC_ABT);
800
801 netif_stop_queue(dev);
802
803 clk_disable(lp->ether_clk);
804
805 return 0;
806}
807
808
809
810
811static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev)
812{
813 struct at91_private *lp = netdev_priv(dev);
814
815 if (at91_emac_read(AT91_EMAC_TSR) & AT91_EMAC_TSR_BNQ) {
816 netif_stop_queue(dev);
817
818
819 lp->skb = skb;
820 lp->skb_length = skb->len;
821 lp->skb_physaddr = dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE);
822 dev->stats.tx_bytes += skb->len;
823
824
825 at91_emac_write(AT91_EMAC_TAR, lp->skb_physaddr);
826
827 at91_emac_write(AT91_EMAC_TCR, skb->len);
828
829 dev->trans_start = jiffies;
830 } else {
831 printk(KERN_ERR "at91_ether.c: at91ether_start_xmit() called, but device is busy!\n");
832 return NETDEV_TX_BUSY;
833
834
835 }
836
837 return NETDEV_TX_OK;
838}
839
840
841
842
843static struct net_device_stats *at91ether_stats(struct net_device *dev)
844{
845 int ale, lenerr, seqe, lcol, ecol;
846
847 if (netif_running(dev)) {
848 dev->stats.rx_packets += at91_emac_read(AT91_EMAC_OK);
849 ale = at91_emac_read(AT91_EMAC_ALE);
850 dev->stats.rx_frame_errors += ale;
851 lenerr = at91_emac_read(AT91_EMAC_ELR) + at91_emac_read(AT91_EMAC_USF);
852 dev->stats.rx_length_errors += lenerr;
853 seqe = at91_emac_read(AT91_EMAC_SEQE);
854 dev->stats.rx_crc_errors += seqe;
855 dev->stats.rx_fifo_errors += at91_emac_read(AT91_EMAC_DRFC);
856 dev->stats.rx_errors += (ale + lenerr + seqe
857 + at91_emac_read(AT91_EMAC_CDE) + at91_emac_read(AT91_EMAC_RJB));
858
859 dev->stats.tx_packets += at91_emac_read(AT91_EMAC_FRA);
860 dev->stats.tx_fifo_errors += at91_emac_read(AT91_EMAC_TUE);
861 dev->stats.tx_carrier_errors += at91_emac_read(AT91_EMAC_CSE);
862 dev->stats.tx_heartbeat_errors += at91_emac_read(AT91_EMAC_SQEE);
863
864 lcol = at91_emac_read(AT91_EMAC_LCOL);
865 ecol = at91_emac_read(AT91_EMAC_ECOL);
866 dev->stats.tx_window_errors += lcol;
867 dev->stats.tx_aborted_errors += ecol;
868
869 dev->stats.collisions += (at91_emac_read(AT91_EMAC_SCOL) + at91_emac_read(AT91_EMAC_MCOL) + lcol + ecol);
870 }
871 return &dev->stats;
872}
873
874
875
876
877
878static void at91ether_rx(struct net_device *dev)
879{
880 struct at91_private *lp = netdev_priv(dev);
881 struct recv_desc_bufs *dlist;
882 unsigned char *p_recv;
883 struct sk_buff *skb;
884 unsigned int pktlen;
885
886 dlist = lp->dlist;
887 while (dlist->descriptors[lp->rxBuffIndex].addr & EMAC_DESC_DONE) {
888 p_recv = dlist->recv_buf[lp->rxBuffIndex];
889 pktlen = dlist->descriptors[lp->rxBuffIndex].size & 0x7ff;
890 skb = dev_alloc_skb(pktlen + 2);
891 if (skb != NULL) {
892 skb_reserve(skb, 2);
893 memcpy(skb_put(skb, pktlen), p_recv, pktlen);
894
895 skb->protocol = eth_type_trans(skb, dev);
896 dev->stats.rx_bytes += pktlen;
897 netif_rx(skb);
898 }
899 else {
900 dev->stats.rx_dropped += 1;
901 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
902 }
903
904 if (dlist->descriptors[lp->rxBuffIndex].size & EMAC_MULTICAST)
905 dev->stats.multicast++;
906
907 dlist->descriptors[lp->rxBuffIndex].addr &= ~EMAC_DESC_DONE;
908 if (lp->rxBuffIndex == MAX_RX_DESCR-1)
909 lp->rxBuffIndex = 0;
910 else
911 lp->rxBuffIndex++;
912 }
913}
914
915
916
917
918static irqreturn_t at91ether_interrupt(int irq, void *dev_id)
919{
920 struct net_device *dev = (struct net_device *) dev_id;
921 struct at91_private *lp = netdev_priv(dev);
922 unsigned long intstatus, ctl;
923
924
925
926 intstatus = at91_emac_read(AT91_EMAC_ISR);
927
928 if (intstatus & AT91_EMAC_RCOM)
929 at91ether_rx(dev);
930
931 if (intstatus & AT91_EMAC_TCOM) {
932
933 if (intstatus & (AT91_EMAC_TUND | AT91_EMAC_RTRY))
934 dev->stats.tx_errors += 1;
935
936 if (lp->skb) {
937 dev_kfree_skb_irq(lp->skb);
938 lp->skb = NULL;
939 dma_unmap_single(NULL, lp->skb_physaddr, lp->skb_length, DMA_TO_DEVICE);
940 }
941 netif_wake_queue(dev);
942 }
943
944
945 if (intstatus & AT91_EMAC_RBNA) {
946 ctl = at91_emac_read(AT91_EMAC_CTL);
947 at91_emac_write(AT91_EMAC_CTL, ctl & ~AT91_EMAC_RE);
948 at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_RE);
949 }
950
951 if (intstatus & AT91_EMAC_ROVR)
952 printk("%s: ROVR error\n", dev->name);
953
954 return IRQ_HANDLED;
955}
956
957#ifdef CONFIG_NET_POLL_CONTROLLER
958static void at91ether_poll_controller(struct net_device *dev)
959{
960 unsigned long flags;
961
962 local_irq_save(flags);
963 at91ether_interrupt(dev->irq, dev);
964 local_irq_restore(flags);
965}
966#endif
967
968static const struct net_device_ops at91ether_netdev_ops = {
969 .ndo_open = at91ether_open,
970 .ndo_stop = at91ether_close,
971 .ndo_start_xmit = at91ether_start_xmit,
972 .ndo_get_stats = at91ether_stats,
973 .ndo_set_multicast_list = at91ether_set_multicast_list,
974 .ndo_set_mac_address = set_mac_address,
975 .ndo_do_ioctl = at91ether_ioctl,
976 .ndo_validate_addr = eth_validate_addr,
977 .ndo_change_mtu = eth_change_mtu,
978#ifdef CONFIG_NET_POLL_CONTROLLER
979 .ndo_poll_controller = at91ether_poll_controller,
980#endif
981};
982
983
984
985
986static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_address,
987 struct platform_device *pdev, struct clk *ether_clk)
988{
989 struct at91_eth_data *board_data = pdev->dev.platform_data;
990 struct net_device *dev;
991 struct at91_private *lp;
992 unsigned int val;
993 int res;
994
995 dev = alloc_etherdev(sizeof(struct at91_private));
996 if (!dev)
997 return -ENOMEM;
998
999 dev->base_addr = AT91_VA_BASE_EMAC;
1000 dev->irq = AT91RM9200_ID_EMAC;
1001
1002
1003 if (request_irq(dev->irq, at91ether_interrupt, 0, dev->name, dev)) {
1004 free_netdev(dev);
1005 return -EBUSY;
1006 }
1007
1008
1009 lp = netdev_priv(dev);
1010 lp->dlist = (struct recv_desc_bufs *) dma_alloc_coherent(NULL, sizeof(struct recv_desc_bufs), (dma_addr_t *) &lp->dlist_phys, GFP_KERNEL);
1011 if (lp->dlist == NULL) {
1012 free_irq(dev->irq, dev);
1013 free_netdev(dev);
1014 return -ENOMEM;
1015 }
1016 lp->board_data = *board_data;
1017 lp->ether_clk = ether_clk;
1018 platform_set_drvdata(pdev, dev);
1019
1020 spin_lock_init(&lp->lock);
1021
1022 ether_setup(dev);
1023 dev->netdev_ops = &at91ether_netdev_ops;
1024 dev->ethtool_ops = &at91ether_ethtool_ops;
1025
1026 SET_NETDEV_DEV(dev, &pdev->dev);
1027
1028 get_mac_address(dev);
1029 update_mac_address(dev);
1030
1031 at91_emac_write(AT91_EMAC_CTL, 0);
1032
1033 if (lp->board_data.is_rmii)
1034 at91_emac_write(AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG | AT91_EMAC_RMII);
1035 else
1036 at91_emac_write(AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG);
1037
1038
1039 spin_lock_irq(&lp->lock);
1040 enable_mdi();
1041 if ((phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) {
1042 read_phy(phy_address, MII_DSCR_REG, &val);
1043 if ((val & (1 << 10)) == 0)
1044 lp->phy_media = PORT_FIBRE;
1045 } else if (machine_is_csb337()) {
1046
1047 write_phy(phy_address, MII_LEDCTRL_REG, 0x0d22);
1048 } else if (machine_is_ecbat91())
1049 write_phy(phy_address, MII_LEDCTRL_REG, 0x156A);
1050
1051 disable_mdi();
1052 spin_unlock_irq(&lp->lock);
1053
1054 lp->mii.dev = dev;
1055 lp->mii.mdio_read = mdio_read;
1056 lp->mii.mdio_write = mdio_write;
1057 lp->mii.phy_id = phy_address;
1058 lp->mii.phy_id_mask = 0x1f;
1059 lp->mii.reg_num_mask = 0x1f;
1060
1061 lp->phy_type = phy_type;
1062 lp->phy_address = phy_address;
1063
1064
1065 res = register_netdev(dev);
1066 if (res) {
1067 free_irq(dev->irq, dev);
1068 free_netdev(dev);
1069 dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys);
1070 return res;
1071 }
1072
1073
1074 spin_lock_irq(&lp->lock);
1075 enable_mdi();
1076 update_linkspeed(dev, 0);
1077 disable_mdi();
1078 spin_unlock_irq(&lp->lock);
1079 netif_carrier_off(dev);
1080
1081
1082 if (!lp->board_data.phy_irq_pin) {
1083 init_timer(&lp->check_timer);
1084 lp->check_timer.data = (unsigned long)dev;
1085 lp->check_timer.function = at91ether_check_link;
1086 } else if (lp->board_data.phy_irq_pin >= 32)
1087 gpio_request(lp->board_data.phy_irq_pin, "ethernet_phy");
1088
1089
1090 printk(KERN_INFO "%s: AT91 ethernet at 0x%08x int=%d %s%s (%pM)\n",
1091 dev->name, (uint) dev->base_addr, dev->irq,
1092 at91_emac_read(AT91_EMAC_CFG) & AT91_EMAC_SPD ? "100-" : "10-",
1093 at91_emac_read(AT91_EMAC_CFG) & AT91_EMAC_FD ? "FullDuplex" : "HalfDuplex",
1094 dev->dev_addr);
1095 if ((phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID))
1096 printk(KERN_INFO "%s: Davicom 9161 PHY %s\n", dev->name, (lp->phy_media == PORT_FIBRE) ? "(Fiber)" : "(Copper)");
1097 else if (phy_type == MII_LXT971A_ID)
1098 printk(KERN_INFO "%s: Intel LXT971A PHY\n", dev->name);
1099 else if (phy_type == MII_RTL8201_ID)
1100 printk(KERN_INFO "%s: Realtek RTL8201(B)L PHY\n", dev->name);
1101 else if (phy_type == MII_BCM5221_ID)
1102 printk(KERN_INFO "%s: Broadcom BCM5221 PHY\n", dev->name);
1103 else if (phy_type == MII_DP83847_ID)
1104 printk(KERN_INFO "%s: National Semiconductor DP83847 PHY\n", dev->name);
1105 else if (phy_type == MII_DP83848_ID)
1106 printk(KERN_INFO "%s: National Semiconductor DP83848 PHY\n", dev->name);
1107 else if (phy_type == MII_AC101L_ID)
1108 printk(KERN_INFO "%s: Altima AC101L PHY\n", dev->name);
1109 else if (phy_type == MII_KS8721_ID)
1110 printk(KERN_INFO "%s: Micrel KS8721 PHY\n", dev->name);
1111 else if (phy_type == MII_T78Q21x3_ID)
1112 printk(KERN_INFO "%s: Teridian 78Q21x3 PHY\n", dev->name);
1113 else if (phy_type == MII_LAN83C185_ID)
1114 printk(KERN_INFO "%s: SMSC LAN83C185 PHY\n", dev->name);
1115
1116 return 0;
1117}
1118
1119
1120
1121
1122static int __init at91ether_probe(struct platform_device *pdev)
1123{
1124 unsigned int phyid1, phyid2;
1125 int detected = -1;
1126 unsigned long phy_id;
1127 unsigned short phy_address = 0;
1128 struct clk *ether_clk;
1129
1130 ether_clk = clk_get(&pdev->dev, "ether_clk");
1131 if (IS_ERR(ether_clk)) {
1132 printk(KERN_ERR "at91_ether: no clock defined\n");
1133 return -ENODEV;
1134 }
1135 clk_enable(ether_clk);
1136
1137 while ((detected != 0) && (phy_address < 32)) {
1138
1139 enable_mdi();
1140 read_phy(phy_address, MII_PHYSID1, &phyid1);
1141 read_phy(phy_address, MII_PHYSID2, &phyid2);
1142 disable_mdi();
1143
1144 phy_id = (phyid1 << 16) | (phyid2 & 0xfff0);
1145 switch (phy_id) {
1146 case MII_DM9161_ID:
1147 case MII_DM9161A_ID:
1148 case MII_LXT971A_ID:
1149 case MII_RTL8201_ID:
1150 case MII_BCM5221_ID:
1151 case MII_DP83847_ID:
1152 case MII_DP83848_ID:
1153 case MII_AC101L_ID:
1154 case MII_KS8721_ID:
1155 case MII_T78Q21x3_ID:
1156 case MII_LAN83C185_ID:
1157 detected = at91ether_setup(phy_id, phy_address, pdev, ether_clk);
1158 break;
1159 }
1160
1161 phy_address++;
1162 }
1163
1164 clk_disable(ether_clk);
1165
1166 return detected;
1167}
1168
1169static int __devexit at91ether_remove(struct platform_device *pdev)
1170{
1171 struct net_device *dev = platform_get_drvdata(pdev);
1172 struct at91_private *lp = netdev_priv(dev);
1173
1174 if (lp->board_data.phy_irq_pin >= 32)
1175 gpio_free(lp->board_data.phy_irq_pin);
1176
1177 unregister_netdev(dev);
1178 free_irq(dev->irq, dev);
1179 dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys);
1180 clk_put(lp->ether_clk);
1181
1182 platform_set_drvdata(pdev, NULL);
1183 free_netdev(dev);
1184 return 0;
1185}
1186
1187#ifdef CONFIG_PM
1188
1189static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg)
1190{
1191 struct net_device *net_dev = platform_get_drvdata(pdev);
1192 struct at91_private *lp = netdev_priv(net_dev);
1193 int phy_irq = lp->board_data.phy_irq_pin;
1194
1195 if (netif_running(net_dev)) {
1196 if (phy_irq)
1197 disable_irq(phy_irq);
1198
1199 netif_stop_queue(net_dev);
1200 netif_device_detach(net_dev);
1201
1202 clk_disable(lp->ether_clk);
1203 }
1204 return 0;
1205}
1206
1207static int at91ether_resume(struct platform_device *pdev)
1208{
1209 struct net_device *net_dev = platform_get_drvdata(pdev);
1210 struct at91_private *lp = netdev_priv(net_dev);
1211 int phy_irq = lp->board_data.phy_irq_pin;
1212
1213 if (netif_running(net_dev)) {
1214 clk_enable(lp->ether_clk);
1215
1216 netif_device_attach(net_dev);
1217 netif_start_queue(net_dev);
1218
1219 if (phy_irq)
1220 enable_irq(phy_irq);
1221 }
1222 return 0;
1223}
1224
1225#else
1226#define at91ether_suspend NULL
1227#define at91ether_resume NULL
1228#endif
1229
1230static struct platform_driver at91ether_driver = {
1231 .remove = __devexit_p(at91ether_remove),
1232 .suspend = at91ether_suspend,
1233 .resume = at91ether_resume,
1234 .driver = {
1235 .name = DRV_NAME,
1236 .owner = THIS_MODULE,
1237 },
1238};
1239
1240static int __init at91ether_init(void)
1241{
1242 return platform_driver_probe(&at91ether_driver, at91ether_probe);
1243}
1244
1245static void __exit at91ether_exit(void)
1246{
1247 platform_driver_unregister(&at91ether_driver);
1248}
1249
1250module_init(at91ether_init)
1251module_exit(at91ether_exit)
1252
1253MODULE_LICENSE("GPL");
1254MODULE_DESCRIPTION("AT91RM9200 EMAC Ethernet driver");
1255MODULE_AUTHOR("Andrew Victor");
1256MODULE_ALIAS("platform:" DRV_NAME);
1257