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34static const char version[] =
35"atp.c:v1.09=ac 2002/10/01 Donald Becker <becker@scyld.com>\n";
36
37
38
39
40static int debug = 1;
41#define net_debug debug
42
43
44static int max_interrupt_work = 15;
45
46#define NUM_UNITS 2
47
48static int io[NUM_UNITS];
49static int irq[NUM_UNITS];
50static int xcvr[NUM_UNITS];
51
52
53
54
55#define TX_TIMEOUT (400*HZ/1000)
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125#include <linux/kernel.h>
126#include <linux/module.h>
127#include <linux/types.h>
128#include <linux/fcntl.h>
129#include <linux/interrupt.h>
130#include <linux/ioport.h>
131#include <linux/in.h>
132#include <linux/slab.h>
133#include <linux/string.h>
134#include <linux/errno.h>
135#include <linux/init.h>
136#include <linux/crc32.h>
137#include <linux/netdevice.h>
138#include <linux/etherdevice.h>
139#include <linux/skbuff.h>
140#include <linux/spinlock.h>
141#include <linux/delay.h>
142#include <linux/bitops.h>
143
144#include <asm/system.h>
145#include <asm/io.h>
146#include <asm/dma.h>
147
148#include "atp.h"
149
150MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
151MODULE_DESCRIPTION("RealTek RTL8002/8012 parallel port Ethernet driver");
152MODULE_LICENSE("GPL");
153
154module_param(max_interrupt_work, int, 0);
155module_param(debug, int, 0);
156module_param_array(io, int, NULL, 0);
157module_param_array(irq, int, NULL, 0);
158module_param_array(xcvr, int, NULL, 0);
159MODULE_PARM_DESC(max_interrupt_work, "ATP maximum events handled per interrupt");
160MODULE_PARM_DESC(debug, "ATP debug level (0-7)");
161MODULE_PARM_DESC(io, "ATP I/O base address(es)");
162MODULE_PARM_DESC(irq, "ATP IRQ number(s)");
163MODULE_PARM_DESC(xcvr, "ATP transceiver(s) (0=internal, 1=external)");
164
165
166#define ETHERCARD_TOTAL_SIZE 3
167
168
169static char mux_8012[] = { 0xff, 0xf7, 0xff, 0xfb, 0xf3, 0xfb, 0xff, 0xf7,};
170
171struct net_local {
172 spinlock_t lock;
173 struct net_device *next_module;
174 struct timer_list timer;
175 long last_rx_time;
176 int saved_tx_size;
177 unsigned int tx_unit_busy:1;
178 unsigned char re_tx,
179 addr_mode,
180 pac_cnt_in_tx_buf,
181 chip_type;
182};
183
184
185
186
187#define TIMED_CHECKER (HZ/4)
188#ifdef TIMED_CHECKER
189#include <linux/timer.h>
190static void atp_timed_checker(unsigned long ignored);
191#endif
192
193
194
195static int atp_probe1(long ioaddr);
196static void get_node_ID(struct net_device *dev);
197static unsigned short eeprom_op(long ioaddr, unsigned int cmd);
198static int net_open(struct net_device *dev);
199static void hardware_init(struct net_device *dev);
200static void write_packet(long ioaddr, int length, unsigned char *packet, int pad, int mode);
201static void trigger_send(long ioaddr, int length);
202static netdev_tx_t atp_send_packet(struct sk_buff *skb,
203 struct net_device *dev);
204static irqreturn_t atp_interrupt(int irq, void *dev_id);
205static void net_rx(struct net_device *dev);
206static void read_block(long ioaddr, int length, unsigned char *buffer, int data_mode);
207static int net_close(struct net_device *dev);
208static void set_rx_mode(struct net_device *dev);
209static void tx_timeout(struct net_device *dev);
210
211
212
213static struct net_device *root_atp_dev;
214
215
216
217
218
219
220
221
222
223static int __init atp_init(void)
224{
225 int *port, ports[] = {0x378, 0x278, 0x3bc, 0};
226 int base_addr = io[0];
227
228 if (base_addr > 0x1ff)
229 return atp_probe1(base_addr);
230 else if (base_addr == 1)
231 return -ENXIO;
232
233 for (port = ports; *port; port++) {
234 long ioaddr = *port;
235 outb(0x57, ioaddr + PAR_DATA);
236 if (inb(ioaddr + PAR_DATA) != 0x57)
237 continue;
238 if (atp_probe1(ioaddr) == 0)
239 return 0;
240 }
241
242 return -ENODEV;
243}
244
245static const struct net_device_ops atp_netdev_ops = {
246 .ndo_open = net_open,
247 .ndo_stop = net_close,
248 .ndo_start_xmit = atp_send_packet,
249 .ndo_set_multicast_list = set_rx_mode,
250 .ndo_tx_timeout = tx_timeout,
251 .ndo_change_mtu = eth_change_mtu,
252 .ndo_set_mac_address = eth_mac_addr,
253 .ndo_validate_addr = eth_validate_addr,
254};
255
256static int __init atp_probe1(long ioaddr)
257{
258 struct net_device *dev = NULL;
259 struct net_local *lp;
260 int saved_ctrl_reg, status, i;
261 int res;
262
263 outb(0xff, ioaddr + PAR_DATA);
264
265
266 saved_ctrl_reg = inb(ioaddr + PAR_CONTROL);
267 if (net_debug > 3)
268 printk("atp: Control register was %#2.2x.\n", saved_ctrl_reg);
269
270 outb(0x04, ioaddr + PAR_CONTROL);
271#ifndef final_version
272 if (net_debug > 3) {
273
274 for (i = 0; i < 8; i++)
275 outb(mux_8012[i], ioaddr + PAR_DATA);
276 write_reg(ioaddr, MODSEL, 0x00);
277 printk("atp: Registers are ");
278 for (i = 0; i < 32; i++)
279 printk(" %2.2x", read_nibble(ioaddr, i));
280 printk(".\n");
281 }
282#endif
283
284 for (i = 0; i < 8; i++)
285 outb(mux_8012[i], ioaddr + PAR_DATA);
286 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
287
288 status = read_nibble(ioaddr, CMR1);
289
290 if (net_debug > 3) {
291 printk(KERN_DEBUG "atp: Status nibble was %#2.2x..", status);
292 for (i = 0; i < 32; i++)
293 printk(" %2.2x", read_nibble(ioaddr, i));
294 printk("\n");
295 }
296
297 if ((status & 0x78) != 0x08) {
298
299 outb(saved_ctrl_reg, ioaddr + PAR_CONTROL);
300 return -ENODEV;
301 }
302 status = read_nibble(ioaddr, CMR2_h);
303 if ((status & 0x78) != 0x10) {
304 outb(saved_ctrl_reg, ioaddr + PAR_CONTROL);
305 return -ENODEV;
306 }
307
308 dev = alloc_etherdev(sizeof(struct net_local));
309 if (!dev)
310 return -ENOMEM;
311
312
313 write_reg_byte(ioaddr, CMR2, 0x01);
314 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
315
316
317 if (irq[0])
318 dev->irq = irq[0];
319 else if (ioaddr == 0x378)
320 dev->irq = 7;
321 else
322 dev->irq = 5;
323 write_reg_high(ioaddr, CMR1, CMR1h_TxRxOFF);
324 write_reg(ioaddr, CMR2, CMR2_NULL);
325
326 dev->base_addr = ioaddr;
327
328
329 get_node_ID(dev);
330
331#ifndef MODULE
332 if (net_debug)
333 printk(KERN_INFO "%s", version);
334#endif
335
336 printk(KERN_NOTICE "%s: Pocket adapter found at %#3lx, IRQ %d, "
337 "SAPROM %pM.\n",
338 dev->name, dev->base_addr, dev->irq, dev->dev_addr);
339
340
341 write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX);
342
343 lp = netdev_priv(dev);
344 lp->chip_type = RTL8002;
345 lp->addr_mode = CMR2h_Normal;
346 spin_lock_init(&lp->lock);
347
348
349 if (xcvr[0])
350 dev->if_port = xcvr[0];
351 else
352 dev->if_port = (dev->mem_start & 0xf) ? (dev->mem_start & 0x7) : 4;
353 if (dev->mem_end & 0xf)
354 net_debug = dev->mem_end & 7;
355
356 dev->netdev_ops = &atp_netdev_ops;
357 dev->watchdog_timeo = TX_TIMEOUT;
358
359 res = register_netdev(dev);
360 if (res) {
361 free_netdev(dev);
362 return res;
363 }
364
365 lp->next_module = root_atp_dev;
366 root_atp_dev = dev;
367
368 return 0;
369}
370
371
372static void __init get_node_ID(struct net_device *dev)
373{
374 long ioaddr = dev->base_addr;
375 int sa_offset = 0;
376 int i;
377
378 write_reg(ioaddr, CMR2, CMR2_EEPROM);
379
380
381
382 if (eeprom_op(ioaddr, EE_READ(0)) == 0xffff)
383 sa_offset = 15;
384
385 for (i = 0; i < 3; i++)
386 ((__be16 *)dev->dev_addr)[i] =
387 cpu_to_be16(eeprom_op(ioaddr, EE_READ(sa_offset + i)));
388
389 write_reg(ioaddr, CMR2, CMR2_NULL);
390}
391
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402
403
404static unsigned short __init eeprom_op(long ioaddr, u32 cmd)
405{
406 unsigned eedata_out = 0;
407 int num_bits = EE_CMD_SIZE;
408
409 while (--num_bits >= 0) {
410 char outval = (cmd & (1<<num_bits)) ? EE_DATA_WRITE : 0;
411 write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_LOW);
412 write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_HIGH);
413 eedata_out <<= 1;
414 if (read_nibble(ioaddr, PROM_DATA) & EE_DATA_READ)
415 eedata_out++;
416 }
417 write_reg_high(ioaddr, PROM_CMD, EE_CLK_LOW & ~EE_CS);
418 return eedata_out;
419}
420
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428
429
430
431
432static int net_open(struct net_device *dev)
433{
434 struct net_local *lp = netdev_priv(dev);
435 int ret;
436
437
438
439
440 ret = request_irq(dev->irq, &atp_interrupt, 0, dev->name, dev);
441 if (ret)
442 return ret;
443
444 hardware_init(dev);
445
446 init_timer(&lp->timer);
447 lp->timer.expires = jiffies + TIMED_CHECKER;
448 lp->timer.data = (unsigned long)dev;
449 lp->timer.function = &atp_timed_checker;
450 add_timer(&lp->timer);
451
452 netif_start_queue(dev);
453 return 0;
454}
455
456
457
458static void hardware_init(struct net_device *dev)
459{
460 struct net_local *lp = netdev_priv(dev);
461 long ioaddr = dev->base_addr;
462 int i;
463
464
465 for (i = 0; i < 8; i++)
466 outb(mux_8012[i], ioaddr + PAR_DATA);
467 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
468
469 for (i = 0; i < 6; i++)
470 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
471
472 write_reg_high(ioaddr, CMR2, lp->addr_mode);
473
474 if (net_debug > 2) {
475 printk(KERN_DEBUG "%s: Reset: current Rx mode %d.\n", dev->name,
476 (read_nibble(ioaddr, CMR2_h) >> 3) & 0x0f);
477 }
478
479 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
480 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
481
482
483 outb(Ctrl_SelData + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
484
485
486 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
487 write_reg_high(ioaddr, IMR, ISRh_RxErr);
488
489 lp->tx_unit_busy = 0;
490 lp->pac_cnt_in_tx_buf = 0;
491 lp->saved_tx_size = 0;
492}
493
494static void trigger_send(long ioaddr, int length)
495{
496 write_reg_byte(ioaddr, TxCNT0, length & 0xff);
497 write_reg(ioaddr, TxCNT1, length >> 8);
498 write_reg(ioaddr, CMR1, CMR1_Xmit);
499}
500
501static void write_packet(long ioaddr, int length, unsigned char *packet, int pad_len, int data_mode)
502{
503 if (length & 1)
504 {
505 length++;
506 pad_len++;
507 }
508
509 outb(EOC+MAR, ioaddr + PAR_DATA);
510 if ((data_mode & 1) == 0) {
511
512 outb(WrAddr+MAR, ioaddr + PAR_DATA);
513 do {
514 write_byte_mode0(ioaddr, *packet++);
515 } while (--length > pad_len) ;
516 do {
517 write_byte_mode0(ioaddr, 0);
518 } while (--length > 0) ;
519 } else {
520
521 unsigned char outbyte = *packet++;
522
523 outb(Ctrl_LNibWrite + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
524 outb(WrAddr+MAR, ioaddr + PAR_DATA);
525
526 outb((outbyte & 0x0f)|0x40, ioaddr + PAR_DATA);
527 outb(outbyte & 0x0f, ioaddr + PAR_DATA);
528 outbyte >>= 4;
529 outb(outbyte & 0x0f, ioaddr + PAR_DATA);
530 outb(Ctrl_HNibWrite + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
531 while (--length > pad_len)
532 write_byte_mode1(ioaddr, *packet++);
533 while (--length > 0)
534 write_byte_mode1(ioaddr, 0);
535 }
536
537 outb(0xff, ioaddr + PAR_DATA);
538 outb(Ctrl_HNibWrite | Ctrl_SelData | Ctrl_IRQEN, ioaddr + PAR_CONTROL);
539}
540
541static void tx_timeout(struct net_device *dev)
542{
543 long ioaddr = dev->base_addr;
544
545 printk(KERN_WARNING "%s: Transmit timed out, %s?\n", dev->name,
546 inb(ioaddr + PAR_CONTROL) & 0x10 ? "network cable problem"
547 : "IRQ conflict");
548 dev->stats.tx_errors++;
549
550 hardware_init(dev);
551 dev->trans_start = jiffies;
552 netif_wake_queue(dev);
553 dev->stats.tx_errors++;
554}
555
556static netdev_tx_t atp_send_packet(struct sk_buff *skb,
557 struct net_device *dev)
558{
559 struct net_local *lp = netdev_priv(dev);
560 long ioaddr = dev->base_addr;
561 int length;
562 unsigned long flags;
563
564 length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
565
566 netif_stop_queue(dev);
567
568
569
570
571 spin_lock_irqsave(&lp->lock, flags);
572 write_reg(ioaddr, IMR, 0);
573 write_reg_high(ioaddr, IMR, 0);
574 spin_unlock_irqrestore(&lp->lock, flags);
575
576 write_packet(ioaddr, length, skb->data, length-skb->len, dev->if_port);
577
578 lp->pac_cnt_in_tx_buf++;
579 if (lp->tx_unit_busy == 0) {
580 trigger_send(ioaddr, length);
581 lp->saved_tx_size = 0;
582 lp->re_tx = 0;
583 lp->tx_unit_busy = 1;
584 } else
585 lp->saved_tx_size = length;
586
587 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
588 write_reg_high(ioaddr, IMR, ISRh_RxErr);
589
590 dev->trans_start = jiffies;
591 dev_kfree_skb (skb);
592 return NETDEV_TX_OK;
593}
594
595
596
597
598static irqreturn_t atp_interrupt(int irq, void *dev_instance)
599{
600 struct net_device *dev = dev_instance;
601 struct net_local *lp;
602 long ioaddr;
603 static int num_tx_since_rx;
604 int boguscount = max_interrupt_work;
605 int handled = 0;
606
607 ioaddr = dev->base_addr;
608 lp = netdev_priv(dev);
609
610 spin_lock(&lp->lock);
611
612
613 outb(Ctrl_SelData, ioaddr + PAR_CONTROL);
614
615
616 write_reg(ioaddr, CMR2, CMR2_NULL);
617 write_reg(ioaddr, IMR, 0);
618
619 if (net_debug > 5) printk(KERN_DEBUG "%s: In interrupt ", dev->name);
620 while (--boguscount > 0) {
621 int status = read_nibble(ioaddr, ISR);
622 if (net_debug > 5) printk("loop status %02x..", status);
623
624 if (status & (ISR_RxOK<<3)) {
625 handled = 1;
626 write_reg(ioaddr, ISR, ISR_RxOK);
627 do {
628 int read_status = read_nibble(ioaddr, CMR1);
629 if (net_debug > 6)
630 printk("handling Rx packet %02x..", read_status);
631
632
633 if (read_status & (CMR1_IRQ << 3)) {
634 dev->stats.rx_over_errors++;
635
636 write_reg_high(ioaddr, CMR2, CMR2h_OFF);
637 net_rx(dev);
638
639 write_reg_high(ioaddr, ISR, ISRh_RxErr);
640 write_reg_high(ioaddr, CMR2, lp->addr_mode);
641 } else if ((read_status & (CMR1_BufEnb << 3)) == 0) {
642 net_rx(dev);
643 num_tx_since_rx = 0;
644 } else
645 break;
646 } while (--boguscount > 0);
647 } else if (status & ((ISR_TxErr + ISR_TxOK)<<3)) {
648 handled = 1;
649 if (net_debug > 6) printk("handling Tx done..");
650
651
652 write_reg(ioaddr, ISR, ISR_TxErr + ISR_TxOK);
653 if (status & (ISR_TxErr<<3)) {
654 dev->stats.collisions++;
655 if (++lp->re_tx > 15) {
656 dev->stats.tx_aborted_errors++;
657 hardware_init(dev);
658 break;
659 }
660
661 if (net_debug > 6) printk("attempting to ReTx");
662 write_reg(ioaddr, CMR1, CMR1_ReXmit + CMR1_Xmit);
663 } else {
664
665 dev->stats.tx_packets++;
666 lp->pac_cnt_in_tx_buf--;
667 if ( lp->saved_tx_size) {
668 trigger_send(ioaddr, lp->saved_tx_size);
669 lp->saved_tx_size = 0;
670 lp->re_tx = 0;
671 } else
672 lp->tx_unit_busy = 0;
673 netif_wake_queue(dev);
674 }
675 num_tx_since_rx++;
676 } else if (num_tx_since_rx > 8
677 && time_after(jiffies, dev->last_rx + HZ)) {
678 if (net_debug > 2)
679 printk(KERN_DEBUG "%s: Missed packet? No Rx after %d Tx and "
680 "%ld jiffies status %02x CMR1 %02x.\n", dev->name,
681 num_tx_since_rx, jiffies - dev->last_rx, status,
682 (read_nibble(ioaddr, CMR1) >> 3) & 15);
683 dev->stats.rx_missed_errors++;
684 hardware_init(dev);
685 num_tx_since_rx = 0;
686 break;
687 } else
688 break;
689 }
690
691
692
693 {
694 int i;
695 for (i = 0; i < 6; i++)
696 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
697#if 0 && defined(TIMED_CHECKER)
698 mod_timer(&lp->timer, jiffies + TIMED_CHECKER);
699#endif
700 }
701
702
703 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
704
705 outb(Ctrl_SelData + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
706
707 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
708 write_reg_high(ioaddr, IMR, ISRh_RxErr);
709
710 spin_unlock(&lp->lock);
711
712 if (net_debug > 5) printk("exiting interrupt.\n");
713 return IRQ_RETVAL(handled);
714}
715
716#ifdef TIMED_CHECKER
717
718
719static void atp_timed_checker(unsigned long data)
720{
721 struct net_device *dev = (struct net_device *)data;
722 long ioaddr = dev->base_addr;
723 struct net_local *lp = netdev_priv(dev);
724 int tickssofar = jiffies - lp->last_rx_time;
725 int i;
726
727 spin_lock(&lp->lock);
728 if (tickssofar > 2*HZ) {
729#if 1
730 for (i = 0; i < 6; i++)
731 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
732 lp->last_rx_time = jiffies;
733#else
734 for (i = 0; i < 6; i++)
735 if (read_cmd_byte(ioaddr, PAR0 + i) != atp_timed_dev->dev_addr[i])
736 {
737 struct net_local *lp = netdev_priv(atp_timed_dev);
738 write_reg_byte(ioaddr, PAR0 + i, atp_timed_dev->dev_addr[i]);
739 if (i == 2)
740 dev->stats.tx_errors++;
741 else if (i == 3)
742 dev->stats.tx_dropped++;
743 else if (i == 4)
744 dev->stats.collisions++;
745 else
746 dev->stats.rx_errors++;
747 }
748#endif
749 }
750 spin_unlock(&lp->lock);
751 lp->timer.expires = jiffies + TIMED_CHECKER;
752 add_timer(&lp->timer);
753}
754#endif
755
756
757static void net_rx(struct net_device *dev)
758{
759 struct net_local *lp = netdev_priv(dev);
760 long ioaddr = dev->base_addr;
761 struct rx_header rx_head;
762
763
764 outb(EOC+MAR, ioaddr + PAR_DATA);
765 read_block(ioaddr, 8, (unsigned char*)&rx_head, dev->if_port);
766 if (net_debug > 5)
767 printk(KERN_DEBUG " rx_count %04x %04x %04x %04x..", rx_head.pad,
768 rx_head.rx_count, rx_head.rx_status, rx_head.cur_addr);
769 if ((rx_head.rx_status & 0x77) != 0x01) {
770 dev->stats.rx_errors++;
771 if (rx_head.rx_status & 0x0004) dev->stats.rx_frame_errors++;
772 else if (rx_head.rx_status & 0x0002) dev->stats.rx_crc_errors++;
773 if (net_debug > 3)
774 printk(KERN_DEBUG "%s: Unknown ATP Rx error %04x.\n",
775 dev->name, rx_head.rx_status);
776 if (rx_head.rx_status & 0x0020) {
777 dev->stats.rx_fifo_errors++;
778 write_reg_high(ioaddr, CMR1, CMR1h_TxENABLE);
779 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
780 } else if (rx_head.rx_status & 0x0050)
781 hardware_init(dev);
782 return;
783 } else {
784
785 int pkt_len = (rx_head.rx_count & 0x7ff) - 4;
786 struct sk_buff *skb;
787
788 skb = dev_alloc_skb(pkt_len + 2);
789 if (skb == NULL) {
790 printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n",
791 dev->name);
792 dev->stats.rx_dropped++;
793 goto done;
794 }
795
796 skb_reserve(skb, 2);
797 read_block(ioaddr, pkt_len, skb_put(skb,pkt_len), dev->if_port);
798 skb->protocol = eth_type_trans(skb, dev);
799 netif_rx(skb);
800 dev->last_rx = jiffies;
801 dev->stats.rx_packets++;
802 dev->stats.rx_bytes += pkt_len;
803 }
804 done:
805 write_reg(ioaddr, CMR1, CMR1_NextPkt);
806 lp->last_rx_time = jiffies;
807 return;
808}
809
810static void read_block(long ioaddr, int length, unsigned char *p, int data_mode)
811{
812 if (data_mode <= 3) {
813 outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL);
814 outb(length == 8 ? RdAddr | HNib | MAR : RdAddr | MAR,
815 ioaddr + PAR_DATA);
816 if (data_mode <= 1) {
817 do { *p++ = read_byte_mode0(ioaddr); } while (--length > 0);
818 } else {
819 do { *p++ = read_byte_mode2(ioaddr); } while (--length > 0);
820 }
821 } else if (data_mode <= 5) {
822 do { *p++ = read_byte_mode4(ioaddr); } while (--length > 0);
823 } else {
824 do { *p++ = read_byte_mode6(ioaddr); } while (--length > 0);
825 }
826
827 outb(EOC+HNib+MAR, ioaddr + PAR_DATA);
828 outb(Ctrl_SelData, ioaddr + PAR_CONTROL);
829}
830
831
832static int
833net_close(struct net_device *dev)
834{
835 struct net_local *lp = netdev_priv(dev);
836 long ioaddr = dev->base_addr;
837
838 netif_stop_queue(dev);
839
840 del_timer_sync(&lp->timer);
841
842
843 lp->addr_mode = CMR2h_OFF;
844 write_reg_high(ioaddr, CMR2, CMR2h_OFF);
845
846
847 outb(0x00, ioaddr + PAR_CONTROL);
848 free_irq(dev->irq, dev);
849
850
851 write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX);
852 return 0;
853}
854
855
856
857
858
859static void set_rx_mode_8002(struct net_device *dev)
860{
861 struct net_local *lp = netdev_priv(dev);
862 long ioaddr = dev->base_addr;
863
864 if (dev->mc_count > 0 || (dev->flags & (IFF_ALLMULTI|IFF_PROMISC)))
865 lp->addr_mode = CMR2h_PROMISC;
866 else
867 lp->addr_mode = CMR2h_Normal;
868 write_reg_high(ioaddr, CMR2, lp->addr_mode);
869}
870
871static void set_rx_mode_8012(struct net_device *dev)
872{
873 struct net_local *lp = netdev_priv(dev);
874 long ioaddr = dev->base_addr;
875 unsigned char new_mode, mc_filter[8];
876 int i;
877
878 if (dev->flags & IFF_PROMISC) {
879 new_mode = CMR2h_PROMISC;
880 } else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
881
882 memset(mc_filter, 0xff, sizeof(mc_filter));
883 new_mode = CMR2h_Normal;
884 } else {
885 struct dev_mc_list *mclist;
886
887 memset(mc_filter, 0, sizeof(mc_filter));
888 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
889 i++, mclist = mclist->next)
890 {
891 int filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x3f;
892 mc_filter[filterbit >> 5] |= 1 << (filterbit & 31);
893 }
894 new_mode = CMR2h_Normal;
895 }
896 lp->addr_mode = new_mode;
897 write_reg(ioaddr, CMR2, CMR2_IRQOUT | 0x04);
898 for (i = 0; i < 8; i++)
899 write_reg_byte(ioaddr, i, mc_filter[i]);
900 if (net_debug > 2 || 1) {
901 lp->addr_mode = 1;
902 printk(KERN_DEBUG "%s: Mode %d, setting multicast filter to",
903 dev->name, lp->addr_mode);
904 for (i = 0; i < 8; i++)
905 printk(" %2.2x", mc_filter[i]);
906 printk(".\n");
907 }
908
909 write_reg_high(ioaddr, CMR2, lp->addr_mode);
910 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
911}
912
913static void set_rx_mode(struct net_device *dev)
914{
915 struct net_local *lp = netdev_priv(dev);
916
917 if (lp->chip_type == RTL8002)
918 return set_rx_mode_8002(dev);
919 else
920 return set_rx_mode_8012(dev);
921}
922
923
924static int __init atp_init_module(void) {
925 if (debug)
926 printk(KERN_INFO "%s", version);
927 return atp_init();
928}
929
930static void __exit atp_cleanup_module(void) {
931 struct net_device *next_dev;
932
933 while (root_atp_dev) {
934 struct net_local *atp_local = netdev_priv(root_atp_dev);
935 next_dev = atp_local->next_module;
936 unregister_netdev(root_atp_dev);
937
938 free_netdev(root_atp_dev);
939 root_atp_dev = next_dev;
940 }
941}
942
943module_init(atp_init_module);
944module_exit(atp_cleanup_module);
945