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39#ifndef _CXGB_COMMON_H_
40#define _CXGB_COMMON_H_
41
42#include <linux/module.h>
43#include <linux/netdevice.h>
44#include <linux/types.h>
45#include <linux/delay.h>
46#include <linux/pci.h>
47#include <linux/ethtool.h>
48#include <linux/if_vlan.h>
49#include <linux/mdio.h>
50#include <linux/crc32.h>
51#include <linux/init.h>
52#include <asm/io.h>
53#include <linux/pci_ids.h>
54
55#define DRV_DESCRIPTION "Chelsio 10Gb Ethernet Driver"
56#define DRV_NAME "cxgb"
57#define DRV_VERSION "2.2"
58#define PFX DRV_NAME ": "
59
60#define CH_ERR(fmt, ...) printk(KERN_ERR PFX fmt, ## __VA_ARGS__)
61#define CH_WARN(fmt, ...) printk(KERN_WARNING PFX fmt, ## __VA_ARGS__)
62#define CH_ALERT(fmt, ...) printk(KERN_ALERT PFX fmt, ## __VA_ARGS__)
63
64
65
66
67
68#define CH_MSG(adapter, level, category, fmt, ...) do { \
69 if ((adapter)->msg_enable & NETIF_MSG_##category) \
70 printk(KERN_##level PFX "%s: " fmt, (adapter)->name, \
71 ## __VA_ARGS__); \
72} while (0)
73
74#ifdef DEBUG
75# define CH_DBG(adapter, category, fmt, ...) \
76 CH_MSG(adapter, DEBUG, category, fmt, ## __VA_ARGS__)
77#else
78# define CH_DBG(fmt, ...)
79#endif
80
81#define CH_DEVICE(devid, ssid, idx) \
82 { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, ssid, 0, 0, idx }
83
84#define SUPPORTED_PAUSE (1 << 13)
85#define SUPPORTED_LOOPBACK (1 << 15)
86
87#define ADVERTISED_PAUSE (1 << 13)
88#define ADVERTISED_ASYM_PAUSE (1 << 14)
89
90typedef struct adapter adapter_t;
91
92struct t1_rx_mode {
93 struct net_device *dev;
94 u32 idx;
95 struct dev_mc_list *list;
96};
97
98#define t1_rx_mode_promisc(rm) (rm->dev->flags & IFF_PROMISC)
99#define t1_rx_mode_allmulti(rm) (rm->dev->flags & IFF_ALLMULTI)
100#define t1_rx_mode_mc_cnt(rm) (rm->dev->mc_count)
101
102static inline u8 *t1_get_next_mcaddr(struct t1_rx_mode *rm)
103{
104 u8 *addr = NULL;
105
106 if (rm->idx++ < rm->dev->mc_count) {
107 addr = rm->list->dmi_addr;
108 rm->list = rm->list->next;
109 }
110 return addr;
111}
112
113#define MAX_NPORTS 4
114#define PORT_MASK ((1 << MAX_NPORTS) - 1)
115#define NMTUS 8
116#define TCB_SIZE 128
117
118#define SPEED_INVALID 0xffff
119#define DUPLEX_INVALID 0xff
120
121enum {
122 CHBT_BOARD_N110,
123 CHBT_BOARD_N210,
124 CHBT_BOARD_7500,
125 CHBT_BOARD_8000,
126 CHBT_BOARD_CHT101,
127 CHBT_BOARD_CHT110,
128 CHBT_BOARD_CHT210,
129 CHBT_BOARD_CHT204,
130 CHBT_BOARD_CHT204V,
131 CHBT_BOARD_CHT204E,
132 CHBT_BOARD_CHN204,
133 CHBT_BOARD_COUGAR,
134 CHBT_BOARD_6800,
135 CHBT_BOARD_SIMUL,
136};
137
138enum {
139 CHBT_TERM_FPGA,
140 CHBT_TERM_T1,
141 CHBT_TERM_T2,
142 CHBT_TERM_T3
143};
144
145enum {
146 CHBT_MAC_CHELSIO_A,
147 CHBT_MAC_IXF1010,
148 CHBT_MAC_PM3393,
149 CHBT_MAC_VSC7321,
150 CHBT_MAC_DUMMY
151};
152
153enum {
154 CHBT_PHY_88E1041,
155 CHBT_PHY_88E1111,
156 CHBT_PHY_88X2010,
157 CHBT_PHY_XPAK,
158 CHBT_PHY_MY3126,
159 CHBT_PHY_8244,
160 CHBT_PHY_DUMMY
161};
162
163enum {
164 PAUSE_RX = 1 << 0,
165 PAUSE_TX = 1 << 1,
166 PAUSE_AUTONEG = 1 << 2
167};
168
169
170enum {
171 TERM_T1A = 0,
172 TERM_T1B = 1,
173 TERM_T2 = 3
174};
175
176struct sge_params {
177 unsigned int cmdQ_size[2];
178 unsigned int freelQ_size[2];
179 unsigned int large_buf_capacity;
180 unsigned int rx_coalesce_usecs;
181 unsigned int last_rx_coalesce_raw;
182 unsigned int default_rx_coalesce_usecs;
183 unsigned int sample_interval_usecs;
184 unsigned int coalesce_enable;
185 unsigned int polling;
186};
187
188struct chelsio_pci_params {
189 unsigned short speed;
190 unsigned char width;
191 unsigned char is_pcix;
192};
193
194struct tp_params {
195 unsigned int pm_size;
196 unsigned int cm_size;
197 unsigned int pm_rx_base;
198 unsigned int pm_tx_base;
199 unsigned int pm_rx_pg_size;
200 unsigned int pm_tx_pg_size;
201 unsigned int pm_rx_num_pgs;
202 unsigned int pm_tx_num_pgs;
203 unsigned int rx_coalescing_size;
204 unsigned int use_5tuple_mode;
205};
206
207struct mc5_params {
208 unsigned int mode;
209 unsigned int nservers;
210 unsigned int nroutes;
211};
212
213
214#define DEFAULT_SERVER_REGION_LEN 256
215#define DEFAULT_RT_REGION_LEN 1024
216
217struct adapter_params {
218 struct sge_params sge;
219 struct mc5_params mc5;
220 struct tp_params tp;
221 struct chelsio_pci_params pci;
222
223 const struct board_info *brd_info;
224
225 unsigned short mtus[NMTUS];
226 unsigned int nports;
227 unsigned int stats_update_period;
228 unsigned short chip_revision;
229 unsigned char chip_version;
230 unsigned char is_asic;
231 unsigned char has_msi;
232};
233
234struct link_config {
235 unsigned int supported;
236 unsigned int advertising;
237 unsigned short requested_speed;
238 unsigned short speed;
239 unsigned char requested_duplex;
240 unsigned char duplex;
241 unsigned char requested_fc;
242 unsigned char fc;
243 unsigned char autoneg;
244};
245
246struct cmac;
247struct cphy;
248
249struct port_info {
250 struct net_device *dev;
251 struct cmac *mac;
252 struct cphy *phy;
253 struct link_config link_config;
254 struct net_device_stats netstats;
255};
256
257struct sge;
258struct peespi;
259
260struct adapter {
261 u8 __iomem *regs;
262 struct pci_dev *pdev;
263 unsigned long registered_device_map;
264 unsigned long open_device_map;
265 unsigned long flags;
266
267 const char *name;
268 int msg_enable;
269 u32 mmio_len;
270
271 struct work_struct ext_intr_handler_task;
272 struct adapter_params params;
273
274 struct vlan_group *vlan_grp;
275
276
277 struct sge *sge;
278 struct peespi *espi;
279 struct petp *tp;
280
281 struct napi_struct napi;
282 struct port_info port[MAX_NPORTS];
283 struct delayed_work stats_update_task;
284 struct timer_list stats_update_timer;
285
286 spinlock_t tpi_lock;
287 spinlock_t work_lock;
288 spinlock_t mac_lock;
289
290
291 spinlock_t async_lock ____cacheline_aligned;
292 u32 slow_intr_mask;
293 int t1powersave;
294};
295
296enum {
297 FULL_INIT_DONE = 1 << 0,
298 TSO_CAPABLE = 1 << 2,
299 TCP_CSUM_CAPABLE = 1 << 3,
300 UDP_CSUM_CAPABLE = 1 << 4,
301 VLAN_ACCEL_CAPABLE = 1 << 5,
302 RX_CSUM_ENABLED = 1 << 6,
303};
304
305struct mdio_ops;
306struct gmac;
307struct gphy;
308
309struct board_info {
310 unsigned char board;
311 unsigned char port_number;
312 unsigned long caps;
313 unsigned char chip_term;
314 unsigned char chip_mac;
315 unsigned char chip_phy;
316 unsigned int clock_core;
317 unsigned int clock_mc3;
318 unsigned int clock_mc4;
319 unsigned int espi_nports;
320 unsigned int clock_cspi;
321 unsigned int clock_elmer0;
322 unsigned char mdio_mdien;
323 unsigned char mdio_mdiinv;
324 unsigned char mdio_mdc;
325 unsigned char mdio_phybaseaddr;
326 const struct gmac *gmac;
327 const struct gphy *gphy;
328 const struct mdio_ops *mdio_ops;
329 const char *desc;
330};
331
332static inline int t1_is_asic(const adapter_t *adapter)
333{
334 return adapter->params.is_asic;
335}
336
337extern struct pci_device_id t1_pci_tbl[];
338
339static inline int adapter_matches_type(const adapter_t *adapter,
340 int version, int revision)
341{
342 return adapter->params.chip_version == version &&
343 adapter->params.chip_revision == revision;
344}
345
346#define t1_is_T1B(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1B)
347#define is_T2(adap) adapter_matches_type(adap, CHBT_TERM_T2, TERM_T2)
348
349
350static inline int vlan_tso_capable(const adapter_t *adapter)
351{
352 return !t1_is_T1B(adapter);
353}
354
355#define for_each_port(adapter, iter) \
356 for (iter = 0; iter < (adapter)->params.nports; ++iter)
357
358#define board_info(adapter) ((adapter)->params.brd_info)
359#define is_10G(adapter) (board_info(adapter)->caps & SUPPORTED_10000baseT_Full)
360
361static inline unsigned int core_ticks_per_usec(const adapter_t *adap)
362{
363 return board_info(adap)->clock_core / 1000000;
364}
365
366extern int __t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp);
367extern int __t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
368extern int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
369extern int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *value);
370
371extern void t1_interrupts_enable(adapter_t *adapter);
372extern void t1_interrupts_disable(adapter_t *adapter);
373extern void t1_interrupts_clear(adapter_t *adapter);
374extern int t1_elmer0_ext_intr_handler(adapter_t *adapter);
375extern void t1_elmer0_ext_intr(adapter_t *adapter);
376extern int t1_slow_intr_handler(adapter_t *adapter);
377
378extern int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
379extern const struct board_info *t1_get_board_info(unsigned int board_id);
380extern const struct board_info *t1_get_board_info_from_ids(unsigned int devid,
381 unsigned short ssid);
382extern int t1_seeprom_read(adapter_t *adapter, u32 addr, __le32 *data);
383extern int t1_get_board_rev(adapter_t *adapter, const struct board_info *bi,
384 struct adapter_params *p);
385extern int t1_init_hw_modules(adapter_t *adapter);
386extern int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi);
387extern void t1_free_sw_modules(adapter_t *adapter);
388extern void t1_fatal_err(adapter_t *adapter);
389extern void t1_link_changed(adapter_t *adapter, int port_id);
390extern void t1_link_negotiated(adapter_t *adapter, int port_id, int link_stat,
391 int speed, int duplex, int pause);
392#endif
393
