linux/drivers/net/cxgb3/adapter.h
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   1/*
   2 * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and/or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 */
  32
  33/* This file should not be included directly.  Include common.h instead. */
  34
  35#ifndef __T3_ADAPTER_H__
  36#define __T3_ADAPTER_H__
  37
  38#include <linux/pci.h>
  39#include <linux/spinlock.h>
  40#include <linux/interrupt.h>
  41#include <linux/timer.h>
  42#include <linux/cache.h>
  43#include <linux/mutex.h>
  44#include <linux/bitops.h>
  45#include "t3cdev.h"
  46#include <asm/io.h>
  47
  48struct vlan_group;
  49struct adapter;
  50struct sge_qset;
  51
  52enum {                  /* rx_offload flags */
  53        T3_RX_CSUM      = 1 << 0,
  54        T3_LRO          = 1 << 1,
  55};
  56
  57struct port_info {
  58        struct adapter *adapter;
  59        struct vlan_group *vlan_grp;
  60        struct sge_qset *qs;
  61        u8 port_id;
  62        u8 rx_offload;
  63        u8 nqsets;
  64        u8 first_qset;
  65        struct cphy phy;
  66        struct cmac mac;
  67        struct link_config link_config;
  68        struct net_device_stats netstats;
  69        int activity;
  70        __be32 iscsi_ipv4addr;
  71
  72        int link_fault; /* link fault was detected */
  73};
  74
  75enum {                          /* adapter flags */
  76        FULL_INIT_DONE = (1 << 0),
  77        USING_MSI = (1 << 1),
  78        USING_MSIX = (1 << 2),
  79        QUEUES_BOUND = (1 << 3),
  80        TP_PARITY_INIT = (1 << 4),
  81        NAPI_INIT = (1 << 5),
  82};
  83
  84struct fl_pg_chunk {
  85        struct page *page;
  86        void *va;
  87        unsigned int offset;
  88        unsigned long *p_cnt;
  89        dma_addr_t mapping;
  90};
  91
  92struct rx_desc;
  93struct rx_sw_desc;
  94
  95struct sge_fl {                     /* SGE per free-buffer list state */
  96        unsigned int buf_size;      /* size of each Rx buffer */
  97        unsigned int credits;       /* # of available Rx buffers */
  98        unsigned int pend_cred;     /* new buffers since last FL DB ring */
  99        unsigned int size;          /* capacity of free list */
 100        unsigned int cidx;          /* consumer index */
 101        unsigned int pidx;          /* producer index */
 102        unsigned int gen;           /* free list generation */
 103        struct fl_pg_chunk pg_chunk;/* page chunk cache */
 104        unsigned int use_pages;     /* whether FL uses pages or sk_buffs */
 105        unsigned int order;         /* order of page allocations */
 106        unsigned int alloc_size;    /* size of allocated buffer */
 107        struct rx_desc *desc;       /* address of HW Rx descriptor ring */
 108        struct rx_sw_desc *sdesc;   /* address of SW Rx descriptor ring */
 109        dma_addr_t   phys_addr;     /* physical address of HW ring start */
 110        unsigned int cntxt_id;      /* SGE context id for the free list */
 111        unsigned long empty;        /* # of times queue ran out of buffers */
 112        unsigned long alloc_failed; /* # of times buffer allocation failed */
 113};
 114
 115/*
 116 * Bundle size for grouping offload RX packets for delivery to the stack.
 117 * Don't make this too big as we do prefetch on each packet in a bundle.
 118 */
 119# define RX_BUNDLE_SIZE 8
 120
 121struct rsp_desc;
 122
 123struct sge_rspq {               /* state for an SGE response queue */
 124        unsigned int credits;   /* # of pending response credits */
 125        unsigned int size;      /* capacity of response queue */
 126        unsigned int cidx;      /* consumer index */
 127        unsigned int gen;       /* current generation bit */
 128        unsigned int polling;   /* is the queue serviced through NAPI? */
 129        unsigned int holdoff_tmr;       /* interrupt holdoff timer in 100ns */
 130        unsigned int next_holdoff;      /* holdoff time for next interrupt */
 131        unsigned int rx_recycle_buf; /* whether recycling occurred
 132                                        within current sop-eop */
 133        struct rsp_desc *desc;  /* address of HW response ring */
 134        dma_addr_t phys_addr;   /* physical address of the ring */
 135        unsigned int cntxt_id;  /* SGE context id for the response q */
 136        spinlock_t lock;        /* guards response processing */
 137        struct sk_buff_head rx_queue; /* offload packet receive queue */
 138        struct sk_buff *pg_skb; /* used to build frag list in napi handler */
 139
 140        unsigned long offload_pkts;
 141        unsigned long offload_bundles;
 142        unsigned long eth_pkts; /* # of ethernet packets */
 143        unsigned long pure_rsps;        /* # of pure (non-data) responses */
 144        unsigned long imm_data; /* responses with immediate data */
 145        unsigned long rx_drops; /* # of packets dropped due to no mem */
 146        unsigned long async_notif; /* # of asynchronous notification events */
 147        unsigned long empty;    /* # of times queue ran out of credits */
 148        unsigned long nomem;    /* # of responses deferred due to no mem */
 149        unsigned long unhandled_irqs;   /* # of spurious intrs */
 150        unsigned long starved;
 151        unsigned long restarted;
 152};
 153
 154struct tx_desc;
 155struct tx_sw_desc;
 156
 157struct sge_txq {                /* state for an SGE Tx queue */
 158        unsigned long flags;    /* HW DMA fetch status */
 159        unsigned int in_use;    /* # of in-use Tx descriptors */
 160        unsigned int size;      /* # of descriptors */
 161        unsigned int processed; /* total # of descs HW has processed */
 162        unsigned int cleaned;   /* total # of descs SW has reclaimed */
 163        unsigned int stop_thres;        /* SW TX queue suspend threshold */
 164        unsigned int cidx;      /* consumer index */
 165        unsigned int pidx;      /* producer index */
 166        unsigned int gen;       /* current value of generation bit */
 167        unsigned int unacked;   /* Tx descriptors used since last COMPL */
 168        struct tx_desc *desc;   /* address of HW Tx descriptor ring */
 169        struct tx_sw_desc *sdesc;       /* address of SW Tx descriptor ring */
 170        spinlock_t lock;        /* guards enqueueing of new packets */
 171        unsigned int token;     /* WR token */
 172        dma_addr_t phys_addr;   /* physical address of the ring */
 173        struct sk_buff_head sendq;      /* List of backpressured offload packets */
 174        struct tasklet_struct qresume_tsk;      /* restarts the queue */
 175        unsigned int cntxt_id;  /* SGE context id for the Tx q */
 176        unsigned long stops;    /* # of times q has been stopped */
 177        unsigned long restarts; /* # of queue restarts */
 178};
 179
 180enum {                          /* per port SGE statistics */
 181        SGE_PSTAT_TSO,          /* # of TSO requests */
 182        SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */
 183        SGE_PSTAT_TX_CSUM,      /* # of TX checksum offloads */
 184        SGE_PSTAT_VLANEX,       /* # of VLAN tag extractions */
 185        SGE_PSTAT_VLANINS,      /* # of VLAN tag insertions */
 186
 187        SGE_PSTAT_MAX           /* must be last */
 188};
 189
 190struct napi_gro_fraginfo;
 191
 192struct sge_qset {               /* an SGE queue set */
 193        struct adapter *adap;
 194        struct napi_struct napi;
 195        struct sge_rspq rspq;
 196        struct sge_fl fl[SGE_RXQ_PER_SET];
 197        struct sge_txq txq[SGE_TXQ_PER_SET];
 198        int nomem;
 199        int lro_enabled;
 200        void *lro_va;
 201        struct net_device *netdev;
 202        struct netdev_queue *tx_q;      /* associated netdev TX queue */
 203        unsigned long txq_stopped;      /* which Tx queues are stopped */
 204        struct timer_list tx_reclaim_timer;     /* reclaims TX buffers */
 205        struct timer_list rx_reclaim_timer;     /* reclaims RX buffers */
 206        unsigned long port_stats[SGE_PSTAT_MAX];
 207} ____cacheline_aligned;
 208
 209struct sge {
 210        struct sge_qset qs[SGE_QSETS];
 211        spinlock_t reg_lock;    /* guards non-atomic SGE registers (eg context) */
 212};
 213
 214struct adapter {
 215        struct t3cdev tdev;
 216        struct list_head adapter_list;
 217        void __iomem *regs;
 218        struct pci_dev *pdev;
 219        unsigned long registered_device_map;
 220        unsigned long open_device_map;
 221        unsigned long flags;
 222
 223        const char *name;
 224        int msg_enable;
 225        unsigned int mmio_len;
 226
 227        struct adapter_params params;
 228        unsigned int slow_intr_mask;
 229        unsigned long irq_stats[IRQ_NUM_STATS];
 230
 231        int msix_nvectors;
 232        struct {
 233                unsigned short vec;
 234                char desc[22];
 235        } msix_info[SGE_QSETS + 1];
 236
 237        /* T3 modules */
 238        struct sge sge;
 239        struct mc7 pmrx;
 240        struct mc7 pmtx;
 241        struct mc7 cm;
 242        struct mc5 mc5;
 243
 244        struct net_device *port[MAX_NPORTS];
 245        unsigned int check_task_cnt;
 246        struct delayed_work adap_check_task;
 247        struct work_struct ext_intr_handler_task;
 248        struct work_struct fatal_error_handler_task;
 249        struct work_struct link_fault_handler_task;
 250
 251        struct dentry *debugfs_root;
 252
 253        struct mutex mdio_lock;
 254        spinlock_t stats_lock;
 255        spinlock_t work_lock;
 256
 257        struct sk_buff *nofail_skb;
 258};
 259
 260static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr)
 261{
 262        u32 val = readl(adapter->regs + reg_addr);
 263
 264        CH_DBG(adapter, MMIO, "read register 0x%x value 0x%x\n", reg_addr, val);
 265        return val;
 266}
 267
 268static inline void t3_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
 269{
 270        CH_DBG(adapter, MMIO, "setting register 0x%x to 0x%x\n", reg_addr, val);
 271        writel(val, adapter->regs + reg_addr);
 272}
 273
 274static inline struct port_info *adap2pinfo(struct adapter *adap, int idx)
 275{
 276        return netdev_priv(adap->port[idx]);
 277}
 278
 279static inline int phy2portid(struct cphy *phy)
 280{
 281        struct adapter *adap = phy->adapter;
 282        struct port_info *port0 = adap2pinfo(adap, 0);
 283
 284        return &port0->phy == phy ? 0 : 1;
 285}
 286
 287#define OFFLOAD_DEVMAP_BIT 15
 288
 289#define tdev2adap(d) container_of(d, struct adapter, tdev)
 290
 291static inline int offload_running(struct adapter *adapter)
 292{
 293        return test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
 294}
 295
 296int t3_offload_tx(struct t3cdev *tdev, struct sk_buff *skb);
 297
 298void t3_os_ext_intr_handler(struct adapter *adapter);
 299void t3_os_link_changed(struct adapter *adapter, int port_id, int link_status,
 300                        int speed, int duplex, int fc);
 301void t3_os_phymod_changed(struct adapter *adap, int port_id);
 302void t3_os_link_fault(struct adapter *adapter, int port_id, int state);
 303void t3_os_link_fault_handler(struct adapter *adapter, int port_id);
 304
 305void t3_sge_start(struct adapter *adap);
 306void t3_sge_stop(struct adapter *adap);
 307void t3_start_sge_timers(struct adapter *adap);
 308void t3_stop_sge_timers(struct adapter *adap);
 309void t3_free_sge_resources(struct adapter *adap);
 310void t3_sge_err_intr_handler(struct adapter *adapter);
 311irq_handler_t t3_intr_handler(struct adapter *adap, int polling);
 312netdev_tx_t t3_eth_xmit(struct sk_buff *skb, struct net_device *dev);
 313int t3_mgmt_tx(struct adapter *adap, struct sk_buff *skb);
 314void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p);
 315int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
 316                      int irq_vec_idx, const struct qset_params *p,
 317                      int ntxq, struct net_device *dev,
 318                      struct netdev_queue *netdevq);
 319int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx,
 320                unsigned char *data);
 321irqreturn_t t3_sge_intr_msix(int irq, void *cookie);
 322
 323int t3_get_edc_fw(struct cphy *phy, int edc_idx, int size);
 324
 325#endif                          /* __T3_ADAPTER_H__ */
 326