LXR linux/drivers/net/e1000e/e1000.h

   1/*******************************************************************************
   2
   3  Intel PRO/1000 Linux driver
   4  Copyright(c) 1999 - 2008 Intel Corporation.
   5
   6  This program is free software; you can redistribute it and/or modify it
   7  under the terms and conditions of the GNU General Public License,
   8  version 2, as published by the Free Software Foundation.
   9
  10  This program is distributed in the hope it will be useful, but WITHOUT
  11  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  more details.
  14
  15  You should have received a copy of the GNU General Public License along with
  16  this program; if not, write to the Free Software Foundation, Inc.,
  17  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19  The full GNU General Public License is included in this distribution in
  20  the file called "COPYING".
  21
  22  Contact Information:
  23  Linux NICS <linux.nics@intel.com>
  24  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27*******************************************************************************/
  28
  29/* Linux PRO/1000 Ethernet Driver main header file */
  30
  31#ifndef _E1000_H_
  32#define _E1000_H_
  33
  34#include <linux/types.h>
  35#include <linux/timer.h>
  36#include <linux/workqueue.h>
  37#include <linux/io.h>
  38#include <linux/netdevice.h>
  39
  40#include "hw.h"
  41
  42struct e1000_info;
  43
  44#define e_printk(level, adapter, format, arg...) \
  45        printk(level "%s: %s: " format, pci_name(adapter->pdev), \
  46               adapter->netdev->name, ## arg)
  47
  48#ifdef DEBUG
  49#define e_dbg(format, arg...) \
  50        e_printk(KERN_DEBUG , adapter, format, ## arg)
  51#else
  52#define e_dbg(format, arg...) do { (void)(adapter); } while (0)
  53#endif
  54
  55#define e_err(format, arg...) \
  56        e_printk(KERN_ERR, adapter, format, ## arg)
  57#define e_info(format, arg...) \
  58        e_printk(KERN_INFO, adapter, format, ## arg)
  59#define e_warn(format, arg...) \
  60        e_printk(KERN_WARNING, adapter, format, ## arg)
  61#define e_notice(format, arg...) \
  62        e_printk(KERN_NOTICE, adapter, format, ## arg)
  63
  64
  65/* Interrupt modes, as used by the IntMode parameter */
  66#define E1000E_INT_MODE_LEGACY          0
  67#define E1000E_INT_MODE_MSI             1
  68#define E1000E_INT_MODE_MSIX            2
  69
  70/* Tx/Rx descriptor defines */
  71#define E1000_DEFAULT_TXD               256
  72#define E1000_MAX_TXD                   4096
  73#define E1000_MIN_TXD                   64
  74
  75#define E1000_DEFAULT_RXD               256
  76#define E1000_MAX_RXD                   4096
  77#define E1000_MIN_RXD                   64
  78
  79#define E1000_MIN_ITR_USECS             10 /* 100000 irq/sec */
  80#define E1000_MAX_ITR_USECS             10000 /* 100    irq/sec */
  81
  82/* Early Receive defines */
  83#define E1000_ERT_2048                  0x100
  84
  85#define E1000_FC_PAUSE_TIME             0x0680 /* 858 usec */
  86
  87/* How many Tx Descriptors do we need to call netif_wake_queue ? */
  88/* How many Rx Buffers do we bundle into one write to the hardware ? */
  89#define E1000_RX_BUFFER_WRITE           16 /* Must be power of 2 */
  90
  91#define AUTO_ALL_MODES                  0
  92#define E1000_EEPROM_APME               0x0400
  93
  94#define E1000_MNG_VLAN_NONE             (-1)
  95
  96/* Number of packet split data buffers (not including the header buffer) */
  97#define PS_PAGE_BUFFERS                 (MAX_PS_BUFFERS - 1)
  98
  99#define DEFAULT_JUMBO                   9234
 100
 101/* BM/HV Specific Registers */
 102#define BM_PORT_CTRL_PAGE                 769
 103
 104#define PHY_UPPER_SHIFT                   21
 105#define BM_PHY_REG(page, reg) \
 106        (((reg) & MAX_PHY_REG_ADDRESS) |\
 107         (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
 108         (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
 109
 110/* PHY Wakeup Registers and defines */
 111#define BM_RCTL         PHY_REG(BM_WUC_PAGE, 0)
 112#define BM_WUC          PHY_REG(BM_WUC_PAGE, 1)
 113#define BM_WUFC         PHY_REG(BM_WUC_PAGE, 2)
 114#define BM_WUS          PHY_REG(BM_WUC_PAGE, 3)
 115#define BM_RAR_L(_i)    (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
 116#define BM_RAR_M(_i)    (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
 117#define BM_RAR_H(_i)    (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
 118#define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
 119#define BM_MTA(_i)      (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
 120
 121#define BM_RCTL_UPE           0x0001          /* Unicast Promiscuous Mode */
 122#define BM_RCTL_MPE           0x0002          /* Multicast Promiscuous Mode */
 123#define BM_RCTL_MO_SHIFT      3               /* Multicast Offset Shift */
 124#define BM_RCTL_MO_MASK       (3 << 3)        /* Multicast Offset Mask */
 125#define BM_RCTL_BAM           0x0020          /* Broadcast Accept Mode */
 126#define BM_RCTL_PMCF          0x0040          /* Pass MAC Control Frames */
 127#define BM_RCTL_RFCE          0x0080          /* Rx Flow Control Enable */
 128
 129#define HV_SCC_UPPER            PHY_REG(778, 16) /* Single Collision Count */
 130#define HV_SCC_LOWER            PHY_REG(778, 17)
 131#define HV_ECOL_UPPER           PHY_REG(778, 18) /* Excessive Collision Count */
 132#define HV_ECOL_LOWER           PHY_REG(778, 19)
 133#define HV_MCC_UPPER            PHY_REG(778, 20) /* Multiple Collision Count */
 134#define HV_MCC_LOWER            PHY_REG(778, 21)
 135#define HV_LATECOL_UPPER        PHY_REG(778, 23) /* Late Collision Count */
 136#define HV_LATECOL_LOWER        PHY_REG(778, 24)
 137#define HV_COLC_UPPER           PHY_REG(778, 25) /* Collision Count */
 138#define HV_COLC_LOWER           PHY_REG(778, 26)
 139#define HV_DC_UPPER             PHY_REG(778, 27) /* Defer Count */
 140#define HV_DC_LOWER             PHY_REG(778, 28)
 141#define HV_TNCRS_UPPER          PHY_REG(778, 29) /* Transmit with no CRS */
 142#define HV_TNCRS_LOWER          PHY_REG(778, 30)
 143
 144#define E1000_FCRTV_PCH     0x05F40 /* PCH Flow Control Refresh Timer Value */
 145
 146/* BM PHY Copper Specific Status */
 147#define BM_CS_STATUS                      17
 148#define BM_CS_STATUS_LINK_UP              0x0400
 149#define BM_CS_STATUS_RESOLVED             0x0800
 150#define BM_CS_STATUS_SPEED_MASK           0xC000
 151#define BM_CS_STATUS_SPEED_1000           0x8000
 152
 153/* 82577 Mobile Phy Status Register */
 154#define HV_M_STATUS                       26
 155#define HV_M_STATUS_AUTONEG_COMPLETE      0x1000
 156#define HV_M_STATUS_SPEED_MASK            0x0300
 157#define HV_M_STATUS_SPEED_1000            0x0200
 158#define HV_M_STATUS_LINK_UP               0x0040
 159
 160enum e1000_boards {
 161        board_82571,
 162        board_82572,
 163        board_82573,
 164        board_82574,
 165        board_82583,
 166        board_80003es2lan,
 167        board_ich8lan,
 168        board_ich9lan,
 169        board_ich10lan,
 170        board_pchlan,
 171};
 172
 173struct e1000_queue_stats {
 174        u64 packets;
 175        u64 bytes;
 176};
 177
 178struct e1000_ps_page {
 179        struct page *page;
 180        u64 dma; /* must be u64 - written to hw */
 181};
 182
 183/*
 184 * wrappers around a pointer to a socket buffer,
 185 * so a DMA handle can be stored along with the buffer
 186 */
 187struct e1000_buffer {
 188        dma_addr_t dma;
 189        struct sk_buff *skb;
 190        union {
 191                /* Tx */
 192                struct {
 193                        unsigned long time_stamp;
 194                        u16 length;
 195                        u16 next_to_watch;
 196                };
 197                /* Rx */
 198                /* arrays of page information for packet split */
 199                struct e1000_ps_page *ps_pages;
 200        };
 201        struct page *page;
 202};
 203
 204struct e1000_ring {
 205        void *desc;                     /* pointer to ring memory  */
 206        dma_addr_t dma;                 /* phys address of ring    */
 207        unsigned int size;              /* length of ring in bytes */
 208        unsigned int count;             /* number of desc. in ring */
 209
 210        u16 next_to_use;
 211        u16 next_to_clean;
 212
 213        u16 head;
 214        u16 tail;
 215
 216        /* array of buffer information structs */
 217        struct e1000_buffer *buffer_info;
 218
 219        char name[IFNAMSIZ + 5];
 220        u32 ims_val;
 221        u32 itr_val;
 222        u16 itr_register;
 223        int set_itr;
 224
 225        struct sk_buff *rx_skb_top;
 226
 227        struct e1000_queue_stats stats;
 228};
 229
 230/* PHY register snapshot values */
 231struct e1000_phy_regs {
 232        u16 bmcr;               /* basic mode control register    */
 233        u16 bmsr;               /* basic mode status register     */
 234        u16 advertise;          /* auto-negotiation advertisement */
 235        u16 lpa;                /* link partner ability register  */
 236        u16 expansion;          /* auto-negotiation expansion reg */
 237        u16 ctrl1000;           /* 1000BASE-T control register    */
 238        u16 stat1000;           /* 1000BASE-T status register     */
 239        u16 estatus;            /* extended status register       */
 240};
 241
 242/* board specific private data structure */
 243struct e1000_adapter {
 244        struct timer_list watchdog_timer;
 245        struct timer_list phy_info_timer;
 246        struct timer_list blink_timer;
 247
 248        struct work_struct reset_task;
 249        struct work_struct watchdog_task;
 250
 251        const struct e1000_info *ei;
 252
 253        struct vlan_group *vlgrp;
 254        u32 bd_number;
 255        u32 rx_buffer_len;
 256        u16 mng_vlan_id;
 257        u16 link_speed;
 258        u16 link_duplex;
 259        u16 eeprom_vers;
 260
 261        /* track device up/down/testing state */
 262        unsigned long state;
 263
 264        /* Interrupt Throttle Rate */
 265        u32 itr;
 266        u32 itr_setting;
 267        u16 tx_itr;
 268        u16 rx_itr;
 269
 270        /*
 271         * Tx
 272         */
 273        struct e1000_ring *tx_ring /* One per active queue */
 274                                                ____cacheline_aligned_in_smp;
 275
 276        struct napi_struct napi;
 277
 278        unsigned long tx_queue_len;
 279        unsigned int restart_queue;
 280        u32 txd_cmd;
 281
 282        bool detect_tx_hung;
 283        u8 tx_timeout_factor;
 284
 285        u32 tx_int_delay;
 286        u32 tx_abs_int_delay;
 287
 288        unsigned int total_tx_bytes;
 289        unsigned int total_tx_packets;
 290        unsigned int total_rx_bytes;
 291        unsigned int total_rx_packets;
 292
 293        /* Tx stats */
 294        u64 tpt_old;
 295        u64 colc_old;
 296        u32 gotc;
 297        u64 gotc_old;
 298        u32 tx_timeout_count;
 299        u32 tx_fifo_head;
 300        u32 tx_head_addr;
 301        u32 tx_fifo_size;
 302        u32 tx_dma_failed;
 303
 304        /*
 305         * Rx
 306         */
 307        bool (*clean_rx) (struct e1000_adapter *adapter,
 308                          int *work_done, int work_to_do)
 309                                                ____cacheline_aligned_in_smp;
 310        void (*alloc_rx_buf) (struct e1000_adapter *adapter,
 311                              int cleaned_count);
 312        struct e1000_ring *rx_ring;
 313
 314        u32 rx_int_delay;
 315        u32 rx_abs_int_delay;
 316
 317        /* Rx stats */
 318        u64 hw_csum_err;
 319        u64 hw_csum_good;
 320        u64 rx_hdr_split;
 321        u32 gorc;
 322        u64 gorc_old;
 323        u32 alloc_rx_buff_failed;
 324        u32 rx_dma_failed;
 325
 326        unsigned int rx_ps_pages;
 327        u16 rx_ps_bsize0;
 328        u32 max_frame_size;
 329        u32 min_frame_size;
 330
 331        /* OS defined structs */
 332        struct net_device *netdev;
 333        struct pci_dev *pdev;
 334        struct net_device_stats net_stats;
 335
 336        /* structs defined in e1000_hw.h */
 337        struct e1000_hw hw;
 338
 339        struct e1000_hw_stats stats;
 340        struct e1000_phy_info phy_info;
 341        struct e1000_phy_stats phy_stats;
 342
 343        /* Snapshot of PHY registers */
 344        struct e1000_phy_regs phy_regs;
 345
 346        struct e1000_ring test_tx_ring;
 347        struct e1000_ring test_rx_ring;
 348        u32 test_icr;
 349
 350        u32 msg_enable;
 351        struct msix_entry *msix_entries;
 352        int int_mode;
 353        u32 eiac_mask;
 354
 355        u32 eeprom_wol;
 356        u32 wol;
 357        u32 pba;
 358        u32 max_hw_frame_size;
 359
 360        bool fc_autoneg;
 361
 362        unsigned long led_status;
 363
 364        unsigned int flags;
 365        unsigned int flags2;
 366        struct work_struct downshift_task;
 367        struct work_struct update_phy_task;
 368        struct work_struct led_blink_task;
 369};
 370
 371struct e1000_info {
 372        enum e1000_mac_type     mac;
 373        unsigned int            flags;
 374        unsigned int            flags2;
 375        u32                     pba;
 376        u32                     max_hw_frame_size;
 377        s32                     (*get_variants)(struct e1000_adapter *);
 378        struct e1000_mac_operations *mac_ops;
 379        struct e1000_phy_operations *phy_ops;
 380        struct e1000_nvm_operations *nvm_ops;
 381};
 382
 383/* hardware capability, feature, and workaround flags */
 384#define FLAG_HAS_AMT                      (1 << 0)
 385#define FLAG_HAS_FLASH                    (1 << 1)
 386#define FLAG_HAS_HW_VLAN_FILTER           (1 << 2)
 387#define FLAG_HAS_WOL                      (1 << 3)
 388#define FLAG_HAS_ERT                      (1 << 4)
 389#define FLAG_HAS_CTRLEXT_ON_LOAD          (1 << 5)
 390#define FLAG_HAS_SWSM_ON_LOAD             (1 << 6)
 391#define FLAG_HAS_JUMBO_FRAMES             (1 << 7)
 392#define FLAG_READ_ONLY_NVM                (1 << 8)
 393#define FLAG_IS_ICH                       (1 << 9)
 394#define FLAG_HAS_MSIX                     (1 << 10)
 395#define FLAG_HAS_SMART_POWER_DOWN         (1 << 11)
 396#define FLAG_IS_QUAD_PORT_A               (1 << 12)
 397#define FLAG_IS_QUAD_PORT                 (1 << 13)
 398#define FLAG_TIPG_MEDIUM_FOR_80003ESLAN   (1 << 14)
 399#define FLAG_APME_IN_WUC                  (1 << 15)
 400#define FLAG_APME_IN_CTRL3                (1 << 16)
 401#define FLAG_APME_CHECK_PORT_B            (1 << 17)
 402#define FLAG_DISABLE_FC_PAUSE_TIME        (1 << 18)
 403#define FLAG_NO_WAKE_UCAST                (1 << 19)
 404#define FLAG_MNG_PT_ENABLED               (1 << 20)
 405#define FLAG_RESET_OVERWRITES_LAA         (1 << 21)
 406#define FLAG_TARC_SPEED_MODE_BIT          (1 << 22)
 407#define FLAG_TARC_SET_BIT_ZERO            (1 << 23)
 408#define FLAG_RX_NEEDS_RESTART             (1 << 24)
 409#define FLAG_LSC_GIG_SPEED_DROP           (1 << 25)
 410#define FLAG_SMART_POWER_DOWN             (1 << 26)
 411#define FLAG_MSI_ENABLED                  (1 << 27)
 412#define FLAG_RX_CSUM_ENABLED              (1 << 28)
 413#define FLAG_TSO_FORCE                    (1 << 29)
 414#define FLAG_RX_RESTART_NOW               (1 << 30)
 415#define FLAG_MSI_TEST_FAILED              (1 << 31)
 416
 417/* CRC Stripping defines */
 418#define FLAG2_CRC_STRIPPING               (1 << 0)
 419#define FLAG2_HAS_PHY_WAKEUP              (1 << 1)
 420
 421#define E1000_RX_DESC_PS(R, i)      \
 422        (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
 423#define E1000_GET_DESC(R, i, type)      (&(((struct type *)((R).desc))[i]))
 424#define E1000_RX_DESC(R, i)             E1000_GET_DESC(R, i, e1000_rx_desc)
 425#define E1000_TX_DESC(R, i)             E1000_GET_DESC(R, i, e1000_tx_desc)
 426#define E1000_CONTEXT_DESC(R, i)        E1000_GET_DESC(R, i, e1000_context_desc)
 427
 428enum e1000_state_t {
 429        __E1000_TESTING,
 430        __E1000_RESETTING,
 431        __E1000_DOWN
 432};
 433
 434enum latency_range {
 435        lowest_latency = 0,
 436        low_latency = 1,
 437        bulk_latency = 2,
 438        latency_invalid = 255
 439};
 440
 441extern char e1000e_driver_name[];
 442extern const char e1000e_driver_version[];
 443
 444extern void e1000e_check_options(struct e1000_adapter *adapter);
 445extern void e1000e_set_ethtool_ops(struct net_device *netdev);
 446
 447extern int e1000e_up(struct e1000_adapter *adapter);
 448extern void e1000e_down(struct e1000_adapter *adapter);
 449extern void e1000e_reinit_locked(struct e1000_adapter *adapter);
 450extern void e1000e_reset(struct e1000_adapter *adapter);
 451extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
 452extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
 453extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
 454extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
 455extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
 456extern void e1000e_update_stats(struct e1000_adapter *adapter);
 457extern bool e1000_has_link(struct e1000_adapter *adapter);
 458extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
 459extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
 460
 461extern unsigned int copybreak;
 462
 463extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
 464
 465extern struct e1000_info e1000_82571_info;
 466extern struct e1000_info e1000_82572_info;
 467extern struct e1000_info e1000_82573_info;
 468extern struct e1000_info e1000_82574_info;
 469extern struct e1000_info e1000_82583_info;
 470extern struct e1000_info e1000_ich8_info;
 471extern struct e1000_info e1000_ich9_info;
 472extern struct e1000_info e1000_ich10_info;
 473extern struct e1000_info e1000_pch_info;
 474extern struct e1000_info e1000_es2_info;
 475
 476extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
 477
 478extern s32  e1000e_commit_phy(struct e1000_hw *hw);
 479
 480extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
 481
 482extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
 483extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
 484
 485extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
 486extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
 487                                                 bool state);
 488extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
 489extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
 490extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
 491
 492extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
 493extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
 494extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
 495extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
 496extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
 497extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
 498extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
 499extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
 500extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
 501extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
 502extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
 503extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
 504extern s32 e1000e_id_led_init(struct e1000_hw *hw);
 505extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
 506extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
 507extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
 508extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
 509extern s32 e1000e_setup_link(struct e1000_hw *hw);
 510extern void e1000e_clear_vfta(struct e1000_hw *hw);
 511extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
 512extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
 513                                               u8 *mc_addr_list,
 514                                               u32 mc_addr_count,
 515                                               u32 rar_used_count,
 516                                               u32 rar_count);
 517extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
 518extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
 519extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
 520extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
 521extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
 522extern void e1000e_config_collision_dist(struct e1000_hw *hw);
 523extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
 524extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
 525extern s32 e1000e_blink_led(struct e1000_hw *hw);
 526extern void e1000e_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
 527extern void e1000e_reset_adaptive(struct e1000_hw *hw);
 528extern void e1000e_update_adaptive(struct e1000_hw *hw);
 529
 530extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
 531extern s32 e1000e_get_phy_id(struct e1000_hw *hw);
 532extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
 533extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
 534extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
 535extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
 536extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
 537extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
 538extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
 539                                          u16 *data);
 540extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
 541extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
 542extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
 543extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
 544                                           u16 data);
 545extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
 546extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
 547extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
 548extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
 549extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
 550extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
 551extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
 552extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
 553extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
 554extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
 555extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
 556extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
 557extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
 558extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
 559extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
 560extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
 561extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
 562                                        u16 data);
 563extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
 564extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
 565                                       u16 *data);
 566extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
 567                               u32 usec_interval, bool *success);
 568extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
 569extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
 570extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
 571extern s32 e1000e_check_downshift(struct e1000_hw *hw);
 572extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
 573extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
 574                                        u16 *data);
 575extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
 576extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
 577                                         u16 data);
 578extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow);
 579extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
 580extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
 581extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
 582extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
 583extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
 584extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
 585
 586static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
 587{
 588        return hw->phy.ops.reset_phy(hw);
 589}
 590
 591static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
 592{
 593        return hw->phy.ops.check_reset_block(hw);
 594}
 595
 596static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
 597{
 598        return hw->phy.ops.read_phy_reg(hw, offset, data);
 599}
 600
 601static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
 602{
 603        return hw->phy.ops.write_phy_reg(hw, offset, data);
 604}
 605
 606static inline s32 e1000_get_cable_length(struct e1000_hw *hw)
 607{
 608        return hw->phy.ops.get_cable_length(hw);
 609}
 610
 611extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
 612extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
 613extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
 614extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
 615extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
 616extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
 617extern void e1000e_release_nvm(struct e1000_hw *hw);
 618extern void e1000e_reload_nvm(struct e1000_hw *hw);
 619extern s32 e1000e_read_mac_addr(struct e1000_hw *hw);
 620
 621static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
 622{
 623        return hw->nvm.ops.validate_nvm(hw);
 624}
 625
 626static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
 627{
 628        return hw->nvm.ops.update_nvm(hw);
 629}
 630
 631static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 632{
 633        return hw->nvm.ops.read_nvm(hw, offset, words, data);
 634}
 635
 636static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 637{
 638        return hw->nvm.ops.write_nvm(hw, offset, words, data);
 639}
 640
 641static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
 642{
 643        return hw->phy.ops.get_phy_info(hw);
 644}
 645
 646static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
 647{
 648        return hw->mac.ops.check_mng_mode(hw);
 649}
 650
 651extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
 652extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
 653extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
 654
 655static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
 656{
 657        return readl(hw->hw_addr + reg);
 658}
 659
 660static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 661{
 662        writel(val, hw->hw_addr + reg);
 663}
 664
 665#endif /* _E1000_H_ */
 666