LXR linux/drivers/net/enic/enic.h

   1/*
   2 * Copyright 2008 Cisco Systems, Inc.  All rights reserved.
   3 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4 *
   5 * This program is free software; you may redistribute it and/or modify
   6 * it under the terms of the GNU General Public License as published by
   7 * the Free Software Foundation; version 2 of the License.
   8 *
   9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16 * SOFTWARE.
  17 *
  18 */
  19
  20#ifndef _ENIC_H_
  21#define _ENIC_H_
  22
  23#include <linux/inet_lro.h>
  24
  25#include "vnic_enet.h"
  26#include "vnic_dev.h"
  27#include "vnic_wq.h"
  28#include "vnic_rq.h"
  29#include "vnic_cq.h"
  30#include "vnic_intr.h"
  31#include "vnic_stats.h"
  32#include "vnic_nic.h"
  33#include "vnic_rss.h"
  34
  35#define DRV_NAME                "enic"
  36#define DRV_DESCRIPTION         "Cisco 10G Ethernet Driver"
  37#define DRV_VERSION             "1.1.0.100"
  38#define DRV_COPYRIGHT           "Copyright 2008-2009 Cisco Systems, Inc"
  39#define PFX                     DRV_NAME ": "
  40
  41#define ENIC_LRO_MAX_DESC       8
  42#define ENIC_LRO_MAX_AGGR       64
  43
  44#define ENIC_BARS_MAX           6
  45
  46#define ENIC_WQ_MAX             8
  47#define ENIC_RQ_MAX             8
  48#define ENIC_CQ_MAX             (ENIC_WQ_MAX + ENIC_RQ_MAX)
  49#define ENIC_INTR_MAX           (ENIC_CQ_MAX + 2)
  50
  51enum enic_cq_index {
  52        ENIC_CQ_RQ,
  53        ENIC_CQ_WQ,
  54};
  55
  56enum enic_intx_intr_index {
  57        ENIC_INTX_WQ_RQ,
  58        ENIC_INTX_ERR,
  59        ENIC_INTX_NOTIFY,
  60};
  61
  62enum enic_msix_intr_index {
  63        ENIC_MSIX_RQ,
  64        ENIC_MSIX_WQ,
  65        ENIC_MSIX_ERR,
  66        ENIC_MSIX_NOTIFY,
  67        ENIC_MSIX_MAX,
  68};
  69
  70struct enic_msix_entry {
  71        int requested;
  72        char devname[IFNAMSIZ];
  73        irqreturn_t (*isr)(int, void *);
  74        void *devid;
  75};
  76
  77/* Per-instance private data structure */
  78struct enic {
  79        struct net_device *netdev;
  80        struct pci_dev *pdev;
  81        struct vnic_enet_config config;
  82        struct vnic_dev_bar bar[ENIC_BARS_MAX];
  83        struct vnic_dev *vdev;
  84        struct timer_list notify_timer;
  85        struct work_struct reset;
  86        struct msix_entry msix_entry[ENIC_MSIX_MAX];
  87        struct enic_msix_entry msix[ENIC_MSIX_MAX];
  88        u32 msg_enable;
  89        spinlock_t devcmd_lock;
  90        u8 mac_addr[ETH_ALEN];
  91        u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
  92        unsigned int mc_count;
  93        int csum_rx_enabled;
  94        u32 port_mtu;
  95
  96        /* work queue cache line section */
  97        ____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX];
  98        spinlock_t wq_lock[ENIC_WQ_MAX];
  99        unsigned int wq_count;
 100        struct vlan_group *vlan_group;
 101
 102        /* receive queue cache line section */
 103        ____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX];
 104        unsigned int rq_count;
 105        int (*rq_alloc_buf)(struct vnic_rq *rq);
 106        u64 rq_truncated_pkts;
 107        u64 rq_bad_fcs;
 108        struct napi_struct napi;
 109        struct net_lro_mgr lro_mgr;
 110        struct net_lro_desc lro_desc[ENIC_LRO_MAX_DESC];
 111
 112        /* interrupt resource cache line section */
 113        ____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX];
 114        unsigned int intr_count;
 115        u32 __iomem *legacy_pba;                /* memory-mapped */
 116
 117        /* completion queue cache line section */
 118        ____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX];
 119        unsigned int cq_count;
 120};
 121
 122#endif /* _ENIC_H_ */
 123