LXR linux/drivers/net/enic/vnic

   1/*
   2 * Copyright 2008, 2009 Cisco Systems, Inc.  All rights reserved.
   3 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4 *
   5 * This program is free software; you may redistribute it and/or modify
   6 * it under the terms of the GNU General Public License as published by
   7 * the Free Software Foundation; version 2 of the License.
   8 *
   9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16 * SOFTWARE.
  17 *
  18 */
  19
  20#ifndef _VNIC_RQ_H_
  21#define _VNIC_RQ_H_
  22
  23#include <linux/pci.h>
  24
  25#include "vnic_dev.h"
  26#include "vnic_cq.h"
  27
  28/* Receive queue control */
  29struct vnic_rq_ctrl {
  30        u64 ring_base;                  /* 0x00 */
  31        u32 ring_size;                  /* 0x08 */
  32        u32 pad0;
  33        u32 posted_index;               /* 0x10 */
  34        u32 pad1;
  35        u32 cq_index;                   /* 0x18 */
  36        u32 pad2;
  37        u32 enable;                     /* 0x20 */
  38        u32 pad3;
  39        u32 running;                    /* 0x28 */
  40        u32 pad4;
  41        u32 fetch_index;                /* 0x30 */
  42        u32 pad5;
  43        u32 error_interrupt_enable;     /* 0x38 */
  44        u32 pad6;
  45        u32 error_interrupt_offset;     /* 0x40 */
  46        u32 pad7;
  47        u32 error_status;               /* 0x48 */
  48        u32 pad8;
  49        u32 dropped_packet_count;       /* 0x50 */
  50        u32 pad9;
  51        u32 dropped_packet_count_rc;    /* 0x58 */
  52        u32 pad10;
  53};
  54
  55/* Break the vnic_rq_buf allocations into blocks of 64 entries */
  56#define VNIC_RQ_BUF_BLK_ENTRIES 64
  57#define VNIC_RQ_BUF_BLK_SZ \
  58        (VNIC_RQ_BUF_BLK_ENTRIES * sizeof(struct vnic_rq_buf))
  59#define VNIC_RQ_BUF_BLKS_NEEDED(entries) \
  60        DIV_ROUND_UP(entries, VNIC_RQ_BUF_BLK_ENTRIES)
  61#define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(4096)
  62
  63struct vnic_rq_buf {
  64        struct vnic_rq_buf *next;
  65        dma_addr_t dma_addr;
  66        void *os_buf;
  67        unsigned int os_buf_index;
  68        unsigned int len;
  69        unsigned int index;
  70        void *desc;
  71};
  72
  73struct vnic_rq {
  74        unsigned int index;
  75        struct vnic_dev *vdev;
  76        struct vnic_rq_ctrl __iomem *ctrl;              /* memory-mapped */
  77        struct vnic_dev_ring ring;
  78        struct vnic_rq_buf *bufs[VNIC_RQ_BUF_BLKS_MAX];
  79        struct vnic_rq_buf *to_use;
  80        struct vnic_rq_buf *to_clean;
  81        void *os_buf_head;
  82        unsigned int pkts_outstanding;
  83};
  84
  85static inline unsigned int vnic_rq_desc_avail(struct vnic_rq *rq)
  86{
  87        /* how many does SW own? */
  88        return rq->ring.desc_avail;
  89}
  90
  91static inline unsigned int vnic_rq_desc_used(struct vnic_rq *rq)
  92{
  93        /* how many does HW own? */
  94        return rq->ring.desc_count - rq->ring.desc_avail - 1;
  95}
  96
  97static inline void *vnic_rq_next_desc(struct vnic_rq *rq)
  98{
  99        return rq->to_use->desc;
 100}
 101
 102static inline unsigned int vnic_rq_next_index(struct vnic_rq *rq)
 103{
 104        return rq->to_use->index;
 105}
 106
 107static inline void vnic_rq_post(struct vnic_rq *rq,
 108        void *os_buf, unsigned int os_buf_index,
 109        dma_addr_t dma_addr, unsigned int len)
 110{
 111        struct vnic_rq_buf *buf = rq->to_use;
 112
 113        buf->os_buf = os_buf;
 114        buf->os_buf_index = os_buf_index;
 115        buf->dma_addr = dma_addr;
 116        buf->len = len;
 117
 118        buf = buf->next;
 119        rq->to_use = buf;
 120        rq->ring.desc_avail--;
 121
 122        /* Move the posted_index every nth descriptor
 123         */
 124
 125#ifndef VNIC_RQ_RETURN_RATE
 126#define VNIC_RQ_RETURN_RATE             0xf     /* keep 2^n - 1 */
 127#endif
 128
 129        if ((buf->index & VNIC_RQ_RETURN_RATE) == 0) {
 130                /* Adding write memory barrier prevents compiler and/or CPU
 131                 * reordering, thus avoiding descriptor posting before
 132                 * descriptor is initialized. Otherwise, hardware can read
 133                 * stale descriptor fields.
 134                 */
 135                wmb();
 136                iowrite32(buf->index, &rq->ctrl->posted_index);
 137        }
 138}
 139
 140static inline int vnic_rq_posting_soon(struct vnic_rq *rq)
 141{
 142        return ((rq->to_use->index & VNIC_RQ_RETURN_RATE) == 0);
 143}
 144
 145static inline void vnic_rq_return_descs(struct vnic_rq *rq, unsigned int count)
 146{
 147        rq->ring.desc_avail += count;
 148}
 149
 150enum desc_return_options {
 151        VNIC_RQ_RETURN_DESC,
 152        VNIC_RQ_DEFER_RETURN_DESC,
 153};
 154
 155static inline void vnic_rq_service(struct vnic_rq *rq,
 156        struct cq_desc *cq_desc, u16 completed_index,
 157        int desc_return, void (*buf_service)(struct vnic_rq *rq,
 158        struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
 159        int skipped, void *opaque), void *opaque)
 160{
 161        struct vnic_rq_buf *buf;
 162        int skipped;
 163
 164        buf = rq->to_clean;
 165        while (1) {
 166
 167                skipped = (buf->index != completed_index);
 168
 169                (*buf_service)(rq, cq_desc, buf, skipped, opaque);
 170
 171                if (desc_return == VNIC_RQ_RETURN_DESC)
 172                        rq->ring.desc_avail++;
 173
 174                rq->to_clean = buf->next;
 175
 176                if (!skipped)
 177                        break;
 178
 179                buf = rq->to_clean;
 180        }
 181}
 182
 183static inline int vnic_rq_fill(struct vnic_rq *rq,
 184        int (*buf_fill)(struct vnic_rq *rq))
 185{
 186        int err;
 187
 188        while (vnic_rq_desc_avail(rq) > 0) {
 189
 190                err = (*buf_fill)(rq);
 191                if (err)
 192                        return err;
 193        }
 194
 195        return 0;
 196}
 197
 198void vnic_rq_free(struct vnic_rq *rq);
 199int vnic_rq_alloc(struct vnic_dev *vdev, struct vnic_rq *rq, unsigned int index,
 200        unsigned int desc_count, unsigned int desc_size);
 201void vnic_rq_init_start(struct vnic_rq *rq, unsigned int cq_index,
 202        unsigned int fetch_index, unsigned int posted_index,
 203        unsigned int error_interrupt_enable,
 204        unsigned int error_interrupt_offset);
 205void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,
 206        unsigned int error_interrupt_enable,
 207        unsigned int error_interrupt_offset);
 208unsigned int vnic_rq_error_status(struct vnic_rq *rq);
 209void vnic_rq_enable(struct vnic_rq *rq);
 210int vnic_rq_disable(struct vnic_rq *rq);
 211void vnic_rq_clean(struct vnic_rq *rq,
 212        void (*buf_clean)(struct vnic_rq *rq, struct vnic_rq_buf *buf));
 213
 214#endif /* _VNIC_RQ_H_ */
 215