linux/drivers/net/korina.c
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   1/*
   2 *  Driver for the IDT RC32434 (Korina) on-chip ethernet controller.
   3 *
   4 *  Copyright 2004 IDT Inc. (rischelp@idt.com)
   5 *  Copyright 2006 Felix Fietkau <nbd@openwrt.org>
   6 *  Copyright 2008 Florian Fainelli <florian@openwrt.org>
   7 *
   8 *  This program is free software; you can redistribute  it and/or modify it
   9 *  under  the terms of  the GNU General  Public License as published by the
  10 *  Free Software Foundation;  either version 2 of the  License, or (at your
  11 *  option) any later version.
  12 *
  13 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  14 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  15 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  16 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  17 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  18 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  19 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  20 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  21 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  22 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  23 *
  24 *  You should have received a copy of the  GNU General Public License along
  25 *  with this program; if not, write  to the Free Software Foundation, Inc.,
  26 *  675 Mass Ave, Cambridge, MA 02139, USA.
  27 *
  28 *  Writing to a DMA status register:
  29 *
  30 *  When writing to the status register, you should mask the bit you have
  31 *  been testing the status register with. Both Tx and Rx DMA registers
  32 *  should stick to this procedure.
  33 */
  34
  35#include <linux/module.h>
  36#include <linux/kernel.h>
  37#include <linux/moduleparam.h>
  38#include <linux/sched.h>
  39#include <linux/ctype.h>
  40#include <linux/types.h>
  41#include <linux/interrupt.h>
  42#include <linux/init.h>
  43#include <linux/ioport.h>
  44#include <linux/in.h>
  45#include <linux/slab.h>
  46#include <linux/string.h>
  47#include <linux/delay.h>
  48#include <linux/netdevice.h>
  49#include <linux/etherdevice.h>
  50#include <linux/skbuff.h>
  51#include <linux/errno.h>
  52#include <linux/platform_device.h>
  53#include <linux/mii.h>
  54#include <linux/ethtool.h>
  55#include <linux/crc32.h>
  56
  57#include <asm/bootinfo.h>
  58#include <asm/system.h>
  59#include <asm/bitops.h>
  60#include <asm/pgtable.h>
  61#include <asm/segment.h>
  62#include <asm/io.h>
  63#include <asm/dma.h>
  64
  65#include <asm/mach-rc32434/rb.h>
  66#include <asm/mach-rc32434/rc32434.h>
  67#include <asm/mach-rc32434/eth.h>
  68#include <asm/mach-rc32434/dma_v.h>
  69
  70#define DRV_NAME        "korina"
  71#define DRV_VERSION     "0.10"
  72#define DRV_RELDATE     "04Mar2008"
  73
  74#define STATION_ADDRESS_HIGH(dev) (((dev)->dev_addr[0] << 8) | \
  75                                   ((dev)->dev_addr[1]))
  76#define STATION_ADDRESS_LOW(dev)  (((dev)->dev_addr[2] << 24) | \
  77                                   ((dev)->dev_addr[3] << 16) | \
  78                                   ((dev)->dev_addr[4] << 8)  | \
  79                                   ((dev)->dev_addr[5]))
  80
  81#define MII_CLOCK 1250000       /* no more than 2.5MHz */
  82
  83/* the following must be powers of two */
  84#define KORINA_NUM_RDS  64  /* number of receive descriptors */
  85#define KORINA_NUM_TDS  64  /* number of transmit descriptors */
  86
  87/* KORINA_RBSIZE is the hardware's default maximum receive
  88 * frame size in bytes. Having this hardcoded means that there
  89 * is no support for MTU sizes greater than 1500. */
  90#define KORINA_RBSIZE   1536 /* size of one resource buffer = Ether MTU */
  91#define KORINA_RDS_MASK (KORINA_NUM_RDS - 1)
  92#define KORINA_TDS_MASK (KORINA_NUM_TDS - 1)
  93#define RD_RING_SIZE    (KORINA_NUM_RDS * sizeof(struct dma_desc))
  94#define TD_RING_SIZE    (KORINA_NUM_TDS * sizeof(struct dma_desc))
  95
  96#define TX_TIMEOUT      (6000 * HZ / 1000)
  97
  98enum chain_status { desc_filled, desc_empty };
  99#define IS_DMA_FINISHED(X)   (((X) & (DMA_DESC_FINI)) != 0)
 100#define IS_DMA_DONE(X)   (((X) & (DMA_DESC_DONE)) != 0)
 101#define RCVPKT_LENGTH(X)     (((X) & ETH_RX_LEN) >> ETH_RX_LEN_BIT)
 102
 103/* Information that need to be kept for each board. */
 104struct korina_private {
 105        struct eth_regs *eth_regs;
 106        struct dma_reg *rx_dma_regs;
 107        struct dma_reg *tx_dma_regs;
 108        struct dma_desc *td_ring; /* transmit descriptor ring */
 109        struct dma_desc *rd_ring; /* receive descriptor ring  */
 110
 111        struct sk_buff *tx_skb[KORINA_NUM_TDS];
 112        struct sk_buff *rx_skb[KORINA_NUM_RDS];
 113
 114        int rx_next_done;
 115        int rx_chain_head;
 116        int rx_chain_tail;
 117        enum chain_status rx_chain_status;
 118
 119        int tx_next_done;
 120        int tx_chain_head;
 121        int tx_chain_tail;
 122        enum chain_status tx_chain_status;
 123        int tx_count;
 124        int tx_full;
 125
 126        int rx_irq;
 127        int tx_irq;
 128        int ovr_irq;
 129        int und_irq;
 130
 131        spinlock_t lock;        /* NIC xmit lock */
 132
 133        int dma_halt_cnt;
 134        int dma_run_cnt;
 135        struct napi_struct napi;
 136        struct timer_list media_check_timer;
 137        struct mii_if_info mii_if;
 138        struct net_device *dev;
 139        int phy_addr;
 140};
 141
 142extern unsigned int idt_cpu_freq;
 143
 144static inline void korina_start_dma(struct dma_reg *ch, u32 dma_addr)
 145{
 146        writel(0, &ch->dmandptr);
 147        writel(dma_addr, &ch->dmadptr);
 148}
 149
 150static inline void korina_abort_dma(struct net_device *dev,
 151                                        struct dma_reg *ch)
 152{
 153       if (readl(&ch->dmac) & DMA_CHAN_RUN_BIT) {
 154               writel(0x10, &ch->dmac);
 155
 156               while (!(readl(&ch->dmas) & DMA_STAT_HALT))
 157                       dev->trans_start = jiffies;
 158
 159               writel(0, &ch->dmas);
 160       }
 161
 162       writel(0, &ch->dmadptr);
 163       writel(0, &ch->dmandptr);
 164}
 165
 166static inline void korina_chain_dma(struct dma_reg *ch, u32 dma_addr)
 167{
 168        writel(dma_addr, &ch->dmandptr);
 169}
 170
 171static void korina_abort_tx(struct net_device *dev)
 172{
 173        struct korina_private *lp = netdev_priv(dev);
 174
 175        korina_abort_dma(dev, lp->tx_dma_regs);
 176}
 177
 178static void korina_abort_rx(struct net_device *dev)
 179{
 180        struct korina_private *lp = netdev_priv(dev);
 181
 182        korina_abort_dma(dev, lp->rx_dma_regs);
 183}
 184
 185static void korina_start_rx(struct korina_private *lp,
 186                                        struct dma_desc *rd)
 187{
 188        korina_start_dma(lp->rx_dma_regs, CPHYSADDR(rd));
 189}
 190
 191static void korina_chain_rx(struct korina_private *lp,
 192                                        struct dma_desc *rd)
 193{
 194        korina_chain_dma(lp->rx_dma_regs, CPHYSADDR(rd));
 195}
 196
 197/* transmit packet */
 198static int korina_send_packet(struct sk_buff *skb, struct net_device *dev)
 199{
 200        struct korina_private *lp = netdev_priv(dev);
 201        unsigned long flags;
 202        u32 length;
 203        u32 chain_prev, chain_next;
 204        struct dma_desc *td;
 205
 206        spin_lock_irqsave(&lp->lock, flags);
 207
 208        td = &lp->td_ring[lp->tx_chain_tail];
 209
 210        /* stop queue when full, drop pkts if queue already full */
 211        if (lp->tx_count >= (KORINA_NUM_TDS - 2)) {
 212                lp->tx_full = 1;
 213
 214                if (lp->tx_count == (KORINA_NUM_TDS - 2))
 215                        netif_stop_queue(dev);
 216                else {
 217                        dev->stats.tx_dropped++;
 218                        dev_kfree_skb_any(skb);
 219                        spin_unlock_irqrestore(&lp->lock, flags);
 220
 221                        return NETDEV_TX_BUSY;
 222                }
 223        }
 224
 225        lp->tx_count++;
 226
 227        lp->tx_skb[lp->tx_chain_tail] = skb;
 228
 229        length = skb->len;
 230        dma_cache_wback((u32)skb->data, skb->len);
 231
 232        /* Setup the transmit descriptor. */
 233        dma_cache_inv((u32) td, sizeof(*td));
 234        td->ca = CPHYSADDR(skb->data);
 235        chain_prev = (lp->tx_chain_tail - 1) & KORINA_TDS_MASK;
 236        chain_next = (lp->tx_chain_tail + 1) & KORINA_TDS_MASK;
 237
 238        if (readl(&(lp->tx_dma_regs->dmandptr)) == 0) {
 239                if (lp->tx_chain_status == desc_empty) {
 240                        /* Update tail */
 241                        td->control = DMA_COUNT(length) |
 242                                        DMA_DESC_COF | DMA_DESC_IOF;
 243                        /* Move tail */
 244                        lp->tx_chain_tail = chain_next;
 245                        /* Write to NDPTR */
 246                        writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
 247                                        &lp->tx_dma_regs->dmandptr);
 248                        /* Move head to tail */
 249                        lp->tx_chain_head = lp->tx_chain_tail;
 250                } else {
 251                        /* Update tail */
 252                        td->control = DMA_COUNT(length) |
 253                                        DMA_DESC_COF | DMA_DESC_IOF;
 254                        /* Link to prev */
 255                        lp->td_ring[chain_prev].control &=
 256                                        ~DMA_DESC_COF;
 257                        /* Link to prev */
 258                        lp->td_ring[chain_prev].link =  CPHYSADDR(td);
 259                        /* Move tail */
 260                        lp->tx_chain_tail = chain_next;
 261                        /* Write to NDPTR */
 262                        writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
 263                                        &(lp->tx_dma_regs->dmandptr));
 264                        /* Move head to tail */
 265                        lp->tx_chain_head = lp->tx_chain_tail;
 266                        lp->tx_chain_status = desc_empty;
 267                }
 268        } else {
 269                if (lp->tx_chain_status == desc_empty) {
 270                        /* Update tail */
 271                        td->control = DMA_COUNT(length) |
 272                                        DMA_DESC_COF | DMA_DESC_IOF;
 273                        /* Move tail */
 274                        lp->tx_chain_tail = chain_next;
 275                        lp->tx_chain_status = desc_filled;
 276                } else {
 277                        /* Update tail */
 278                        td->control = DMA_COUNT(length) |
 279                                        DMA_DESC_COF | DMA_DESC_IOF;
 280                        lp->td_ring[chain_prev].control &=
 281                                        ~DMA_DESC_COF;
 282                        lp->td_ring[chain_prev].link =  CPHYSADDR(td);
 283                        lp->tx_chain_tail = chain_next;
 284                }
 285        }
 286        dma_cache_wback((u32) td, sizeof(*td));
 287
 288        dev->trans_start = jiffies;
 289        spin_unlock_irqrestore(&lp->lock, flags);
 290
 291        return NETDEV_TX_OK;
 292}
 293
 294static int mdio_read(struct net_device *dev, int mii_id, int reg)
 295{
 296        struct korina_private *lp = netdev_priv(dev);
 297        int ret;
 298
 299        mii_id = ((lp->rx_irq == 0x2c ? 1 : 0) << 8);
 300
 301        writel(0, &lp->eth_regs->miimcfg);
 302        writel(0, &lp->eth_regs->miimcmd);
 303        writel(mii_id | reg, &lp->eth_regs->miimaddr);
 304        writel(ETH_MII_CMD_SCN, &lp->eth_regs->miimcmd);
 305
 306        ret = (int)(readl(&lp->eth_regs->miimrdd));
 307        return ret;
 308}
 309
 310static void mdio_write(struct net_device *dev, int mii_id, int reg, int val)
 311{
 312        struct korina_private *lp = netdev_priv(dev);
 313
 314        mii_id = ((lp->rx_irq == 0x2c ? 1 : 0) << 8);
 315
 316        writel(0, &lp->eth_regs->miimcfg);
 317        writel(1, &lp->eth_regs->miimcmd);
 318        writel(mii_id | reg, &lp->eth_regs->miimaddr);
 319        writel(ETH_MII_CMD_SCN, &lp->eth_regs->miimcmd);
 320        writel(val, &lp->eth_regs->miimwtd);
 321}
 322
 323/* Ethernet Rx DMA interrupt */
 324static irqreturn_t korina_rx_dma_interrupt(int irq, void *dev_id)
 325{
 326        struct net_device *dev = dev_id;
 327        struct korina_private *lp = netdev_priv(dev);
 328        u32 dmas, dmasm;
 329        irqreturn_t retval;
 330
 331        dmas = readl(&lp->rx_dma_regs->dmas);
 332        if (dmas & (DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR)) {
 333                dmasm = readl(&lp->rx_dma_regs->dmasm);
 334                writel(dmasm | (DMA_STAT_DONE |
 335                                DMA_STAT_HALT | DMA_STAT_ERR),
 336                                &lp->rx_dma_regs->dmasm);
 337
 338                napi_schedule(&lp->napi);
 339
 340                if (dmas & DMA_STAT_ERR)
 341                        printk(KERN_ERR "%s: DMA error\n", dev->name);
 342
 343                retval = IRQ_HANDLED;
 344        } else
 345                retval = IRQ_NONE;
 346
 347        return retval;
 348}
 349
 350static int korina_rx(struct net_device *dev, int limit)
 351{
 352        struct korina_private *lp = netdev_priv(dev);
 353        struct dma_desc *rd = &lp->rd_ring[lp->rx_next_done];
 354        struct sk_buff *skb, *skb_new;
 355        u8 *pkt_buf;
 356        u32 devcs, pkt_len, dmas;
 357        int count;
 358
 359        dma_cache_inv((u32)rd, sizeof(*rd));
 360
 361        for (count = 0; count < limit; count++) {
 362                skb = lp->rx_skb[lp->rx_next_done];
 363                skb_new = NULL;
 364
 365                devcs = rd->devcs;
 366
 367                if ((KORINA_RBSIZE - (u32)DMA_COUNT(rd->control)) == 0)
 368                        break;
 369
 370                /* Update statistics counters */
 371                if (devcs & ETH_RX_CRC)
 372                        dev->stats.rx_crc_errors++;
 373                if (devcs & ETH_RX_LOR)
 374                        dev->stats.rx_length_errors++;
 375                if (devcs & ETH_RX_LE)
 376                        dev->stats.rx_length_errors++;
 377                if (devcs & ETH_RX_OVR)
 378                        dev->stats.rx_over_errors++;
 379                if (devcs & ETH_RX_CV)
 380                        dev->stats.rx_frame_errors++;
 381                if (devcs & ETH_RX_CES)
 382                        dev->stats.rx_length_errors++;
 383                if (devcs & ETH_RX_MP)
 384                        dev->stats.multicast++;
 385
 386                if ((devcs & ETH_RX_LD) != ETH_RX_LD) {
 387                        /* check that this is a whole packet
 388                         * WARNING: DMA_FD bit incorrectly set
 389                         * in Rc32434 (errata ref #077) */
 390                        dev->stats.rx_errors++;
 391                        dev->stats.rx_dropped++;
 392                } else if ((devcs & ETH_RX_ROK)) {
 393                        pkt_len = RCVPKT_LENGTH(devcs);
 394
 395                        /* must be the (first and) last
 396                         * descriptor then */
 397                        pkt_buf = (u8 *)lp->rx_skb[lp->rx_next_done]->data;
 398
 399                        /* invalidate the cache */
 400                        dma_cache_inv((unsigned long)pkt_buf, pkt_len - 4);
 401
 402                        /* Malloc up new buffer. */
 403                        skb_new = netdev_alloc_skb(dev, KORINA_RBSIZE + 2);
 404
 405                        if (!skb_new)
 406                                break;
 407                        /* Do not count the CRC */
 408                        skb_put(skb, pkt_len - 4);
 409                        skb->protocol = eth_type_trans(skb, dev);
 410
 411                        /* Pass the packet to upper layers */
 412                        netif_receive_skb(skb);
 413                        dev->stats.rx_packets++;
 414                        dev->stats.rx_bytes += pkt_len;
 415
 416                        /* Update the mcast stats */
 417                        if (devcs & ETH_RX_MP)
 418                                dev->stats.multicast++;
 419
 420                        /* 16 bit align */
 421                        skb_reserve(skb_new, 2);
 422
 423                        lp->rx_skb[lp->rx_next_done] = skb_new;
 424                }
 425
 426                rd->devcs = 0;
 427
 428                /* Restore descriptor's curr_addr */
 429                if (skb_new)
 430                        rd->ca = CPHYSADDR(skb_new->data);
 431                else
 432                        rd->ca = CPHYSADDR(skb->data);
 433
 434                rd->control = DMA_COUNT(KORINA_RBSIZE) |
 435                        DMA_DESC_COD | DMA_DESC_IOD;
 436                lp->rd_ring[(lp->rx_next_done - 1) &
 437                        KORINA_RDS_MASK].control &=
 438                        ~DMA_DESC_COD;
 439
 440                lp->rx_next_done = (lp->rx_next_done + 1) & KORINA_RDS_MASK;
 441                dma_cache_wback((u32)rd, sizeof(*rd));
 442                rd = &lp->rd_ring[lp->rx_next_done];
 443                writel(~DMA_STAT_DONE, &lp->rx_dma_regs->dmas);
 444        }
 445
 446        dmas = readl(&lp->rx_dma_regs->dmas);
 447
 448        if (dmas & DMA_STAT_HALT) {
 449                writel(~(DMA_STAT_HALT | DMA_STAT_ERR),
 450                                &lp->rx_dma_regs->dmas);
 451
 452                lp->dma_halt_cnt++;
 453                rd->devcs = 0;
 454                skb = lp->rx_skb[lp->rx_next_done];
 455                rd->ca = CPHYSADDR(skb->data);
 456                dma_cache_wback((u32)rd, sizeof(*rd));
 457                korina_chain_rx(lp, rd);
 458        }
 459
 460        return count;
 461}
 462
 463static int korina_poll(struct napi_struct *napi, int budget)
 464{
 465        struct korina_private *lp =
 466                container_of(napi, struct korina_private, napi);
 467        struct net_device *dev = lp->dev;
 468        int work_done;
 469
 470        work_done = korina_rx(dev, budget);
 471        if (work_done < budget) {
 472                napi_complete(napi);
 473
 474                writel(readl(&lp->rx_dma_regs->dmasm) &
 475                        ~(DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR),
 476                        &lp->rx_dma_regs->dmasm);
 477        }
 478        return work_done;
 479}
 480
 481/*
 482 * Set or clear the multicast filter for this adaptor.
 483 */
 484static void korina_multicast_list(struct net_device *dev)
 485{
 486        struct korina_private *lp = netdev_priv(dev);
 487        unsigned long flags;
 488        struct dev_mc_list *dmi = dev->mc_list;
 489        u32 recognise = ETH_ARC_AB;     /* always accept broadcasts */
 490        int i;
 491
 492        /* Set promiscuous mode */
 493        if (dev->flags & IFF_PROMISC)
 494                recognise |= ETH_ARC_PRO;
 495
 496        else if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 4))
 497                /* All multicast and broadcast */
 498                recognise |= ETH_ARC_AM;
 499
 500        /* Build the hash table */
 501        if (dev->mc_count > 4) {
 502                u16 hash_table[4];
 503                u32 crc;
 504
 505                for (i = 0; i < 4; i++)
 506                        hash_table[i] = 0;
 507
 508                for (i = 0; i < dev->mc_count; i++) {
 509                        char *addrs = dmi->dmi_addr;
 510
 511                        dmi = dmi->next;
 512
 513                        if (!(*addrs & 1))
 514                                continue;
 515
 516                        crc = ether_crc_le(6, addrs);
 517                        crc >>= 26;
 518                        hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf));
 519                }
 520                /* Accept filtered multicast */
 521                recognise |= ETH_ARC_AFM;
 522
 523                /* Fill the MAC hash tables with their values */
 524                writel((u32)(hash_table[1] << 16 | hash_table[0]),
 525                                        &lp->eth_regs->ethhash0);
 526                writel((u32)(hash_table[3] << 16 | hash_table[2]),
 527                                        &lp->eth_regs->ethhash1);
 528        }
 529
 530        spin_lock_irqsave(&lp->lock, flags);
 531        writel(recognise, &lp->eth_regs->etharc);
 532        spin_unlock_irqrestore(&lp->lock, flags);
 533}
 534
 535static void korina_tx(struct net_device *dev)
 536{
 537        struct korina_private *lp = netdev_priv(dev);
 538        struct dma_desc *td = &lp->td_ring[lp->tx_next_done];
 539        u32 devcs;
 540        u32 dmas;
 541
 542        spin_lock(&lp->lock);
 543
 544        /* Process all desc that are done */
 545        while (IS_DMA_FINISHED(td->control)) {
 546                if (lp->tx_full == 1) {
 547                        netif_wake_queue(dev);
 548                        lp->tx_full = 0;
 549                }
 550
 551                devcs = lp->td_ring[lp->tx_next_done].devcs;
 552                if ((devcs & (ETH_TX_FD | ETH_TX_LD)) !=
 553                                (ETH_TX_FD | ETH_TX_LD)) {
 554                        dev->stats.tx_errors++;
 555                        dev->stats.tx_dropped++;
 556
 557                        /* Should never happen */
 558                        printk(KERN_ERR "%s: split tx ignored\n",
 559                                                        dev->name);
 560                } else if (devcs & ETH_TX_TOK) {
 561                        dev->stats.tx_packets++;
 562                        dev->stats.tx_bytes +=
 563                                        lp->tx_skb[lp->tx_next_done]->len;
 564                } else {
 565                        dev->stats.tx_errors++;
 566                        dev->stats.tx_dropped++;
 567
 568                        /* Underflow */
 569                        if (devcs & ETH_TX_UND)
 570                                dev->stats.tx_fifo_errors++;
 571
 572                        /* Oversized frame */
 573                        if (devcs & ETH_TX_OF)
 574                                dev->stats.tx_aborted_errors++;
 575
 576                        /* Excessive deferrals */
 577                        if (devcs & ETH_TX_ED)
 578                                dev->stats.tx_carrier_errors++;
 579
 580                        /* Collisions: medium busy */
 581                        if (devcs & ETH_TX_EC)
 582                                dev->stats.collisions++;
 583
 584                        /* Late collision */
 585                        if (devcs & ETH_TX_LC)
 586                                dev->stats.tx_window_errors++;
 587                }
 588
 589                /* We must always free the original skb */
 590                if (lp->tx_skb[lp->tx_next_done]) {
 591                        dev_kfree_skb_any(lp->tx_skb[lp->tx_next_done]);
 592                        lp->tx_skb[lp->tx_next_done] = NULL;
 593                }
 594
 595                lp->td_ring[lp->tx_next_done].control = DMA_DESC_IOF;
 596                lp->td_ring[lp->tx_next_done].devcs = ETH_TX_FD | ETH_TX_LD;
 597                lp->td_ring[lp->tx_next_done].link = 0;
 598                lp->td_ring[lp->tx_next_done].ca = 0;
 599                lp->tx_count--;
 600
 601                /* Go on to next transmission */
 602                lp->tx_next_done = (lp->tx_next_done + 1) & KORINA_TDS_MASK;
 603                td = &lp->td_ring[lp->tx_next_done];
 604
 605        }
 606
 607        /* Clear the DMA status register */
 608        dmas = readl(&lp->tx_dma_regs->dmas);
 609        writel(~dmas, &lp->tx_dma_regs->dmas);
 610
 611        writel(readl(&lp->tx_dma_regs->dmasm) &
 612                        ~(DMA_STAT_FINI | DMA_STAT_ERR),
 613                        &lp->tx_dma_regs->dmasm);
 614
 615        spin_unlock(&lp->lock);
 616}
 617
 618static irqreturn_t
 619korina_tx_dma_interrupt(int irq, void *dev_id)
 620{
 621        struct net_device *dev = dev_id;
 622        struct korina_private *lp = netdev_priv(dev);
 623        u32 dmas, dmasm;
 624        irqreturn_t retval;
 625
 626        dmas = readl(&lp->tx_dma_regs->dmas);
 627
 628        if (dmas & (DMA_STAT_FINI | DMA_STAT_ERR)) {
 629                dmasm = readl(&lp->tx_dma_regs->dmasm);
 630                writel(dmasm | (DMA_STAT_FINI | DMA_STAT_ERR),
 631                                &lp->tx_dma_regs->dmasm);
 632
 633                korina_tx(dev);
 634
 635                if (lp->tx_chain_status == desc_filled &&
 636                        (readl(&(lp->tx_dma_regs->dmandptr)) == 0)) {
 637                        writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
 638                                &(lp->tx_dma_regs->dmandptr));
 639                        lp->tx_chain_status = desc_empty;
 640                        lp->tx_chain_head = lp->tx_chain_tail;
 641                        dev->trans_start = jiffies;
 642                }
 643                if (dmas & DMA_STAT_ERR)
 644                        printk(KERN_ERR "%s: DMA error\n", dev->name);
 645
 646                retval = IRQ_HANDLED;
 647        } else
 648                retval = IRQ_NONE;
 649
 650        return retval;
 651}
 652
 653
 654static void korina_check_media(struct net_device *dev, unsigned int init_media)
 655{
 656        struct korina_private *lp = netdev_priv(dev);
 657
 658        mii_check_media(&lp->mii_if, 0, init_media);
 659
 660        if (lp->mii_if.full_duplex)
 661                writel(readl(&lp->eth_regs->ethmac2) | ETH_MAC2_FD,
 662                                                &lp->eth_regs->ethmac2);
 663        else
 664                writel(readl(&lp->eth_regs->ethmac2) & ~ETH_MAC2_FD,
 665                                                &lp->eth_regs->ethmac2);
 666}
 667
 668static void korina_poll_media(unsigned long data)
 669{
 670        struct net_device *dev = (struct net_device *) data;
 671        struct korina_private *lp = netdev_priv(dev);
 672
 673        korina_check_media(dev, 0);
 674        mod_timer(&lp->media_check_timer, jiffies + HZ);
 675}
 676
 677static void korina_set_carrier(struct mii_if_info *mii)
 678{
 679        if (mii->force_media) {
 680                /* autoneg is off: Link is always assumed to be up */
 681                if (!netif_carrier_ok(mii->dev))
 682                        netif_carrier_on(mii->dev);
 683        } else  /* Let MMI library update carrier status */
 684                korina_check_media(mii->dev, 0);
 685}
 686
 687static int korina_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 688{
 689        struct korina_private *lp = netdev_priv(dev);
 690        struct mii_ioctl_data *data = if_mii(rq);
 691        int rc;
 692
 693        if (!netif_running(dev))
 694                return -EINVAL;
 695        spin_lock_irq(&lp->lock);
 696        rc = generic_mii_ioctl(&lp->mii_if, data, cmd, NULL);
 697        spin_unlock_irq(&lp->lock);
 698        korina_set_carrier(&lp->mii_if);
 699
 700        return rc;
 701}
 702
 703/* ethtool helpers */
 704static void netdev_get_drvinfo(struct net_device *dev,
 705                        struct ethtool_drvinfo *info)
 706{
 707        struct korina_private *lp = netdev_priv(dev);
 708
 709        strcpy(info->driver, DRV_NAME);
 710        strcpy(info->version, DRV_VERSION);
 711        strcpy(info->bus_info, lp->dev->name);
 712}
 713
 714static int netdev_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 715{
 716        struct korina_private *lp = netdev_priv(dev);
 717        int rc;
 718
 719        spin_lock_irq(&lp->lock);
 720        rc = mii_ethtool_gset(&lp->mii_if, cmd);
 721        spin_unlock_irq(&lp->lock);
 722
 723        return rc;
 724}
 725
 726static int netdev_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 727{
 728        struct korina_private *lp = netdev_priv(dev);
 729        int rc;
 730
 731        spin_lock_irq(&lp->lock);
 732        rc = mii_ethtool_sset(&lp->mii_if, cmd);
 733        spin_unlock_irq(&lp->lock);
 734        korina_set_carrier(&lp->mii_if);
 735
 736        return rc;
 737}
 738
 739static u32 netdev_get_link(struct net_device *dev)
 740{
 741        struct korina_private *lp = netdev_priv(dev);
 742
 743        return mii_link_ok(&lp->mii_if);
 744}
 745
 746static const struct ethtool_ops netdev_ethtool_ops = {
 747        .get_drvinfo            = netdev_get_drvinfo,
 748        .get_settings           = netdev_get_settings,
 749        .set_settings           = netdev_set_settings,
 750        .get_link               = netdev_get_link,
 751};
 752
 753static int korina_alloc_ring(struct net_device *dev)
 754{
 755        struct korina_private *lp = netdev_priv(dev);
 756        struct sk_buff *skb;
 757        int i;
 758
 759        /* Initialize the transmit descriptors */
 760        for (i = 0; i < KORINA_NUM_TDS; i++) {
 761                lp->td_ring[i].control = DMA_DESC_IOF;
 762                lp->td_ring[i].devcs = ETH_TX_FD | ETH_TX_LD;
 763                lp->td_ring[i].ca = 0;
 764                lp->td_ring[i].link = 0;
 765        }
 766        lp->tx_next_done = lp->tx_chain_head = lp->tx_chain_tail =
 767                        lp->tx_full = lp->tx_count = 0;
 768        lp->tx_chain_status = desc_empty;
 769
 770        /* Initialize the receive descriptors */
 771        for (i = 0; i < KORINA_NUM_RDS; i++) {
 772                skb = dev_alloc_skb(KORINA_RBSIZE + 2);
 773                if (!skb)
 774                        return -ENOMEM;
 775                skb_reserve(skb, 2);
 776                lp->rx_skb[i] = skb;
 777                lp->rd_ring[i].control = DMA_DESC_IOD |
 778                                DMA_COUNT(KORINA_RBSIZE);
 779                lp->rd_ring[i].devcs = 0;
 780                lp->rd_ring[i].ca = CPHYSADDR(skb->data);
 781                lp->rd_ring[i].link = CPHYSADDR(&lp->rd_ring[i+1]);
 782        }
 783
 784        /* loop back receive descriptors, so the last
 785         * descriptor points to the first one */
 786        lp->rd_ring[i - 1].link = CPHYSADDR(&lp->rd_ring[0]);
 787        lp->rd_ring[i - 1].control |= DMA_DESC_COD;
 788
 789        lp->rx_next_done  = 0;
 790        lp->rx_chain_head = 0;
 791        lp->rx_chain_tail = 0;
 792        lp->rx_chain_status = desc_empty;
 793
 794        return 0;
 795}
 796
 797static void korina_free_ring(struct net_device *dev)
 798{
 799        struct korina_private *lp = netdev_priv(dev);
 800        int i;
 801
 802        for (i = 0; i < KORINA_NUM_RDS; i++) {
 803                lp->rd_ring[i].control = 0;
 804                if (lp->rx_skb[i])
 805                        dev_kfree_skb_any(lp->rx_skb[i]);
 806                lp->rx_skb[i] = NULL;
 807        }
 808
 809        for (i = 0; i < KORINA_NUM_TDS; i++) {
 810                lp->td_ring[i].control = 0;
 811                if (lp->tx_skb[i])
 812                        dev_kfree_skb_any(lp->tx_skb[i]);
 813                lp->tx_skb[i] = NULL;
 814        }
 815}
 816
 817/*
 818 * Initialize the RC32434 ethernet controller.
 819 */
 820static int korina_init(struct net_device *dev)
 821{
 822        struct korina_private *lp = netdev_priv(dev);
 823
 824        /* Disable DMA */
 825        korina_abort_tx(dev);
 826        korina_abort_rx(dev);
 827
 828        /* reset ethernet logic */
 829        writel(0, &lp->eth_regs->ethintfc);
 830        while ((readl(&lp->eth_regs->ethintfc) & ETH_INT_FC_RIP))
 831                dev->trans_start = jiffies;
 832
 833        /* Enable Ethernet Interface */
 834        writel(ETH_INT_FC_EN, &lp->eth_regs->ethintfc);
 835
 836        /* Allocate rings */
 837        if (korina_alloc_ring(dev)) {
 838                printk(KERN_ERR "%s: descriptor allocation failed\n", dev->name);
 839                korina_free_ring(dev);
 840                return -ENOMEM;
 841        }
 842
 843        writel(0, &lp->rx_dma_regs->dmas);
 844        /* Start Rx DMA */
 845        korina_start_rx(lp, &lp->rd_ring[0]);
 846
 847        writel(readl(&lp->tx_dma_regs->dmasm) &
 848                        ~(DMA_STAT_FINI | DMA_STAT_ERR),
 849                        &lp->tx_dma_regs->dmasm);
 850        writel(readl(&lp->rx_dma_regs->dmasm) &
 851                        ~(DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR),
 852                        &lp->rx_dma_regs->dmasm);
 853
 854        /* Accept only packets destined for this Ethernet device address */
 855        writel(ETH_ARC_AB, &lp->eth_regs->etharc);
 856
 857        /* Set all Ether station address registers to their initial values */
 858        writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal0);
 859        writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah0);
 860
 861        writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal1);
 862        writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah1);
 863
 864        writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal2);
 865        writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah2);
 866
 867        writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal3);
 868        writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah3);
 869
 870
 871        /* Frame Length Checking, Pad Enable, CRC Enable, Full Duplex set */
 872        writel(ETH_MAC2_PE | ETH_MAC2_CEN | ETH_MAC2_FD,
 873                        &lp->eth_regs->ethmac2);
 874
 875        /* Back to back inter-packet-gap */
 876        writel(0x15, &lp->eth_regs->ethipgt);
 877        /* Non - Back to back inter-packet-gap */
 878        writel(0x12, &lp->eth_regs->ethipgr);
 879
 880        /* Management Clock Prescaler Divisor
 881         * Clock independent setting */
 882        writel(((idt_cpu_freq) / MII_CLOCK + 1) & ~1,
 883                       &lp->eth_regs->ethmcp);
 884
 885        /* don't transmit until fifo contains 48b */
 886        writel(48, &lp->eth_regs->ethfifott);
 887
 888        writel(ETH_MAC1_RE, &lp->eth_regs->ethmac1);
 889
 890        napi_enable(&lp->napi);
 891        netif_start_queue(dev);
 892
 893        return 0;
 894}
 895
 896/*
 897 * Restart the RC32434 ethernet controller.
 898 * FIXME: check the return status where we call it
 899 */
 900static int korina_restart(struct net_device *dev)
 901{
 902        struct korina_private *lp = netdev_priv(dev);
 903        int ret;
 904
 905        /*
 906         * Disable interrupts
 907         */
 908        disable_irq(lp->rx_irq);
 909        disable_irq(lp->tx_irq);
 910        disable_irq(lp->ovr_irq);
 911        disable_irq(lp->und_irq);
 912
 913        writel(readl(&lp->tx_dma_regs->dmasm) |
 914                                DMA_STAT_FINI | DMA_STAT_ERR,
 915                                &lp->tx_dma_regs->dmasm);
 916        writel(readl(&lp->rx_dma_regs->dmasm) |
 917                                DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR,
 918                                &lp->rx_dma_regs->dmasm);
 919
 920        korina_free_ring(dev);
 921
 922        napi_disable(&lp->napi);
 923
 924        ret = korina_init(dev);
 925        if (ret < 0) {
 926                printk(KERN_ERR "%s: cannot restart device\n", dev->name);
 927                return ret;
 928        }
 929        korina_multicast_list(dev);
 930
 931        enable_irq(lp->und_irq);
 932        enable_irq(lp->ovr_irq);
 933        enable_irq(lp->tx_irq);
 934        enable_irq(lp->rx_irq);
 935
 936        return ret;
 937}
 938
 939static void korina_clear_and_restart(struct net_device *dev, u32 value)
 940{
 941        struct korina_private *lp = netdev_priv(dev);
 942
 943        netif_stop_queue(dev);
 944        writel(value, &lp->eth_regs->ethintfc);
 945        korina_restart(dev);
 946}
 947
 948/* Ethernet Tx Underflow interrupt */
 949static irqreturn_t korina_und_interrupt(int irq, void *dev_id)
 950{
 951        struct net_device *dev = dev_id;
 952        struct korina_private *lp = netdev_priv(dev);
 953        unsigned int und;
 954
 955        spin_lock(&lp->lock);
 956
 957        und = readl(&lp->eth_regs->ethintfc);
 958
 959        if (und & ETH_INT_FC_UND)
 960                korina_clear_and_restart(dev, und & ~ETH_INT_FC_UND);
 961
 962        spin_unlock(&lp->lock);
 963
 964        return IRQ_HANDLED;
 965}
 966
 967static void korina_tx_timeout(struct net_device *dev)
 968{
 969        struct korina_private *lp = netdev_priv(dev);
 970        unsigned long flags;
 971
 972        spin_lock_irqsave(&lp->lock, flags);
 973        korina_restart(dev);
 974        spin_unlock_irqrestore(&lp->lock, flags);
 975}
 976
 977/* Ethernet Rx Overflow interrupt */
 978static irqreturn_t
 979korina_ovr_interrupt(int irq, void *dev_id)
 980{
 981        struct net_device *dev = dev_id;
 982        struct korina_private *lp = netdev_priv(dev);
 983        unsigned int ovr;
 984
 985        spin_lock(&lp->lock);
 986        ovr = readl(&lp->eth_regs->ethintfc);
 987
 988        if (ovr & ETH_INT_FC_OVR)
 989                korina_clear_and_restart(dev, ovr & ~ETH_INT_FC_OVR);
 990
 991        spin_unlock(&lp->lock);
 992
 993        return IRQ_HANDLED;
 994}
 995
 996#ifdef CONFIG_NET_POLL_CONTROLLER
 997static void korina_poll_controller(struct net_device *dev)
 998{
 999        disable_irq(dev->irq);
1000        korina_tx_dma_interrupt(dev->irq, dev);
1001        enable_irq(dev->irq);
1002}
1003#endif
1004
1005static int korina_open(struct net_device *dev)
1006{
1007        struct korina_private *lp = netdev_priv(dev);
1008        int ret;
1009
1010        /* Initialize */
1011        ret = korina_init(dev);
1012        if (ret < 0) {
1013                printk(KERN_ERR "%s: cannot open device\n", dev->name);
1014                goto out;
1015        }
1016
1017        /* Install the interrupt handler
1018         * that handles the Done Finished
1019         * Ovr and Und Events */
1020        ret = request_irq(lp->rx_irq, &korina_rx_dma_interrupt,
1021                        IRQF_DISABLED, "Korina ethernet Rx", dev);
1022        if (ret < 0) {
1023                printk(KERN_ERR "%s: unable to get Rx DMA IRQ %d\n",
1024                    dev->name, lp->rx_irq);
1025                goto err_release;
1026        }
1027        ret = request_irq(lp->tx_irq, &korina_tx_dma_interrupt,
1028                        IRQF_DISABLED, "Korina ethernet Tx", dev);
1029        if (ret < 0) {
1030                printk(KERN_ERR "%s: unable to get Tx DMA IRQ %d\n",
1031                    dev->name, lp->tx_irq);
1032                goto err_free_rx_irq;
1033        }
1034
1035        /* Install handler for overrun error. */
1036        ret = request_irq(lp->ovr_irq, &korina_ovr_interrupt,
1037                        IRQF_DISABLED, "Ethernet Overflow", dev);
1038        if (ret < 0) {
1039                printk(KERN_ERR "%s: unable to get OVR IRQ %d\n",
1040                    dev->name, lp->ovr_irq);
1041                goto err_free_tx_irq;
1042        }
1043
1044        /* Install handler for underflow error. */
1045        ret = request_irq(lp->und_irq, &korina_und_interrupt,
1046                        IRQF_DISABLED, "Ethernet Underflow", dev);
1047        if (ret < 0) {
1048                printk(KERN_ERR "%s: unable to get UND IRQ %d\n",
1049                    dev->name, lp->und_irq);
1050                goto err_free_ovr_irq;
1051        }
1052        mod_timer(&lp->media_check_timer, jiffies + 1);
1053out:
1054        return ret;
1055
1056err_free_ovr_irq:
1057        free_irq(lp->ovr_irq, dev);
1058err_free_tx_irq:
1059        free_irq(lp->tx_irq, dev);
1060err_free_rx_irq:
1061        free_irq(lp->rx_irq, dev);
1062err_release:
1063        korina_free_ring(dev);
1064        goto out;
1065}
1066
1067static int korina_close(struct net_device *dev)
1068{
1069        struct korina_private *lp = netdev_priv(dev);
1070        u32 tmp;
1071
1072        del_timer(&lp->media_check_timer);
1073
1074        /* Disable interrupts */
1075        disable_irq(lp->rx_irq);
1076        disable_irq(lp->tx_irq);
1077        disable_irq(lp->ovr_irq);
1078        disable_irq(lp->und_irq);
1079
1080        korina_abort_tx(dev);
1081        tmp = readl(&lp->tx_dma_regs->dmasm);
1082        tmp = tmp | DMA_STAT_FINI | DMA_STAT_ERR;
1083        writel(tmp, &lp->tx_dma_regs->dmasm);
1084
1085        korina_abort_rx(dev);
1086        tmp = readl(&lp->rx_dma_regs->dmasm);
1087        tmp = tmp | DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR;
1088        writel(tmp, &lp->rx_dma_regs->dmasm);
1089
1090        korina_free_ring(dev);
1091
1092        napi_disable(&lp->napi);
1093
1094        free_irq(lp->rx_irq, dev);
1095        free_irq(lp->tx_irq, dev);
1096        free_irq(lp->ovr_irq, dev);
1097        free_irq(lp->und_irq, dev);
1098
1099        return 0;
1100}
1101
1102static const struct net_device_ops korina_netdev_ops = {
1103        .ndo_open               = korina_open,
1104        .ndo_stop               = korina_close,
1105        .ndo_start_xmit         = korina_send_packet,
1106        .ndo_set_multicast_list = korina_multicast_list,
1107        .ndo_tx_timeout         = korina_tx_timeout,
1108        .ndo_do_ioctl           = korina_ioctl,
1109        .ndo_change_mtu         = eth_change_mtu,
1110        .ndo_validate_addr      = eth_validate_addr,
1111        .ndo_set_mac_address    = eth_mac_addr,
1112#ifdef CONFIG_NET_POLL_CONTROLLER
1113        .ndo_poll_controller    = korina_poll_controller,
1114#endif
1115};
1116
1117static int korina_probe(struct platform_device *pdev)
1118{
1119        struct korina_device *bif = platform_get_drvdata(pdev);
1120        struct korina_private *lp;
1121        struct net_device *dev;
1122        struct resource *r;
1123        int rc;
1124
1125        dev = alloc_etherdev(sizeof(struct korina_private));
1126        if (!dev) {
1127                printk(KERN_ERR DRV_NAME ": alloc_etherdev failed\n");
1128                return -ENOMEM;
1129        }
1130        SET_NETDEV_DEV(dev, &pdev->dev);
1131        lp = netdev_priv(dev);
1132
1133        bif->dev = dev;
1134        memcpy(dev->dev_addr, bif->mac, 6);
1135
1136        lp->rx_irq = platform_get_irq_byname(pdev, "korina_rx");
1137        lp->tx_irq = platform_get_irq_byname(pdev, "korina_tx");
1138        lp->ovr_irq = platform_get_irq_byname(pdev, "korina_ovr");
1139        lp->und_irq = platform_get_irq_byname(pdev, "korina_und");
1140
1141        r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_regs");
1142        dev->base_addr = r->start;
1143        lp->eth_regs = ioremap_nocache(r->start, r->end - r->start);
1144        if (!lp->eth_regs) {
1145                printk(KERN_ERR DRV_NAME ": cannot remap registers\n");
1146                rc = -ENXIO;
1147                goto probe_err_out;
1148        }
1149
1150        r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_dma_rx");
1151        lp->rx_dma_regs = ioremap_nocache(r->start, r->end - r->start);
1152        if (!lp->rx_dma_regs) {
1153                printk(KERN_ERR DRV_NAME ": cannot remap Rx DMA registers\n");
1154                rc = -ENXIO;
1155                goto probe_err_dma_rx;
1156        }
1157
1158        r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_dma_tx");
1159        lp->tx_dma_regs = ioremap_nocache(r->start, r->end - r->start);
1160        if (!lp->tx_dma_regs) {
1161                printk(KERN_ERR DRV_NAME ": cannot remap Tx DMA registers\n");
1162                rc = -ENXIO;
1163                goto probe_err_dma_tx;
1164        }
1165
1166        lp->td_ring = kmalloc(TD_RING_SIZE + RD_RING_SIZE, GFP_KERNEL);
1167        if (!lp->td_ring) {
1168                printk(KERN_ERR DRV_NAME ": cannot allocate descriptors\n");
1169                rc = -ENXIO;
1170                goto probe_err_td_ring;
1171        }
1172
1173        dma_cache_inv((unsigned long)(lp->td_ring),
1174                        TD_RING_SIZE + RD_RING_SIZE);
1175
1176        /* now convert TD_RING pointer to KSEG1 */
1177        lp->td_ring = (struct dma_desc *)KSEG1ADDR(lp->td_ring);
1178        lp->rd_ring = &lp->td_ring[KORINA_NUM_TDS];
1179
1180        spin_lock_init(&lp->lock);
1181        /* just use the rx dma irq */
1182        dev->irq = lp->rx_irq;
1183        lp->dev = dev;
1184
1185        dev->netdev_ops = &korina_netdev_ops;
1186        dev->ethtool_ops = &netdev_ethtool_ops;
1187        dev->watchdog_timeo = TX_TIMEOUT;
1188        netif_napi_add(dev, &lp->napi, korina_poll, 64);
1189
1190        lp->phy_addr = (((lp->rx_irq == 0x2c? 1:0) << 8) | 0x05);
1191        lp->mii_if.dev = dev;
1192        lp->mii_if.mdio_read = mdio_read;
1193        lp->mii_if.mdio_write = mdio_write;
1194        lp->mii_if.phy_id = lp->phy_addr;
1195        lp->mii_if.phy_id_mask = 0x1f;
1196        lp->mii_if.reg_num_mask = 0x1f;
1197
1198        rc = register_netdev(dev);
1199        if (rc < 0) {
1200                printk(KERN_ERR DRV_NAME
1201                        ": cannot register net device: %d\n", rc);
1202                goto probe_err_register;
1203        }
1204        setup_timer(&lp->media_check_timer, korina_poll_media, (unsigned long) dev);
1205
1206        printk(KERN_INFO "%s: " DRV_NAME "-" DRV_VERSION " " DRV_RELDATE "\n",
1207                        dev->name);
1208out:
1209        return rc;
1210
1211probe_err_register:
1212        kfree(lp->td_ring);
1213probe_err_td_ring:
1214        iounmap(lp->tx_dma_regs);
1215probe_err_dma_tx:
1216        iounmap(lp->rx_dma_regs);
1217probe_err_dma_rx:
1218        iounmap(lp->eth_regs);
1219probe_err_out:
1220        free_netdev(dev);
1221        goto out;
1222}
1223
1224static int korina_remove(struct platform_device *pdev)
1225{
1226        struct korina_device *bif = platform_get_drvdata(pdev);
1227        struct korina_private *lp = netdev_priv(bif->dev);
1228
1229        iounmap(lp->eth_regs);
1230        iounmap(lp->rx_dma_regs);
1231        iounmap(lp->tx_dma_regs);
1232
1233        platform_set_drvdata(pdev, NULL);
1234        unregister_netdev(bif->dev);
1235        free_netdev(bif->dev);
1236
1237        return 0;
1238}
1239
1240static struct platform_driver korina_driver = {
1241        .driver.name = "korina",
1242        .probe = korina_probe,
1243        .remove = korina_remove,
1244};
1245
1246static int __init korina_init_module(void)
1247{
1248        return platform_driver_register(&korina_driver);
1249}
1250
1251static void korina_cleanup_module(void)
1252{
1253        return platform_driver_unregister(&korina_driver);
1254}
1255
1256module_init(korina_init_module);
1257module_exit(korina_cleanup_module);
1258
1259MODULE_AUTHOR("Philip Rischel <rischelp@idt.com>");
1260MODULE_AUTHOR("Felix Fietkau <nbd@openwrt.org>");
1261MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
1262MODULE_DESCRIPTION("IDT RC32434 (Korina) Ethernet driver");
1263MODULE_LICENSE("GPL");
1264