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26#include <linux/netdevice.h>
27#include <linux/delay.h>
28#include "netxen_nic.h"
29#include "netxen_nic_hw.h"
30
31struct crb_addr_pair {
32 u32 addr;
33 u32 data;
34};
35
36#define NETXEN_MAX_CRB_XFORM 60
37static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
38#define NETXEN_ADDR_ERROR (0xffffffff)
39
40#define crb_addr_transform(name) \
41 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
42 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
43
44#define NETXEN_NIC_XDMA_RESET 0x8000ff
45
46static void
47netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
48 struct nx_host_rds_ring *rds_ring);
49
50static void crb_addr_transform_setup(void)
51{
52 crb_addr_transform(XDMA);
53 crb_addr_transform(TIMR);
54 crb_addr_transform(SRE);
55 crb_addr_transform(SQN3);
56 crb_addr_transform(SQN2);
57 crb_addr_transform(SQN1);
58 crb_addr_transform(SQN0);
59 crb_addr_transform(SQS3);
60 crb_addr_transform(SQS2);
61 crb_addr_transform(SQS1);
62 crb_addr_transform(SQS0);
63 crb_addr_transform(RPMX7);
64 crb_addr_transform(RPMX6);
65 crb_addr_transform(RPMX5);
66 crb_addr_transform(RPMX4);
67 crb_addr_transform(RPMX3);
68 crb_addr_transform(RPMX2);
69 crb_addr_transform(RPMX1);
70 crb_addr_transform(RPMX0);
71 crb_addr_transform(ROMUSB);
72 crb_addr_transform(SN);
73 crb_addr_transform(QMN);
74 crb_addr_transform(QMS);
75 crb_addr_transform(PGNI);
76 crb_addr_transform(PGND);
77 crb_addr_transform(PGN3);
78 crb_addr_transform(PGN2);
79 crb_addr_transform(PGN1);
80 crb_addr_transform(PGN0);
81 crb_addr_transform(PGSI);
82 crb_addr_transform(PGSD);
83 crb_addr_transform(PGS3);
84 crb_addr_transform(PGS2);
85 crb_addr_transform(PGS1);
86 crb_addr_transform(PGS0);
87 crb_addr_transform(PS);
88 crb_addr_transform(PH);
89 crb_addr_transform(NIU);
90 crb_addr_transform(I2Q);
91 crb_addr_transform(EG);
92 crb_addr_transform(MN);
93 crb_addr_transform(MS);
94 crb_addr_transform(CAS2);
95 crb_addr_transform(CAS1);
96 crb_addr_transform(CAS0);
97 crb_addr_transform(CAM);
98 crb_addr_transform(C2C1);
99 crb_addr_transform(C2C0);
100 crb_addr_transform(SMB);
101 crb_addr_transform(OCM0);
102 crb_addr_transform(I2C0);
103}
104
105void netxen_release_rx_buffers(struct netxen_adapter *adapter)
106{
107 struct netxen_recv_context *recv_ctx;
108 struct nx_host_rds_ring *rds_ring;
109 struct netxen_rx_buffer *rx_buf;
110 int i, ring;
111
112 recv_ctx = &adapter->recv_ctx;
113 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
114 rds_ring = &recv_ctx->rds_rings[ring];
115 for (i = 0; i < rds_ring->num_desc; ++i) {
116 rx_buf = &(rds_ring->rx_buf_arr[i]);
117 if (rx_buf->state == NETXEN_BUFFER_FREE)
118 continue;
119 pci_unmap_single(adapter->pdev,
120 rx_buf->dma,
121 rds_ring->dma_size,
122 PCI_DMA_FROMDEVICE);
123 if (rx_buf->skb != NULL)
124 dev_kfree_skb_any(rx_buf->skb);
125 }
126 }
127}
128
129void netxen_release_tx_buffers(struct netxen_adapter *adapter)
130{
131 struct netxen_cmd_buffer *cmd_buf;
132 struct netxen_skb_frag *buffrag;
133 int i, j;
134 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
135
136 cmd_buf = tx_ring->cmd_buf_arr;
137 for (i = 0; i < tx_ring->num_desc; i++) {
138 buffrag = cmd_buf->frag_array;
139 if (buffrag->dma) {
140 pci_unmap_single(adapter->pdev, buffrag->dma,
141 buffrag->length, PCI_DMA_TODEVICE);
142 buffrag->dma = 0ULL;
143 }
144 for (j = 0; j < cmd_buf->frag_count; j++) {
145 buffrag++;
146 if (buffrag->dma) {
147 pci_unmap_page(adapter->pdev, buffrag->dma,
148 buffrag->length,
149 PCI_DMA_TODEVICE);
150 buffrag->dma = 0ULL;
151 }
152 }
153 if (cmd_buf->skb) {
154 dev_kfree_skb_any(cmd_buf->skb);
155 cmd_buf->skb = NULL;
156 }
157 cmd_buf++;
158 }
159}
160
161void netxen_free_sw_resources(struct netxen_adapter *adapter)
162{
163 struct netxen_recv_context *recv_ctx;
164 struct nx_host_rds_ring *rds_ring;
165 struct nx_host_tx_ring *tx_ring;
166 int ring;
167
168 recv_ctx = &adapter->recv_ctx;
169
170 if (recv_ctx->rds_rings == NULL)
171 goto skip_rds;
172
173 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
174 rds_ring = &recv_ctx->rds_rings[ring];
175 vfree(rds_ring->rx_buf_arr);
176 rds_ring->rx_buf_arr = NULL;
177 }
178 kfree(recv_ctx->rds_rings);
179
180skip_rds:
181 if (adapter->tx_ring == NULL)
182 return;
183
184 tx_ring = adapter->tx_ring;
185 vfree(tx_ring->cmd_buf_arr);
186}
187
188int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
189{
190 struct netxen_recv_context *recv_ctx;
191 struct nx_host_rds_ring *rds_ring;
192 struct nx_host_sds_ring *sds_ring;
193 struct nx_host_tx_ring *tx_ring;
194 struct netxen_rx_buffer *rx_buf;
195 int ring, i, size;
196
197 struct netxen_cmd_buffer *cmd_buf_arr;
198 struct net_device *netdev = adapter->netdev;
199 struct pci_dev *pdev = adapter->pdev;
200
201 size = sizeof(struct nx_host_tx_ring);
202 tx_ring = kzalloc(size, GFP_KERNEL);
203 if (tx_ring == NULL) {
204 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
205 netdev->name);
206 return -ENOMEM;
207 }
208 adapter->tx_ring = tx_ring;
209
210 tx_ring->num_desc = adapter->num_txd;
211 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
212
213 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
214 if (cmd_buf_arr == NULL) {
215 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
216 netdev->name);
217 return -ENOMEM;
218 }
219 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
220 tx_ring->cmd_buf_arr = cmd_buf_arr;
221
222 recv_ctx = &adapter->recv_ctx;
223
224 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
225 rds_ring = kzalloc(size, GFP_KERNEL);
226 if (rds_ring == NULL) {
227 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
228 netdev->name);
229 return -ENOMEM;
230 }
231 recv_ctx->rds_rings = rds_ring;
232
233 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
234 rds_ring = &recv_ctx->rds_rings[ring];
235 switch (ring) {
236 case RCV_RING_NORMAL:
237 rds_ring->num_desc = adapter->num_rxd;
238 if (adapter->ahw.cut_through) {
239 rds_ring->dma_size =
240 NX_CT_DEFAULT_RX_BUF_LEN;
241 rds_ring->skb_size =
242 NX_CT_DEFAULT_RX_BUF_LEN;
243 } else {
244 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
245 rds_ring->dma_size =
246 NX_P3_RX_BUF_MAX_LEN;
247 else
248 rds_ring->dma_size =
249 NX_P2_RX_BUF_MAX_LEN;
250 rds_ring->skb_size =
251 rds_ring->dma_size + NET_IP_ALIGN;
252 }
253 break;
254
255 case RCV_RING_JUMBO:
256 rds_ring->num_desc = adapter->num_jumbo_rxd;
257 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
258 rds_ring->dma_size =
259 NX_P3_RX_JUMBO_BUF_MAX_LEN;
260 else
261 rds_ring->dma_size =
262 NX_P2_RX_JUMBO_BUF_MAX_LEN;
263
264 if (adapter->capabilities & NX_CAP0_HW_LRO)
265 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA;
266
267 rds_ring->skb_size =
268 rds_ring->dma_size + NET_IP_ALIGN;
269 break;
270
271 case RCV_RING_LRO:
272 rds_ring->num_desc = adapter->num_lro_rxd;
273 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH;
274 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
275 break;
276
277 }
278 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
279 vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
280 if (rds_ring->rx_buf_arr == NULL) {
281 printk(KERN_ERR "%s: Failed to allocate "
282 "rx buffer ring %d\n",
283 netdev->name, ring);
284
285 goto err_out;
286 }
287 memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
288 INIT_LIST_HEAD(&rds_ring->free_list);
289
290
291
292
293 rx_buf = rds_ring->rx_buf_arr;
294 for (i = 0; i < rds_ring->num_desc; i++) {
295 list_add_tail(&rx_buf->list,
296 &rds_ring->free_list);
297 rx_buf->ref_handle = i;
298 rx_buf->state = NETXEN_BUFFER_FREE;
299 rx_buf++;
300 }
301 spin_lock_init(&rds_ring->lock);
302 }
303
304 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
305 sds_ring = &recv_ctx->sds_rings[ring];
306 sds_ring->irq = adapter->msix_entries[ring].vector;
307 sds_ring->adapter = adapter;
308 sds_ring->num_desc = adapter->num_rxd;
309
310 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
311 INIT_LIST_HEAD(&sds_ring->free_list[i]);
312 }
313
314 return 0;
315
316err_out:
317 netxen_free_sw_resources(adapter);
318 return -ENOMEM;
319}
320
321
322
323
324
325static u32 netxen_decode_crb_addr(u32 addr)
326{
327 int i;
328 u32 base_addr, offset, pci_base;
329
330 crb_addr_transform_setup();
331
332 pci_base = NETXEN_ADDR_ERROR;
333 base_addr = addr & 0xfff00000;
334 offset = addr & 0x000fffff;
335
336 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
337 if (crb_addr_xform[i] == base_addr) {
338 pci_base = i << 20;
339 break;
340 }
341 }
342 if (pci_base == NETXEN_ADDR_ERROR)
343 return pci_base;
344 else
345 return (pci_base + offset);
346}
347
348#define NETXEN_MAX_ROM_WAIT_USEC 100
349
350static int netxen_wait_rom_done(struct netxen_adapter *adapter)
351{
352 long timeout = 0;
353 long done = 0;
354
355 cond_resched();
356
357 while (done == 0) {
358 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
359 done &= 2;
360 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) {
361 dev_err(&adapter->pdev->dev,
362 "Timeout reached waiting for rom done");
363 return -EIO;
364 }
365 udelay(1);
366 }
367 return 0;
368}
369
370static int do_rom_fast_read(struct netxen_adapter *adapter,
371 int addr, int *valp)
372{
373 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
374 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
375 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
376 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
377 if (netxen_wait_rom_done(adapter)) {
378 printk("Error waiting for rom done\n");
379 return -EIO;
380 }
381
382 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
383 udelay(10);
384 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
385
386 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
387 return 0;
388}
389
390static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
391 u8 *bytes, size_t size)
392{
393 int addridx;
394 int ret = 0;
395
396 for (addridx = addr; addridx < (addr + size); addridx += 4) {
397 int v;
398 ret = do_rom_fast_read(adapter, addridx, &v);
399 if (ret != 0)
400 break;
401 *(__le32 *)bytes = cpu_to_le32(v);
402 bytes += 4;
403 }
404
405 return ret;
406}
407
408int
409netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
410 u8 *bytes, size_t size)
411{
412 int ret;
413
414 ret = netxen_rom_lock(adapter);
415 if (ret < 0)
416 return ret;
417
418 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
419
420 netxen_rom_unlock(adapter);
421 return ret;
422}
423
424int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
425{
426 int ret;
427
428 if (netxen_rom_lock(adapter) != 0)
429 return -EIO;
430
431 ret = do_rom_fast_read(adapter, addr, valp);
432 netxen_rom_unlock(adapter);
433 return ret;
434}
435
436#define NETXEN_BOARDTYPE 0x4008
437#define NETXEN_BOARDNUM 0x400c
438#define NETXEN_CHIPNUM 0x4010
439
440int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
441{
442 int addr, val;
443 int i, n, init_delay = 0;
444 struct crb_addr_pair *buf;
445 unsigned offset;
446 u32 off;
447
448
449 netxen_rom_lock(adapter);
450 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
451 netxen_rom_unlock(adapter);
452
453 if (verbose) {
454 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
455 printk("P2 ROM board type: 0x%08x\n", val);
456 else
457 printk("Could not read board type\n");
458 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
459 printk("P2 ROM board num: 0x%08x\n", val);
460 else
461 printk("Could not read board number\n");
462 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
463 printk("P2 ROM chip num: 0x%08x\n", val);
464 else
465 printk("Could not read chip number\n");
466 }
467
468 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
469 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
470 (n != 0xcafecafe) ||
471 netxen_rom_fast_read(adapter, 4, &n) != 0) {
472 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
473 "n: %08x\n", netxen_nic_driver_name, n);
474 return -EIO;
475 }
476 offset = n & 0xffffU;
477 n = (n >> 16) & 0xffffU;
478 } else {
479 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
480 !(n & 0x80000000)) {
481 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
482 "n: %08x\n", netxen_nic_driver_name, n);
483 return -EIO;
484 }
485 offset = 1;
486 n &= ~0x80000000;
487 }
488
489 if (n < 1024) {
490 if (verbose)
491 printk(KERN_DEBUG "%s: %d CRB init values found"
492 " in ROM.\n", netxen_nic_driver_name, n);
493 } else {
494 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
495 " initialized.\n", __func__, n);
496 return -EIO;
497 }
498
499 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
500 if (buf == NULL) {
501 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
502 netxen_nic_driver_name);
503 return -ENOMEM;
504 }
505 for (i = 0; i < n; i++) {
506 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
507 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
508 kfree(buf);
509 return -EIO;
510 }
511
512 buf[i].addr = addr;
513 buf[i].data = val;
514
515 if (verbose)
516 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
517 netxen_nic_driver_name,
518 (u32)netxen_decode_crb_addr(addr), val);
519 }
520 for (i = 0; i < n; i++) {
521
522 off = netxen_decode_crb_addr(buf[i].addr);
523 if (off == NETXEN_ADDR_ERROR) {
524 printk(KERN_ERR"CRB init value out of range %x\n",
525 buf[i].addr);
526 continue;
527 }
528 off += NETXEN_PCI_CRBSPACE;
529
530 if (off == NETXEN_CAM_RAM(0x1fc))
531 continue;
532
533 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
534 if (off == (NETXEN_CRB_I2C0 + 0x1c))
535 continue;
536
537 if (off == (ROMUSB_GLB + 0xbc))
538 continue;
539 if (off == (ROMUSB_GLB + 0xa8))
540 continue;
541 if (off == (ROMUSB_GLB + 0xc8))
542 continue;
543 if (off == (ROMUSB_GLB + 0x24))
544 continue;
545 if (off == (ROMUSB_GLB + 0x1c))
546 continue;
547 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET)
548 continue;
549 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
550 buf[i].data = 0x1020;
551
552 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
553 continue;
554 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
555 continue;
556 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
557 continue;
558 }
559
560 init_delay = 1;
561
562
563 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
564 init_delay = 1000;
565 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
566
567 buf[i].data = NETXEN_NIC_XDMA_RESET;
568 buf[i].data = 0x8000ff;
569 }
570 }
571
572 NXWR32(adapter, off, buf[i].data);
573
574 msleep(init_delay);
575 }
576 kfree(buf);
577
578
579
580
581 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
582 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
583 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
584 }
585
586
587 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
588
589 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
590
591 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
592
593
594
595
596 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
597 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
598
599 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
600 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
601
602 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
603 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
604
605 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
606 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
607 return 0;
608}
609
610int
611netxen_need_fw_reset(struct netxen_adapter *adapter)
612{
613 u32 count, old_count;
614 u32 val, version, major, minor, build;
615 int i, timeout;
616 u8 fw_type;
617
618
619 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
620 return 1;
621
622
623 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
624 return 1;
625
626 old_count = count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
627
628 for (i = 0; i < 10; i++) {
629
630 timeout = msleep_interruptible(200);
631 if (timeout) {
632 NXWR32(adapter, CRB_CMDPEG_STATE,
633 PHAN_INITIALIZE_FAILED);
634 return -EINTR;
635 }
636
637 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
638 if (count != old_count)
639 break;
640 }
641
642
643 if (count == old_count)
644 return 1;
645
646
647 if (adapter->fw) {
648
649 const struct firmware *fw = adapter->fw;
650
651 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
652 version = NETXEN_DECODE_VERSION(val);
653
654 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
655 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
656 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
657
658 if (version > NETXEN_VERSION_CODE(major, minor, build))
659 return 1;
660
661 if (version == NETXEN_VERSION_CODE(major, minor, build)) {
662
663 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
664 fw_type = (val & 0x4) ?
665 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
666
667 if (adapter->fw_type != fw_type)
668 return 1;
669 }
670 }
671
672 return 0;
673}
674
675static char *fw_name[] = {
676 "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin", "flash",
677};
678
679int
680netxen_load_firmware(struct netxen_adapter *adapter)
681{
682 u64 *ptr64;
683 u32 i, flashaddr, size;
684 const struct firmware *fw = adapter->fw;
685 struct pci_dev *pdev = adapter->pdev;
686
687 dev_info(&pdev->dev, "loading firmware from %s\n",
688 fw_name[adapter->fw_type]);
689
690 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
691 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
692
693 if (fw) {
694 __le64 data;
695
696 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
697
698 ptr64 = (u64 *)&fw->data[NETXEN_BOOTLD_START];
699 flashaddr = NETXEN_BOOTLD_START;
700
701 for (i = 0; i < size; i++) {
702 data = cpu_to_le64(ptr64[i]);
703 adapter->pci_mem_write(adapter, flashaddr, &data, 8);
704 flashaddr += 8;
705 }
706
707 size = *(u32 *)&fw->data[NX_FW_SIZE_OFFSET];
708 size = (__force u32)cpu_to_le32(size) / 8;
709
710 ptr64 = (u64 *)&fw->data[NETXEN_IMAGE_START];
711 flashaddr = NETXEN_IMAGE_START;
712
713 for (i = 0; i < size; i++) {
714 data = cpu_to_le64(ptr64[i]);
715
716 if (adapter->pci_mem_write(adapter,
717 flashaddr, &data, 8))
718 return -EIO;
719
720 flashaddr += 8;
721 }
722 } else {
723 u64 data;
724 u32 hi, lo;
725
726 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
727 flashaddr = NETXEN_BOOTLD_START;
728
729 for (i = 0; i < size; i++) {
730 if (netxen_rom_fast_read(adapter,
731 flashaddr, &lo) != 0)
732 return -EIO;
733 if (netxen_rom_fast_read(adapter,
734 flashaddr + 4, &hi) != 0)
735 return -EIO;
736
737
738 data = (((u64)hi << 32) | lo);
739
740 if (adapter->pci_mem_write(adapter,
741 flashaddr, &data, 8))
742 return -EIO;
743
744 flashaddr += 8;
745 }
746 }
747 msleep(1);
748
749 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
750 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
751 else {
752 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
753 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
754 }
755
756 return 0;
757}
758
759static int
760netxen_validate_firmware(struct netxen_adapter *adapter, const char *fwname)
761{
762 __le32 val;
763 u32 ver, min_ver, bios;
764 struct pci_dev *pdev = adapter->pdev;
765 const struct firmware *fw = adapter->fw;
766
767 if (fw->size < NX_FW_MIN_SIZE)
768 return -EINVAL;
769
770 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
771 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
772 return -EINVAL;
773
774 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
775
776 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
777 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
778 else
779 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
780
781 ver = NETXEN_DECODE_VERSION(val);
782
783 if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
784 dev_err(&pdev->dev,
785 "%s: firmware version %d.%d.%d unsupported\n",
786 fwname, _major(ver), _minor(ver), _build(ver));
787 return -EINVAL;
788 }
789
790 val = cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
791 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
792 if ((__force u32)val != bios) {
793 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
794 fwname);
795 return -EINVAL;
796 }
797
798
799 if (netxen_rom_fast_read(adapter,
800 NX_FW_VERSION_OFFSET, (int *)&val))
801 return -EIO;
802 val = NETXEN_DECODE_VERSION(val);
803 if (val > ver) {
804 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
805 fwname);
806 return -EINVAL;
807 }
808
809 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
810 return 0;
811}
812
813static int
814netxen_p3_has_mn(struct netxen_adapter *adapter)
815{
816 u32 capability, flashed_ver;
817 capability = 0;
818
819 netxen_rom_fast_read(adapter,
820 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
821 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
822
823 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
824
825 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
826 if (capability & NX_PEG_TUNE_MN_PRESENT)
827 return 1;
828 }
829 return 0;
830}
831
832void netxen_request_firmware(struct netxen_adapter *adapter)
833{
834 u8 fw_type;
835 struct pci_dev *pdev = adapter->pdev;
836 int rc = 0;
837
838 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
839 fw_type = NX_P2_MN_ROMIMAGE;
840 goto request_fw;
841 }
842
843 fw_type = netxen_p3_has_mn(adapter) ?
844 NX_P3_MN_ROMIMAGE : NX_P3_CT_ROMIMAGE;
845
846request_fw:
847 rc = request_firmware(&adapter->fw, fw_name[fw_type], &pdev->dev);
848 if (rc != 0) {
849 if (fw_type == NX_P3_MN_ROMIMAGE) {
850 msleep(1);
851 fw_type = NX_P3_CT_ROMIMAGE;
852 goto request_fw;
853 }
854
855 fw_type = NX_FLASH_ROMIMAGE;
856 adapter->fw = NULL;
857 goto done;
858 }
859
860 rc = netxen_validate_firmware(adapter, fw_name[fw_type]);
861 if (rc != 0) {
862 release_firmware(adapter->fw);
863
864 if (fw_type == NX_P3_MN_ROMIMAGE) {
865 msleep(1);
866 fw_type = NX_P3_CT_ROMIMAGE;
867 goto request_fw;
868 }
869
870 fw_type = NX_FLASH_ROMIMAGE;
871 adapter->fw = NULL;
872 goto done;
873 }
874
875done:
876 adapter->fw_type = fw_type;
877}
878
879
880void
881netxen_release_firmware(struct netxen_adapter *adapter)
882{
883 if (adapter->fw)
884 release_firmware(adapter->fw);
885 adapter->fw = NULL;
886}
887
888int netxen_init_dummy_dma(struct netxen_adapter *adapter)
889{
890 u64 addr;
891 u32 hi, lo;
892
893 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
894 return 0;
895
896 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev,
897 NETXEN_HOST_DUMMY_DMA_SIZE,
898 &adapter->dummy_dma.phys_addr);
899 if (adapter->dummy_dma.addr == NULL) {
900 dev_err(&adapter->pdev->dev,
901 "ERROR: Could not allocate dummy DMA memory\n");
902 return -ENOMEM;
903 }
904
905 addr = (uint64_t) adapter->dummy_dma.phys_addr;
906 hi = (addr >> 32) & 0xffffffff;
907 lo = addr & 0xffffffff;
908
909 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
910 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
911
912 return 0;
913}
914
915
916
917
918
919
920
921
922
923void netxen_free_dummy_dma(struct netxen_adapter *adapter)
924{
925 int i = 100;
926 u32 ctrl;
927
928 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
929 return;
930
931 if (!adapter->dummy_dma.addr)
932 return;
933
934 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
935 if ((ctrl & 0x1) != 0) {
936 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2));
937
938 while ((ctrl & 0x1) != 0) {
939
940 msleep(50);
941
942 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
943
944 if (--i == 0)
945 break;
946 };
947 }
948
949 if (i) {
950 pci_free_consistent(adapter->pdev,
951 NETXEN_HOST_DUMMY_DMA_SIZE,
952 adapter->dummy_dma.addr,
953 adapter->dummy_dma.phys_addr);
954 adapter->dummy_dma.addr = NULL;
955 } else
956 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n");
957}
958
959int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
960{
961 u32 val = 0;
962 int retries = 60;
963
964 if (pegtune_val)
965 return 0;
966
967 do {
968 val = NXRD32(adapter, CRB_CMDPEG_STATE);
969
970 switch (val) {
971 case PHAN_INITIALIZE_COMPLETE:
972 case PHAN_INITIALIZE_ACK:
973 return 0;
974 case PHAN_INITIALIZE_FAILED:
975 goto out_err;
976 default:
977 break;
978 }
979
980 msleep(500);
981
982 } while (--retries);
983
984 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
985
986out_err:
987 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
988 return -EIO;
989}
990
991static int
992netxen_receive_peg_ready(struct netxen_adapter *adapter)
993{
994 u32 val = 0;
995 int retries = 2000;
996
997 do {
998 val = NXRD32(adapter, CRB_RCVPEG_STATE);
999
1000 if (val == PHAN_PEG_RCV_INITIALIZED)
1001 return 0;
1002
1003 msleep(10);
1004
1005 } while (--retries);
1006
1007 if (!retries) {
1008 printk(KERN_ERR "Receive Peg initialization not "
1009 "complete, state: 0x%x.\n", val);
1010 return -EIO;
1011 }
1012
1013 return 0;
1014}
1015
1016int netxen_init_firmware(struct netxen_adapter *adapter)
1017{
1018 int err;
1019
1020 err = netxen_receive_peg_ready(adapter);
1021 if (err)
1022 return err;
1023
1024 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1025 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1026 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1027 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1028
1029 return err;
1030}
1031
1032static void
1033netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1034{
1035 u32 cable_OUI;
1036 u16 cable_len;
1037 u16 link_speed;
1038 u8 link_status, module, duplex, autoneg;
1039 struct net_device *netdev = adapter->netdev;
1040
1041 adapter->has_link_events = 1;
1042
1043 cable_OUI = msg->body[1] & 0xffffffff;
1044 cable_len = (msg->body[1] >> 32) & 0xffff;
1045 link_speed = (msg->body[1] >> 48) & 0xffff;
1046
1047 link_status = msg->body[2] & 0xff;
1048 duplex = (msg->body[2] >> 16) & 0xff;
1049 autoneg = (msg->body[2] >> 24) & 0xff;
1050
1051 module = (msg->body[2] >> 8) & 0xff;
1052 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1053 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1054 netdev->name, cable_OUI, cable_len);
1055 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1056 printk(KERN_INFO "%s: unsupported cable length %d\n",
1057 netdev->name, cable_len);
1058 }
1059
1060 netxen_advert_link_change(adapter, link_status);
1061
1062
1063 if (duplex == LINKEVENT_FULL_DUPLEX)
1064 adapter->link_duplex = DUPLEX_FULL;
1065 else
1066 adapter->link_duplex = DUPLEX_HALF;
1067 adapter->module_type = module;
1068 adapter->link_autoneg = autoneg;
1069 adapter->link_speed = link_speed;
1070}
1071
1072static void
1073netxen_handle_fw_message(int desc_cnt, int index,
1074 struct nx_host_sds_ring *sds_ring)
1075{
1076 nx_fw_msg_t msg;
1077 struct status_desc *desc;
1078 int i = 0, opcode;
1079
1080 while (desc_cnt > 0 && i < 8) {
1081 desc = &sds_ring->desc_head[index];
1082 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1083 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1084
1085 index = get_next_index(index, sds_ring->num_desc);
1086 desc_cnt--;
1087 }
1088
1089 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1090 switch (opcode) {
1091 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1092 netxen_handle_linkevent(sds_ring->adapter, &msg);
1093 break;
1094 default:
1095 break;
1096 }
1097}
1098
1099static int
1100netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1101 struct nx_host_rds_ring *rds_ring,
1102 struct netxen_rx_buffer *buffer)
1103{
1104 struct sk_buff *skb;
1105 dma_addr_t dma;
1106 struct pci_dev *pdev = adapter->pdev;
1107
1108 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1109 if (!buffer->skb)
1110 return 1;
1111
1112 skb = buffer->skb;
1113
1114 if (!adapter->ahw.cut_through)
1115 skb_reserve(skb, 2);
1116
1117 dma = pci_map_single(pdev, skb->data,
1118 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1119
1120 if (pci_dma_mapping_error(pdev, dma)) {
1121 dev_kfree_skb_any(skb);
1122 buffer->skb = NULL;
1123 return 1;
1124 }
1125
1126 buffer->skb = skb;
1127 buffer->dma = dma;
1128 buffer->state = NETXEN_BUFFER_BUSY;
1129
1130 return 0;
1131}
1132
1133static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1134 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1135{
1136 struct netxen_rx_buffer *buffer;
1137 struct sk_buff *skb;
1138
1139 buffer = &rds_ring->rx_buf_arr[index];
1140
1141 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1142 PCI_DMA_FROMDEVICE);
1143
1144 skb = buffer->skb;
1145 if (!skb)
1146 goto no_skb;
1147
1148 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1149 adapter->stats.csummed++;
1150 skb->ip_summed = CHECKSUM_UNNECESSARY;
1151 } else
1152 skb->ip_summed = CHECKSUM_NONE;
1153
1154 skb->dev = adapter->netdev;
1155
1156 buffer->skb = NULL;
1157no_skb:
1158 buffer->state = NETXEN_BUFFER_FREE;
1159 return skb;
1160}
1161
1162static struct netxen_rx_buffer *
1163netxen_process_rcv(struct netxen_adapter *adapter,
1164 struct nx_host_sds_ring *sds_ring,
1165 int ring, u64 sts_data0)
1166{
1167 struct net_device *netdev = adapter->netdev;
1168 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1169 struct netxen_rx_buffer *buffer;
1170 struct sk_buff *skb;
1171 struct nx_host_rds_ring *rds_ring;
1172 int index, length, cksum, pkt_offset;
1173
1174 if (unlikely(ring >= adapter->max_rds_rings))
1175 return NULL;
1176
1177 rds_ring = &recv_ctx->rds_rings[ring];
1178
1179 index = netxen_get_sts_refhandle(sts_data0);
1180 if (unlikely(index >= rds_ring->num_desc))
1181 return NULL;
1182
1183 buffer = &rds_ring->rx_buf_arr[index];
1184
1185 length = netxen_get_sts_totallength(sts_data0);
1186 cksum = netxen_get_sts_status(sts_data0);
1187 pkt_offset = netxen_get_sts_pkt_offset(sts_data0);
1188
1189 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1190 if (!skb)
1191 return buffer;
1192
1193 if (length > rds_ring->skb_size)
1194 skb_put(skb, rds_ring->skb_size);
1195 else
1196 skb_put(skb, length);
1197
1198
1199 if (pkt_offset)
1200 skb_pull(skb, pkt_offset);
1201
1202 skb->truesize = skb->len + sizeof(struct sk_buff);
1203 skb->protocol = eth_type_trans(skb, netdev);
1204
1205 napi_gro_receive(&sds_ring->napi, skb);
1206
1207 adapter->stats.rx_pkts++;
1208 adapter->stats.rxbytes += length;
1209
1210 return buffer;
1211}
1212
1213#define TCP_HDR_SIZE 20
1214#define TCP_TS_OPTION_SIZE 12
1215#define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE)
1216
1217static struct netxen_rx_buffer *
1218netxen_process_lro(struct netxen_adapter *adapter,
1219 struct nx_host_sds_ring *sds_ring,
1220 int ring, u64 sts_data0, u64 sts_data1)
1221{
1222 struct net_device *netdev = adapter->netdev;
1223 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1224 struct netxen_rx_buffer *buffer;
1225 struct sk_buff *skb;
1226 struct nx_host_rds_ring *rds_ring;
1227 struct iphdr *iph;
1228 struct tcphdr *th;
1229 bool push, timestamp;
1230 int l2_hdr_offset, l4_hdr_offset;
1231 int index;
1232 u16 lro_length, length, data_offset;
1233 u32 seq_number;
1234
1235 if (unlikely(ring > adapter->max_rds_rings))
1236 return NULL;
1237
1238 rds_ring = &recv_ctx->rds_rings[ring];
1239
1240 index = netxen_get_lro_sts_refhandle(sts_data0);
1241 if (unlikely(index > rds_ring->num_desc))
1242 return NULL;
1243
1244 buffer = &rds_ring->rx_buf_arr[index];
1245
1246 timestamp = netxen_get_lro_sts_timestamp(sts_data0);
1247 lro_length = netxen_get_lro_sts_length(sts_data0);
1248 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0);
1249 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0);
1250 push = netxen_get_lro_sts_push_flag(sts_data0);
1251 seq_number = netxen_get_lro_sts_seq_number(sts_data1);
1252
1253 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
1254 if (!skb)
1255 return buffer;
1256
1257 if (timestamp)
1258 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE;
1259 else
1260 data_offset = l4_hdr_offset + TCP_HDR_SIZE;
1261
1262 skb_put(skb, lro_length + data_offset);
1263
1264 skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb);
1265
1266 skb_pull(skb, l2_hdr_offset);
1267 skb->protocol = eth_type_trans(skb, netdev);
1268
1269 iph = (struct iphdr *)skb->data;
1270 th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
1271
1272 length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
1273 iph->tot_len = htons(length);
1274 iph->check = 0;
1275 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
1276 th->psh = push;
1277 th->seq = htonl(seq_number);
1278
1279 length = skb->len;
1280
1281 netif_receive_skb(skb);
1282
1283 adapter->stats.lro_pkts++;
1284 adapter->stats.rxbytes += length;
1285
1286 return buffer;
1287}
1288
1289#define netxen_merge_rx_buffers(list, head) \
1290 do { list_splice_tail_init(list, head); } while (0);
1291
1292int
1293netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
1294{
1295 struct netxen_adapter *adapter = sds_ring->adapter;
1296
1297 struct list_head *cur;
1298
1299 struct status_desc *desc;
1300 struct netxen_rx_buffer *rxbuf;
1301
1302 u32 consumer = sds_ring->consumer;
1303
1304 int count = 0;
1305 u64 sts_data0, sts_data1;
1306 int opcode, ring = 0, desc_cnt;
1307
1308 while (count < max) {
1309 desc = &sds_ring->desc_head[consumer];
1310 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
1311
1312 if (!(sts_data0 & STATUS_OWNER_HOST))
1313 break;
1314
1315 desc_cnt = netxen_get_sts_desc_cnt(sts_data0);
1316
1317 opcode = netxen_get_sts_opcode(sts_data0);
1318
1319 switch (opcode) {
1320 case NETXEN_NIC_RXPKT_DESC:
1321 case NETXEN_OLD_RXPKT_DESC:
1322 case NETXEN_NIC_SYN_OFFLOAD:
1323 ring = netxen_get_sts_type(sts_data0);
1324 rxbuf = netxen_process_rcv(adapter, sds_ring,
1325 ring, sts_data0);
1326 break;
1327 case NETXEN_NIC_LRO_DESC:
1328 ring = netxen_get_lro_sts_type(sts_data0);
1329 sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
1330 rxbuf = netxen_process_lro(adapter, sds_ring,
1331 ring, sts_data0, sts_data1);
1332 break;
1333 case NETXEN_NIC_RESPONSE_DESC:
1334 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1335 default:
1336 goto skip;
1337 }
1338
1339 WARN_ON(desc_cnt > 1);
1340
1341 if (rxbuf)
1342 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1343
1344skip:
1345 for (; desc_cnt > 0; desc_cnt--) {
1346 desc = &sds_ring->desc_head[consumer];
1347 desc->status_desc_data[0] =
1348 cpu_to_le64(STATUS_OWNER_PHANTOM);
1349 consumer = get_next_index(consumer, sds_ring->num_desc);
1350 }
1351 count++;
1352 }
1353
1354 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1355 struct nx_host_rds_ring *rds_ring =
1356 &adapter->recv_ctx.rds_rings[ring];
1357
1358 if (!list_empty(&sds_ring->free_list[ring])) {
1359 list_for_each(cur, &sds_ring->free_list[ring]) {
1360 rxbuf = list_entry(cur,
1361 struct netxen_rx_buffer, list);
1362 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1363 }
1364 spin_lock(&rds_ring->lock);
1365 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1366 &rds_ring->free_list);
1367 spin_unlock(&rds_ring->lock);
1368 }
1369
1370 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1371 }
1372
1373 if (count) {
1374 sds_ring->consumer = consumer;
1375 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer);
1376 }
1377
1378 return count;
1379}
1380
1381
1382int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1383{
1384 u32 sw_consumer, hw_consumer;
1385 int count = 0, i;
1386 struct netxen_cmd_buffer *buffer;
1387 struct pci_dev *pdev = adapter->pdev;
1388 struct net_device *netdev = adapter->netdev;
1389 struct netxen_skb_frag *frag;
1390 int done = 0;
1391 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1392
1393 if (!spin_trylock(&adapter->tx_clean_lock))
1394 return 1;
1395
1396 sw_consumer = tx_ring->sw_consumer;
1397 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1398
1399 while (sw_consumer != hw_consumer) {
1400 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
1401 if (buffer->skb) {
1402 frag = &buffer->frag_array[0];
1403 pci_unmap_single(pdev, frag->dma, frag->length,
1404 PCI_DMA_TODEVICE);
1405 frag->dma = 0ULL;
1406 for (i = 1; i < buffer->frag_count; i++) {
1407 frag++;
1408 pci_unmap_page(pdev, frag->dma, frag->length,
1409 PCI_DMA_TODEVICE);
1410 frag->dma = 0ULL;
1411 }
1412
1413 adapter->stats.xmitfinished++;
1414 dev_kfree_skb_any(buffer->skb);
1415 buffer->skb = NULL;
1416 }
1417
1418 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
1419 if (++count >= MAX_STATUS_HANDLE)
1420 break;
1421 }
1422
1423 if (count && netif_running(netdev)) {
1424 tx_ring->sw_consumer = sw_consumer;
1425
1426 smp_mb();
1427
1428 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) {
1429 __netif_tx_lock(tx_ring->txq, smp_processor_id());
1430 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH) {
1431 netif_wake_queue(netdev);
1432 adapter->tx_timeo_cnt = 0;
1433 }
1434 __netif_tx_unlock(tx_ring->txq);
1435 }
1436 }
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1451 done = (sw_consumer == hw_consumer);
1452 spin_unlock(&adapter->tx_clean_lock);
1453
1454 return (done);
1455}
1456
1457void
1458netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1459 struct nx_host_rds_ring *rds_ring)
1460{
1461 struct rcv_desc *pdesc;
1462 struct netxen_rx_buffer *buffer;
1463 int producer, count = 0;
1464 netxen_ctx_msg msg = 0;
1465 struct list_head *head;
1466
1467 producer = rds_ring->producer;
1468
1469 spin_lock(&rds_ring->lock);
1470 head = &rds_ring->free_list;
1471 while (!list_empty(head)) {
1472
1473 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1474
1475 if (!buffer->skb) {
1476 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1477 break;
1478 }
1479
1480 count++;
1481 list_del(&buffer->list);
1482
1483
1484 pdesc = &rds_ring->desc_head[producer];
1485 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1486 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1487 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1488
1489 producer = get_next_index(producer, rds_ring->num_desc);
1490 }
1491 spin_unlock(&rds_ring->lock);
1492
1493 if (count) {
1494 rds_ring->producer = producer;
1495 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1496 (producer-1) & (rds_ring->num_desc-1));
1497
1498 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1499
1500
1501
1502
1503
1504 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1505 netxen_set_msg_privid(msg);
1506 netxen_set_msg_count(msg,
1507 ((producer - 1) &
1508 (rds_ring->num_desc - 1)));
1509 netxen_set_msg_ctxid(msg, adapter->portnum);
1510 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1511 read_lock(&adapter->adapter_lock);
1512 writel(msg, DB_NORMALIZE(adapter,
1513 NETXEN_RCV_PRODUCER_OFFSET));
1514 read_unlock(&adapter->adapter_lock);
1515 }
1516 }
1517}
1518
1519static void
1520netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1521 struct nx_host_rds_ring *rds_ring)
1522{
1523 struct rcv_desc *pdesc;
1524 struct netxen_rx_buffer *buffer;
1525 int producer, count = 0;
1526 struct list_head *head;
1527
1528 producer = rds_ring->producer;
1529 if (!spin_trylock(&rds_ring->lock))
1530 return;
1531
1532 head = &rds_ring->free_list;
1533 while (!list_empty(head)) {
1534
1535 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1536
1537 if (!buffer->skb) {
1538 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1539 break;
1540 }
1541
1542 count++;
1543 list_del(&buffer->list);
1544
1545
1546 pdesc = &rds_ring->desc_head[producer];
1547 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1548 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1549 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1550
1551 producer = get_next_index(producer, rds_ring->num_desc);
1552 }
1553
1554 if (count) {
1555 rds_ring->producer = producer;
1556 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1557 (producer - 1) & (rds_ring->num_desc - 1));
1558 }
1559 spin_unlock(&rds_ring->lock);
1560}
1561
1562void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1563{
1564 memset(&adapter->stats, 0, sizeof(adapter->stats));
1565 return;
1566}
1567
1568
