1/* 2 * lanstreamer.h -- driver for the IBM Auto LANStreamer PCI Adapter 3 * 4 * Written By: Mike Sullivan, IBM Corporation 5 * 6 * Copyright (C) 1999 IBM Corporation 7 * 8 * Linux driver for IBM PCI tokenring cards based on the LanStreamer MPC 9 * chipset. 10 * 11 * This driver is based on the olympic driver for IBM PCI TokenRing cards (Pit/Pit-Phy/Olympic 12 * chipsets) written by: 13 * 1999 Peter De Schrijver All Rights Reserved 14 * 1999 Mike Phillips (phillim@amtrak.com) 15 * 16 * Base Driver Skeleton: 17 * Written 1993-94 by Donald Becker. 18 * 19 * Copyright 1993 United States Government as represented by the 20 * Director, National Security Agency. 21 * 22 * This program is free software; you can redistribute it and/or modify 23 * it under the terms of the GNU General Public License as published by 24 * the Free Software Foundation; either version 2 of the License, or 25 * (at your option) any later version. 26 * 27 * This program is distributed in the hope that it will be useful, 28 * but WITHOUT ANY WARRANTY; without even the implied warranty of 29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 30 * GNU General Public License for more details. 31 * 32 * NO WARRANTY 33 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 34 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 35 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 36 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 37 * solely responsible for determining the appropriateness of using and 38 * distributing the Program and assumes all risks associated with its 39 * exercise of rights under this Agreement, including but not limited to 40 * the risks and costs of program errors, damage to or loss of data, 41 * programs or equipment, and unavailability or interruption of operations. 42 * 43 * DISCLAIMER OF LIABILITY 44 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 45 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 46 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 47 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 48 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 49 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 50 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 51 * 52 * You should have received a copy of the GNU General Public License 53 * along with this program; if not, write to the Free Software 54 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 55 * 56 * 57 * 12/10/99 - Alpha Release 0.1.0 58 * First release to the public 59 * 08/15/01 - Added ioctl() definitions and others - Kent Yoder <yoder1@us.ibm.com> 60 * 61 */ 62 63/* MAX_INTR - the maximum number of times we can loop 64 * inside the interrupt function before returning 65 * control to the OS (maximum value is 256) 66 */ 67#define MAX_INTR 5 68 69#define CLS 0x0C 70#define MLR 0x86 71#define LTR 0x0D 72 73#define BCTL 0x60 74#define BCTL_SOFTRESET (1<<15) 75#define BCTL_RX_FIFO_8 (1<<1) 76#define BCTL_TX_FIFO_8 (1<<3) 77 78#define GPR 0x4a 79#define GPR_AUTOSENSE (1<<2) 80#define GPR_16MBPS (1<<3) 81 82#define LISR 0x10 83#define LISR_SUM 0x12 84#define LISR_RUM 0x14 85 86#define LISR_LIE (1<<15) 87#define LISR_SLIM (1<<13) 88#define LISR_SLI (1<<12) 89#define LISR_BPEI (1<<9) 90#define LISR_BPE (1<<8) 91#define LISR_SRB_CMD (1<<5) 92#define LISR_ASB_REPLY (1<<4) 93#define LISR_ASB_FREE_REQ (1<<2) 94#define LISR_ARB_FREE (1<<1) 95#define LISR_TRB_FRAME (1<<0) 96 97#define SISR 0x16 98#define SISR_SUM 0x18 99#define SISR_RUM 0x1A 100#define SISR_MASK 0x54 101#define SISR_MASK_SUM 0x56 102#define SISR_MASK_RUM 0x58 103 104#define SISR_MI (1<<15) 105#define SISR_SERR_ERR (1<<14) 106#define SISR_TIMER (1<<11) 107#define SISR_LAP_PAR_ERR (1<<10) 108#define SISR_LAP_ACC_ERR (1<<9) 109#define SISR_PAR_ERR (1<<8) 110#define SISR_ADAPTER_CHECK (1<<6) 111#define SISR_SRB_REPLY (1<<5) 112#define SISR_ASB_FREE (1<<4) 113#define SISR_ARB_CMD (1<<3) 114#define SISR_TRB_REPLY (1<<2) 115 116#define MISR_RUM 0x5A 117#define MISR_MASK 0x5C 118#define MISR_MASK_RUM 0x5E 119 120#define MISR_TX2_IDLE (1<<15) 121#define MISR_TX2_NO_STATUS (1<<14) 122#define MISR_TX2_HALT (1<<13) 123#define MISR_TX2_EOF (1<<12) 124#define MISR_TX1_IDLE (1<<11) 125#define MISR_TX1_NO_STATUS (1<<10) 126#define MISR_TX1_HALT (1<<9) 127#define MISR_TX1_EOF (1<<8) 128#define MISR_RX_NOBUF (1<<5) 129#define MISR_RX_EOB (1<<4) 130#define MISR_RX_NO_STATUS (1<<2) 131#define MISR_RX_HALT (1<<1) 132#define MISR_RX_EOF (1<<0) 133 134#define LAPA 0x62 135#define LAPE 0x64 136#define LAPD 0x66 137#define LAPDINC 0x68 138#define LAPWWO 0x6A 139#define LAPWWC 0x6C 140#define LAPCTL 0x6E 141 142#define TIMER 0x4E4 143 144#define BMCTL_SUM 0x50 145#define BMCTL_RUM 0x52 146#define BMCTL_TX1_DIS (1<<14) 147#define BMCTL_TX2_DIS (1<<10) 148#define BMCTL_RX_DIS (1<<6) 149#define BMCTL_RX_ENABLED (1<<5) 150 151#define RXLBDA 0x90 152#define RXBDA 0x94 153#define RXSTAT 0x98 154#define RXDBA 0x9C 155 156#define TX1LFDA 0xA0 157#define TX1FDA 0xA4 158#define TX1STAT 0xA8 159#define TX1DBA 0xAC 160#define TX2LFDA 0xB0 161#define TX2FDA 0xB4 162#define TX2STAT 0xB8 163#define TX2DBA 0xBC 164 165#define STREAMER_IO_SPACE 256 166 167#define SRB_COMMAND_SIZE 50 168 169#define STREAMER_MAX_ADAPTERS 8 /* 0x08 __MODULE_STRING can't hand 0xnn */ 170 171/* Defines for LAN STATUS CHANGE reports */ 172#define LSC_SIG_LOSS 0x8000 173#define LSC_HARD_ERR 0x4000 174#define LSC_SOFT_ERR 0x2000 175#define LSC_TRAN_BCN 0x1000 176#define LSC_LWF 0x0800 177#define LSC_ARW 0x0400 178#define LSC_FPE 0x0200 179#define LSC_RR 0x0100 180#define LSC_CO 0x0080 181#define LSC_SS 0x0040 182#define LSC_RING_REC 0x0020 183#define LSC_SR_CO 0x0010 184#define LSC_FDX_MODE 0x0004 185 186/* Defines for OPEN ADAPTER command */ 187 188#define OPEN_ADAPTER_EXT_WRAP (1<<15) 189#define OPEN_ADAPTER_DIS_HARDEE (1<<14) 190#define OPEN_ADAPTER_DIS_SOFTERR (1<<13) 191#define OPEN_ADAPTER_PASS_ADC_MAC (1<<12) 192#define OPEN_ADAPTER_PASS_ATT_MAC (1<<11) 193#define OPEN_ADAPTER_ENABLE_EC (1<<10) 194#define OPEN_ADAPTER_CONTENDER (1<<8) 195#define OPEN_ADAPTER_PASS_BEACON (1<<7) 196#define OPEN_ADAPTER_ENABLE_FDX (1<<6) 197#define OPEN_ADAPTER_ENABLE_RPL (1<<5) 198#define OPEN_ADAPTER_INHIBIT_ETR (1<<4) 199#define OPEN_ADAPTER_INTERNAL_WRAP (1<<3) 200 201 202/* Defines for SRB Commands */ 203#define SRB_CLOSE_ADAPTER 0x04 204#define SRB_CONFIGURE_BRIDGE 0x0c 205#define SRB_CONFIGURE_HP_CHANNEL 0x13 206#define SRB_MODIFY_BRIDGE_PARMS 0x15 207#define SRB_MODIFY_OPEN_OPTIONS 0x01 208#define SRB_MODIFY_RECEIVE_OPTIONS 0x17 209#define SRB_NO_OPERATION 0x00 210#define SRB_OPEN_ADAPTER 0x03 211#define SRB_READ_LOG 0x08 212#define SRB_READ_SR_COUNTERS 0x16 213#define SRB_RESET_GROUP_ADDRESS 0x02 214#define SRB_RESET_TARGET_SEGMETN 0x14 215#define SRB_SAVE_CONFIGURATION 0x1b 216#define SRB_SET_BRIDGE_PARMS 0x09 217#define SRB_SET_FUNC_ADDRESS 0x07 218#define SRB_SET_GROUP_ADDRESS 0x06 219#define SRB_SET_TARGET_SEGMENT 0x05 220 221/* Clear return code */ 222#define STREAMER_CLEAR_RET_CODE 0xfe 223 224/* ARB Commands */ 225#define ARB_RECEIVE_DATA 0x81 226#define ARB_LAN_CHANGE_STATUS 0x84 227 228/* ASB Response commands */ 229#define ASB_RECEIVE_DATA 0x81 230 231 232/* Streamer defaults for buffers */ 233 234#define STREAMER_RX_RING_SIZE 16 /* should be a power of 2 */ 235/* Setting the number of TX descriptors to 1 is a workaround for an 236 * undocumented hardware problem with the lanstreamer board. Setting 237 * this to something higher may slightly increase the throughput you 238 * can get from the card, but at the risk of locking up the box. - 239 * <yoder1@us.ibm.com> 240 */ 241#define STREAMER_TX_RING_SIZE 1 /* should be a power of 2 */ 242 243#define PKT_BUF_SZ 4096 /* Default packet size */ 244 245/* Streamer data structures */ 246 247struct streamer_tx_desc { 248 __u32 forward; 249 __u32 status; 250 __u32 bufcnt_framelen; 251 __u32 buffer; 252 __u32 buflen; 253 __u32 rsvd1; 254 __u32 rsvd2; 255 __u32 rsvd3; 256}; 257 258struct streamer_rx_desc { 259 __u32 forward; 260 __u32 status; 261 __u32 buffer; 262 __u32 framelen_buflen; 263}; 264 265struct mac_receive_buffer { 266 __u16 next; 267 __u8 padding; 268 __u8 frame_status; 269 __u16 buffer_length; 270 __u8 frame_data; 271}; 272 273struct streamer_private { 274 275 __u16 srb; 276 __u16 trb; 277 __u16 arb; 278 __u16 asb; 279 280 struct streamer_private *next; 281 struct pci_dev *pci_dev; 282 __u8 __iomem *streamer_mmio; 283 char *streamer_card_name; 284 285 spinlock_t streamer_lock; 286 287 volatile int srb_queued; /* True if an SRB is still posted */ 288 wait_queue_head_t srb_wait; 289 290 volatile int asb_queued; /* True if an ASB is posted */ 291 292 volatile int trb_queued; /* True if a TRB is posted */ 293 wait_queue_head_t trb_wait; 294 295 struct streamer_rx_desc *streamer_rx_ring; 296 struct streamer_tx_desc *streamer_tx_ring; 297 struct sk_buff *tx_ring_skb[STREAMER_TX_RING_SIZE], 298 *rx_ring_skb[STREAMER_RX_RING_SIZE]; 299 int tx_ring_free, tx_ring_last_status, rx_ring_last_received, 300 free_tx_ring_entries; 301 302 __u16 streamer_lan_status; 303 __u8 streamer_ring_speed; 304 __u16 pkt_buf_sz; 305 __u8 streamer_receive_options, streamer_copy_all_options, 306 streamer_message_level; 307 __u16 streamer_addr_table_addr, streamer_parms_addr; 308 __u16 mac_rx_buffer; 309 __u8 streamer_laa[6]; 310}; 311 312struct streamer_adapter_addr_table { 313 314 __u8 node_addr[6]; 315 __u8 reserved[4]; 316 __u8 func_addr[4]; 317}; 318 319struct streamer_parameters_table { 320 321 __u8 phys_addr[4]; 322 __u8 up_node_addr[6]; 323 __u8 up_phys_addr[4]; 324 __u8 poll_addr[6]; 325 __u16 reserved; 326 __u16 acc_priority; 327 __u16 auth_source_class; 328 __u16 att_code; 329 __u8 source_addr[6]; 330 __u16 beacon_type; 331 __u16 major_vector; 332 __u16 lan_status; 333 __u16 soft_error_time; 334 __u16 reserved1; 335 __u16 local_ring; 336 __u16 mon_error; 337 __u16 beacon_transmit; 338 __u16 beacon_receive; 339 __u16 frame_correl; 340 __u8 beacon_naun[6]; 341 __u32 reserved2; 342 __u8 beacon_phys[4]; 343}; 344