1/* 2 * tms380tr.h: TI TMS380 Token Ring driver for Linux 3 * 4 * Authors: 5 * - Christoph Goos <cgoos@syskonnect.de> 6 * - Adam Fritzler 7 */ 8 9#ifndef __LINUX_TMS380TR_H 10#define __LINUX_TMS380TR_H 11 12#ifdef __KERNEL__ 13 14#include <linux/interrupt.h> 15 16/* module prototypes */ 17extern const struct net_device_ops tms380tr_netdev_ops; 18int tms380tr_open(struct net_device *dev); 19int tms380tr_close(struct net_device *dev); 20irqreturn_t tms380tr_interrupt(int irq, void *dev_id); 21int tmsdev_init(struct net_device *dev, struct device *pdev); 22void tmsdev_term(struct net_device *dev); 23void tms380tr_wait(unsigned long time); 24 25#define TMS380TR_MAX_ADAPTERS 7 26 27#define SEND_TIMEOUT 10*HZ 28 29#define TR_RCF_LONGEST_FRAME_MASK 0x0070 30#define TR_RCF_FRAME4K 0x0030 31 32/*------------------------------------------------------------------*/ 33/* Bit order for adapter communication with DMA */ 34/* -------------------------------------------------------------- */ 35/* Bit 8 | 9| 10| 11|| 12| 13| 14| 15|| 0| 1| 2| 3|| 4| 5| 6| 7| */ 36/* -------------------------------------------------------------- */ 37/* The bytes in a word must be byte swapped. Also, if a double */ 38/* word is used for storage, then the words, as well as the bytes, */ 39/* must be swapped. */ 40/* Bit order for adapter communication with DIO */ 41/* -------------------------------------------------------------- */ 42/* Bit 0 | 1| 2| 3|| 4| 5| 6| 7|| 8| 9| 10| 11|| 12| 13| 14| 15| */ 43/* -------------------------------------------------------------- */ 44/*------------------------------------------------------------------*/ 45 46/* Swap words of a long. */ 47#define SWAPW(x) (((x) << 16) | ((x) >> 16)) 48 49/* Get the low byte of a word. */ 50#define LOBYTE(w) ((unsigned char)(w)) 51 52/* Get the high byte of a word. */ 53#define HIBYTE(w) ((unsigned char)((unsigned short)(w) >> 8)) 54 55/* Get the low word of a long. */ 56#define LOWORD(l) ((unsigned short)(l)) 57 58/* Get the high word of a long. */ 59#define HIWORD(l) ((unsigned short)((unsigned long)(l) >> 16)) 60 61 62 63/* Token ring adapter I/O addresses for normal mode. */ 64 65/* 66 * The SIF registers. Common to all adapters. 67 */ 68/* Basic SIF (SRSX = 0) */ 69#define SIFDAT 0x00 /* SIF/DMA data. */ 70#define SIFINC 0x02 /* IO Word data with auto increment. */ 71#define SIFINH 0x03 /* IO Byte data with auto increment. */ 72#define SIFADR 0x04 /* SIF/DMA Address. */ 73#define SIFCMD 0x06 /* SIF Command. */ 74#define SIFSTS 0x06 /* SIF Status. */ 75 76/* "Extended" SIF (SRSX = 1) */ 77#define SIFACL 0x08 /* SIF Adapter Control Register. */ 78#define SIFADD 0x0a /* SIF/DMA Address. -- 0x0a */ 79#define SIFADX 0x0c /* 0x0c */ 80#define DMALEN 0x0e /* SIF DMA length. -- 0x0e */ 81 82/* 83 * POS Registers. Only for ISA Adapters. 84 */ 85#define POSREG 0x10 /* Adapter Program Option Select (POS) 86 * Register: base IO address + 16 byte. 87 */ 88#define POSREG_2 24L /* only for TR4/16+ adapter 89 * base IO address + 24 byte. -- 0x18 90 */ 91 92/* SIFCMD command codes (high-low) */ 93#define CMD_INTERRUPT_ADAPTER 0x8000 /* Cause internal adapter interrupt */ 94#define CMD_ADAPTER_RESET 0x4000 /* Hardware reset of adapter */ 95#define CMD_SSB_CLEAR 0x2000 /* Acknowledge to adapter to 96 * system interrupts. 97 */ 98#define CMD_EXECUTE 0x1000 /* Execute SCB command */ 99#define CMD_SCB_REQUEST 0x0800 /* Request adapter to interrupt 100 * system when SCB is available for 101 * another command. 102 */ 103#define CMD_RX_CONTINUE 0x0400 /* Continue receive after odd pointer 104 * stop. (odd pointer receive method) 105 */ 106#define CMD_RX_VALID 0x0200 /* Now actual RPL is valid. */ 107#define CMD_TX_VALID 0x0100 /* Now actual TPL is valid. (valid 108 * bit receive/transmit method) 109 */ 110#define CMD_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system 111 * interrupt is reset. 112 */ 113#define CMD_CLEAR_SYSTEM_IRQ 0x0080 /* Clear SYSTEM_INTERRUPT bit. 114 * (write: 1=ignore, 0=reset) 115 */ 116#define EXEC_SOFT_RESET 0xFF00 /* adapter soft reset. (restart 117 * adapter after hardware reset) 118 */ 119 120 121/* ACL commands (high-low) */ 122#define ACL_SWHLDA 0x0800 /* Software hold acknowledge. */ 123#define ACL_SWDDIR 0x0400 /* Data transfer direction. */ 124#define ACL_SWHRQ 0x0200 /* Pseudo DMA operation. */ 125#define ACL_PSDMAEN 0x0100 /* Enable pseudo system DMA. */ 126#define ACL_ARESET 0x0080 /* Adapter hardware reset command. 127 * (held in reset condition as 128 * long as bit is set) 129 */ 130#define ACL_CPHALT 0x0040 /* Communication processor halt. 131 * (can only be set while ACL_ARESET 132 * bit is set; prevents adapter 133 * processor from executing code while 134 * downloading firmware) 135 */ 136#define ACL_BOOT 0x0020 137#define ACL_SINTEN 0x0008 /* System interrupt enable/disable 138 * (1/0): can be written if ACL_ARESET 139 * is zero. 140 */ 141#define ACL_PEN 0x0004 142 143#define ACL_NSELOUT0 0x0002 144#define ACL_NSELOUT1 0x0001 /* NSELOUTx have a card-specific 145 * meaning for setting ring speed. 146 */ 147 148#define PS_DMA_MASK (ACL_SWHRQ | ACL_PSDMAEN) 149 150 151/* SIFSTS register return codes (high-low) */ 152#define STS_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system 153 * interrupt is valid. 154 */ 155#define STS_INITIALIZE 0x0040 /* INITIALIZE status. (ready to 156 * initialize) 157 */ 158#define STS_TEST 0x0020 /* TEST status. (BUD not completed) */ 159#define STS_ERROR 0x0010 /* ERROR status. (unrecoverable 160 * HW error occurred) 161 */ 162#define STS_MASK 0x00F0 /* Mask interesting status bits. */ 163#define STS_ERROR_MASK 0x000F /* Get Error Code by masking the 164 * interrupt code bits. 165 */ 166#define ADAPTER_INT_PTRS 0x0A00 /* Address offset of adapter internal 167 * pointers 01:0a00 (high-low) have to 168 * be read after init and before open. 169 */ 170 171 172/* Interrupt Codes (only MAC IRQs) */ 173#define STS_IRQ_ADAPTER_CHECK 0x0000 /* unrecoverable hardware or 174 * software error. 175 */ 176#define STS_IRQ_RING_STATUS 0x0004 /* SSB is updated with ring status. */ 177#define STS_IRQ_LLC_STATUS 0x0005 /* Not used in MAC-only microcode */ 178#define STS_IRQ_SCB_CLEAR 0x0006 /* SCB clear, following an 179 * SCB_REQUEST IRQ. 180 */ 181#define STS_IRQ_TIMER 0x0007 /* Not normally used in MAC ucode */ 182#define STS_IRQ_COMMAND_STATUS 0x0008 /* SSB is updated with command 183 * status. 184 */ 185#define STS_IRQ_RECEIVE_STATUS 0x000A /* SSB is updated with receive 186 * status. 187 */ 188#define STS_IRQ_TRANSMIT_STATUS 0x000C /* SSB is updated with transmit 189 * status 190 */ 191#define STS_IRQ_RECEIVE_PENDING 0x000E /* Not used in MAC-only microcode */ 192#define STS_IRQ_MASK 0x000F /* = STS_ERROR_MASK. */ 193 194 195/* TRANSMIT_STATUS completion code: (SSB.Parm[0]) */ 196#define COMMAND_COMPLETE 0x0080 /* TRANSMIT command completed 197 * (avoid this!) issue another transmit 198 * to send additional frames. 199 */ 200#define FRAME_COMPLETE 0x0040 /* Frame has been transmitted; 201 * INTERRUPT_FRAME bit was set in the 202 * CSTAT request; indication of possibly 203 * more than one frame transmissions! 204 * SSB.Parm[0-1]: 32 bit pointer to 205 * TPL of last frame. 206 */ 207#define LIST_ERROR 0x0020 /* Error in one of the TPLs that 208 * compose the frame; TRANSMIT 209 * terminated; Parm[1-2]: 32bit pointer 210 * to TPL which starts the error 211 * frame; error details in bits 8-13. 212 * (14?) 213 */ 214#define FRAME_SIZE_ERROR 0x8000 /* FRAME_SIZE does not equal the sum of 215 * the valid DATA_COUNT fields; 216 * FRAME_SIZE less than header plus 217 * information field. (15 bytes + 218 * routing field) Or if FRAME_SIZE 219 * was specified as zero in one list. 220 */ 221#define TX_THRESHOLD 0x4000 /* FRAME_SIZE greater than (BUFFER_SIZE 222 * - 9) * TX_BUF_MAX. 223 */ 224#define ODD_ADDRESS 0x2000 /* Odd forward pointer value is 225 * read on a list without END_FRAME 226 * indication. 227 */ 228#define FRAME_ERROR 0x1000 /* START_FRAME bit (not) anticipated, 229 * but (not) set. 230 */ 231#define ACCESS_PRIORITY_ERROR 0x0800 /* Access priority requested has not 232 * been allowed. 233 */ 234#define UNENABLED_MAC_FRAME 0x0400 /* MAC frame has source class of zero 235 * or MAC frame PCF ATTN field is 236 * greater than one. 237 */ 238#define ILLEGAL_FRAME_FORMAT 0x0200 /* Bit 0 or FC field was set to one. */ 239 240 241/* 242 * Since we need to support some functions even if the adapter is in a 243 * CLOSED state, we have a (pseudo-) command queue which holds commands 244 * that are outstandig to be executed. 245 * 246 * Each time a command completes, an interrupt occurs and the next 247 * command is executed. The command queue is actually a simple word with 248 * a bit for each outstandig command. Therefore the commands will not be 249 * executed in the order they have been queued. 250 * 251 * The following defines the command code bits and the command queue: 252 */ 253#define OC_OPEN 0x0001 /* OPEN command */ 254#define OC_TRANSMIT 0x0002 /* TRANSMIT command */ 255#define OC_TRANSMIT_HALT 0x0004 /* TRANSMIT_HALT command */ 256#define OC_RECEIVE 0x0008 /* RECEIVE command */ 257#define OC_CLOSE 0x0010 /* CLOSE command */ 258#define OC_SET_GROUP_ADDR 0x0020 /* SET_GROUP_ADDR command */ 259#define OC_SET_FUNCT_ADDR 0x0040 /* SET_FUNCT_ADDR command */ 260#define OC_READ_ERROR_LOG 0x0080 /* READ_ERROR_LOG command */ 261#define OC_READ_ADAPTER 0x0100 /* READ_ADAPTER command */ 262#define OC_MODIFY_OPEN_PARMS 0x0400 /* MODIFY_OPEN_PARMS command */ 263#define OC_RESTORE_OPEN_PARMS 0x0800 /* RESTORE_OPEN_PARMS command */ 264#define OC_SET_FIRST_16_GROUP 0x1000 /* SET_FIRST_16_GROUP command */ 265#define OC_SET_BRIDGE_PARMS 0x2000 /* SET_BRIDGE_PARMS command */ 266#define OC_CONFIG_BRIDGE_PARMS 0x4000 /* CONFIG_BRIDGE_PARMS command */ 267 268#define OPEN 0x0300 /* C: open command. S: completion. */ 269#define TRANSMIT 0x0400 /* C: transmit command. S: completion 270 * status. (reject: COMMAND_REJECT if 271 * adapter not opened, TRANSMIT already 272 * issued or address passed in the SCB 273 * not word aligned) 274 */ 275#define TRANSMIT_HALT 0x0500 /* C: interrupt TX TPL chain; if no 276 * TRANSMIT command issued, the command 277 * is ignored (completion with TRANSMIT 278 * status (0x0400)!) 279 */ 280#define RECEIVE 0x0600 /* C: receive command. S: completion 281 * status. (reject: COMMAND_REJECT if 282 * adapter not opened, RECEIVE already 283 * issued or address passed in the SCB 284 * not word aligned) 285 */ 286#define CLOSE 0x0700 /* C: close adapter. S: completion. 287 * (COMMAND_REJECT if adapter not open) 288 */ 289#define SET_GROUP_ADDR 0x0800 /* C: alter adapter group address after 290 * OPEN. S: completion. (COMMAND_REJECT 291 * if adapter not open) 292 */ 293#define SET_FUNCT_ADDR 0x0900 /* C: alter adapter functional address 294 * after OPEN. S: completion. 295 * (COMMAND_REJECT if adapter not open) 296 */ 297#define READ_ERROR_LOG 0x0A00 /* C: read adapter error counters. 298 * S: completion. (command ignored 299 * if adapter not open!) 300 */ 301#define READ_ADAPTER 0x0B00 /* C: read data from adapter memory. 302 * (important: after init and before 303 * open!) S: completion. (ADAPTER_CHECK 304 * interrupt if undefined storage area 305 * read) 306 */ 307#define MODIFY_OPEN_PARMS 0x0D00 /* C: modify some adapter operational 308 * parameters. (bit correspondend to 309 * WRAP_INTERFACE is ignored) 310 * S: completion. (reject: 311 * COMMAND_REJECT) 312 */ 313#define RESTORE_OPEN_PARMS 0x0E00 /* C: modify some adapter operational 314 * parameters. (bit correspondend 315 * to WRAP_INTERFACE is ignored) 316 * S: completion. (reject: 317 * COMMAND_REJECT) 318 */ 319#define SET_FIRST_16_GROUP 0x0F00 /* C: alter the first two bytes in 320 * adapter group address. 321 * S: completion. (reject: 322 * COMMAND_REJECT) 323 */ 324#define SET_BRIDGE_PARMS 0x1000 /* C: values and conditions for the 325 * adapter hardware to use when frames 326 * are copied for forwarding. 327 * S: completion. (reject: 328 * COMMAND_REJECT) 329 */ 330#define CONFIG_BRIDGE_PARMS 0x1100 /* C: .. 331 * S: completion. (reject: 332 * COMMAND_REJECT) 333 */ 334 335#define SPEED_4 4 336#define SPEED_16 16 /* Default transmission speed */ 337 338 339/* Initialization Parameter Block (IPB); word alignment necessary! */ 340#define BURST_SIZE 0x0018 /* Default burst size */ 341#define BURST_MODE 0x9F00 /* Burst mode enable */ 342#define DMA_RETRIES 0x0505 /* Magic DMA retry number... */ 343 344#define CYCLE_TIME 3 /* Default AT-bus cycle time: 500 ns 345 * (later adapter version: fix cycle time!) 346 */ 347#define LINE_SPEED_BIT 0x80 348 349/* Macro definition for the wait function. */ 350#define ONE_SECOND_TICKS 1000000 351#define HALF_SECOND (ONE_SECOND_TICKS / 2) 352#define ONE_SECOND (ONE_SECOND_TICKS) 353#define TWO_SECONDS (ONE_SECOND_TICKS * 2) 354#define THREE_SECONDS (ONE_SECOND_TICKS * 3) 355#define FOUR_SECONDS (ONE_SECOND_TICKS * 4) 356#define FIVE_SECONDS (ONE_SECOND_TICKS * 5) 357 358#define BUFFER_SIZE 2048 /* Buffers on Adapter */ 359 360#pragma pack(1) 361typedef struct { 362 unsigned short Init_Options; /* Initialize with burst mode; 363 * LLC disabled. (MAC only) 364 */ 365 366 /* Interrupt vectors the adapter places on attached system bus. */ 367 u_int8_t CMD_Status_IV; /* Interrupt vector: command status. */ 368 u_int8_t TX_IV; /* Interrupt vector: transmit. */ 369 u_int8_t RX_IV; /* Interrupt vector: receive. */ 370 u_int8_t Ring_Status_IV; /* Interrupt vector: ring status. */ 371 u_int8_t SCB_Clear_IV; /* Interrupt vector: SCB clear. */ 372 u_int8_t Adapter_CHK_IV; /* Interrupt vector: adapter check. */ 373 374 u_int16_t RX_Burst_Size; /* Max. number of transfer cycles. */ 375 u_int16_t TX_Burst_Size; /* During DMA burst; even value! */ 376 u_int16_t DMA_Abort_Thrhld; /* Number of DMA retries. */ 377 378 u_int32_t SCB_Addr; /* SCB address: even, word aligned, high-low */ 379 u_int32_t SSB_Addr; /* SSB address: even, word aligned, high-low */ 380} IPB, *IPB_Ptr; 381#pragma pack() 382 383/* 384 * OPEN Command Parameter List (OCPL) (can be reused, if the adapter has to 385 * be reopened) 386 */ 387#define BUFFER_SIZE 2048 /* Buffers on Adapter. */ 388#define TPL_SIZE 8+6*TX_FRAG_NUM /* Depending on fragments per TPL. */ 389#define RPL_SIZE 14 /* (with TI firmware v2.26 handling 390 * up to nine fragments possible) 391 */ 392#define TX_BUF_MIN 20 /* ??? (Stephan: calculation with */ 393#define TX_BUF_MAX 40 /* BUFFER_SIZE and MAX_FRAME_SIZE) ??? 394 */ 395#define DISABLE_EARLY_TOKEN_RELEASE 0x1000 396 397/* OPEN Options (high-low) */ 398#define WRAP_INTERFACE 0x0080 /* Inserting omitted for test 399 * purposes; transmit data appears 400 * as receive data. (useful for 401 * testing; change: CLOSE necessary) 402 */ 403#define DISABLE_HARD_ERROR 0x0040 /* On HARD_ERROR & TRANSMIT_BEACON 404 * no RING.STATUS interrupt. 405 */ 406#define DISABLE_SOFT_ERROR 0x0020 /* On SOFT_ERROR, no RING.STATUS 407 * interrupt. 408 */ 409#define PASS_ADAPTER_MAC_FRAMES 0x0010 /* Passing unsupported MAC frames 410 * to system. 411 */ 412#define PASS_ATTENTION_FRAMES 0x0008 /* All changed attention MAC frames are 413 * passed to the system. 414 */ 415#define PAD_ROUTING_FIELD 0x0004 /* Routing field is padded to 18 416 * bytes. 417 */ 418#define FRAME_HOLD 0x0002 /*Adapter waits for entire frame before 419 * initiating DMA transfer; otherwise: 420 * DMA transfer initiation if internal 421 * buffer filled. 422 */ 423#define CONTENDER 0x0001 /* Adapter participates in the monitor 424 * contention process. 425 */ 426#define PASS_BEACON_MAC_FRAMES 0x8000 /* Adapter passes beacon MAC frames 427 * to the system. 428 */ 429#define EARLY_TOKEN_RELEASE 0x1000 /* Only valid in 16 Mbps operation; 430 * 0 = ETR. (no effect in 4 Mbps 431 * operation) 432 */ 433#define COPY_ALL_MAC_FRAMES 0x0400 /* All MAC frames are copied to 434 * the system. (after OPEN: duplicate 435 * address test (DAT) MAC frame is 436 * first received frame copied to the 437 * system) 438 */ 439#define COPY_ALL_NON_MAC_FRAMES 0x0200 /* All non MAC frames are copied to 440 * the system. 441 */ 442#define PASS_FIRST_BUF_ONLY 0x0100 /* Passes only first internal buffer 443 * of each received frame; FrameSize 444 * of RPLs must contain internal 445 * BUFFER_SIZE bits for promiscous mode. 446 */ 447#define ENABLE_FULL_DUPLEX_SELECTION 0x2000 448 /* Enable the use of full-duplex 449 * settings with bits in byte 22 in 450 * ocpl. (new feature in firmware 451 * version 3.09) 452 */ 453 454/* Full-duplex settings */ 455#define OPEN_FULL_DUPLEX_OFF 0x0000 456#define OPEN_FULL_DUPLEX_ON 0x00c0 457#define OPEN_FULL_DUPLEX_AUTO 0x0080 458 459#define PROD_ID_SIZE 18 /* Length of product ID. */ 460 461#define TX_FRAG_NUM 3 /* Number of fragments used in one TPL. */ 462#define TX_MORE_FRAGMENTS 0x8000 /* Bit set in DataCount to indicate more 463 * fragments following. 464 */ 465 466/* XXX is there some better way to do this? */ 467#define ISA_MAX_ADDRESS 0x00ffffff 468#define PCI_MAX_ADDRESS 0xffffffff 469 470#pragma pack(1) 471typedef struct { 472 u_int16_t OPENOptions; 473 u_int8_t NodeAddr[6]; /* Adapter node address; use ROM 474 * address 475 */ 476 u_int32_t GroupAddr; /* Multicast: high order 477 * bytes = 0xC000 478 */ 479 u_int32_t FunctAddr; /* High order bytes = 0xC000 */ 480 __be16 RxListSize; /* RPL size: 0 (=26), 14, 20 or 481 * 26 bytes read by the adapter. 482 * (Depending on the number of 483 * fragments/list) 484 */ 485 __be16 TxListSize; /* TPL size */ 486 __be16 BufSize; /* Is automatically rounded up to the 487 * nearest nK boundary. 488 */ 489 u_int16_t FullDuplex; 490 u_int16_t Reserved; 491 u_int8_t TXBufMin; /* Number of adapter buffers reserved 492 * for transmission a minimum of 2 493 * buffers must be allocated. 494 */ 495 u_int8_t TXBufMax; /* Maximum number of adapter buffers 496 * for transmit; a minimum of 2 buffers 497 * must be available for receive. 498 * Default: 6 499 */ 500 u_int16_t ProdIDAddr[2];/* Pointer to product ID. */ 501} OPB, *OPB_Ptr; 502#pragma pack() 503 504/* 505 * SCB: adapter commands enabled by the host system started by writing 506 * CMD_INTERRUPT_ADAPTER | CMD_EXECUTE (|SCB_REQUEST) to the SIFCMD IO 507 * register. (special case: | CMD_SYSTEM_IRQ for initialization) 508 */ 509#pragma pack(1) 510typedef struct { 511 u_int16_t CMD; /* Command code */ 512 u_int16_t Parm[2]; /* Pointer to Command Parameter Block */ 513} SCB; /* System Command Block (32 bit physical address; big endian)*/ 514#pragma pack() 515 516/* 517 * SSB: adapter command return status can be evaluated after COMMAND_STATUS 518 * adapter to system interrupt after reading SSB, the availability of the SSB 519 * has to be told the adapter by writing CMD_INTERRUPT_ADAPTER | CMD_SSB_CLEAR 520 * in the SIFCMD IO register. 521 */ 522#pragma pack(1) 523typedef struct { 524 u_int16_t STS; /* Status code */ 525 u_int16_t Parm[3]; /* Parameter or pointer to Status Parameter 526 * Block. 527 */ 528} SSB; /* System Status Block (big endian - physical address) */ 529#pragma pack() 530 531typedef struct { 532 unsigned short BurnedInAddrPtr; /* Pointer to adapter burned in 533 * address. (BIA) 534 */ 535 unsigned short SoftwareLevelPtr;/* Pointer to software level data. */ 536 unsigned short AdapterAddrPtr; /* Pointer to adapter addresses. */ 537 unsigned short AdapterParmsPtr; /* Pointer to adapter parameters. */ 538 unsigned short MACBufferPtr; /* Pointer to MAC buffer. (internal) */ 539 unsigned short LLCCountersPtr; /* Pointer to LLC counters. */ 540 unsigned short SpeedFlagPtr; /* Pointer to data rate flag. 541 * (4/16 Mbps) 542 */ 543 unsigned short AdapterRAMPtr; /* Pointer to adapter RAM found. (KB) */ 544} INTPTRS; /* Adapter internal pointers */ 545 546#pragma pack(1) 547typedef struct { 548 u_int8_t Line_Error; /* Line error: code violation in 549 * frame or in a token, or FCS error. 550 */ 551 u_int8_t Internal_Error; /* IBM specific. (Reserved_1) */ 552 u_int8_t Burst_Error; 553 u_int8_t ARI_FCI_Error; /* ARI/FCI bit zero in AMP or 554 * SMP MAC frame. 555 */ 556 u_int8_t AbortDelimeters; /* IBM specific. (Reserved_2) */ 557 u_int8_t Reserved_3; 558 u_int8_t Lost_Frame_Error; /* Receive of end of transmitted 559 * frame failed. 560 */ 561 u_int8_t Rx_Congest_Error; /* Adapter in repeat mode has not 562 * enough buffer space to copy incoming 563 * frame. 564 */ 565 u_int8_t Frame_Copied_Error; /* ARI bit not zero in frame 566 * addressed to adapter. 567 */ 568 u_int8_t Frequency_Error; /* IBM specific. (Reserved_4) */ 569 u_int8_t Token_Error; /* (active only in monitor station) */ 570 u_int8_t Reserved_5; 571 u_int8_t DMA_Bus_Error; /* DMA bus errors not exceeding the 572 * abort thresholds. 573 */ 574 u_int8_t DMA_Parity_Error; /* DMA parity errors not exceeding 575 * the abort thresholds. 576 */ 577} ERRORTAB; /* Adapter error counters */ 578#pragma pack() 579 580 581/*--------------------- Send and Receive definitions -------------------*/ 582#pragma pack(1) 583typedef struct { 584 __be16 DataCount; /* Value 0, even and odd values are 585 * permitted; value is unaltered most 586 * significant bit set: following 587 * fragments last fragment: most 588 * significant bit is not evaluated. 589 * (???) 590 */ 591 __be32 DataAddr; /* Pointer to frame data fragment; 592 * even or odd. 593 */ 594} Fragment; 595#pragma pack() 596 597#define MAX_FRAG_NUMBERS 9 /* Maximal number of fragments possible to use 598 * in one RPL/TPL. (depending on TI firmware 599 * version) 600 */ 601 602/* 603 * AC (1), FC (1), Dst (6), Src (6), RIF (18), Data (4472) = 4504 604 * The packet size can be one of the follows: 548, 1502, 2084, 4504, 8176, 605 * 11439, 17832. Refer to TMS380 Second Generation Token Ring User's Guide 606 * Page 2-27. 607 */ 608#define HEADER_SIZE (1 + 1 + 6 + 6) 609#define SRC_SIZE 18 610#define MIN_DATA_SIZE 516 611#define DEFAULT_DATA_SIZE 4472 612#define MAX_DATA_SIZE 17800 613 614#define DEFAULT_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + DEFAULT_DATA_SIZE) 615#define MIN_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MIN_DATA_SIZE) 616#define MAX_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MAX_DATA_SIZE) 617 618/* 619 * Macros to deal with the frame status field. 620 */ 621#define AC_NOT_RECOGNIZED 0x00 622#define GROUP_BIT 0x80 623#define GET_TRANSMIT_STATUS_HIGH_BYTE(Ts) ((unsigned char)((Ts) >> 8)) 624#define GET_FRAME_STATUS_HIGH_AC(Fs) ((unsigned char)(((Fs) & 0xC0) >> 6)) 625#define GET_FRAME_STATUS_LOW_AC(Fs) ((unsigned char)(((Fs) & 0x0C) >> 2)) 626#define DIRECTED_FRAME(Context) (!((Context)->MData[2] & GROUP_BIT)) 627 628 629/*--------------------- Send Functions ---------------------------------*/ 630/* define TX_CSTAT _REQUEST (R) and _COMPLETE (C) values (high-low) */ 631 632#define TX_VALID 0x0080 /* R: set via TRANSMIT.VALID interrupt. 633 * C: always reset to zero! 634 */ 635#define TX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero. 636 * C: set to one. 637 */ 638#define TX_START_FRAME 0x0020 /* R: start of a frame: 1 639 * C: unchanged. 640 */ 641#define TX_END_FRAME 0x0010 /* R: end of a frame: 1 642 * C: unchanged. 643 */ 644#define TX_FRAME_IRQ 0x0008 /* R: request interrupt generation 645 * after transmission. 646 * C: unchanged. 647 */ 648#define TX_ERROR 0x0004 /* R: reserved. 649 * C: set to one if Error occurred. 650 */ 651#define TX_INTERFRAME_WAIT 0x0004 652#define TX_PASS_CRC 0x0002 /* R: set if CRC value is already 653 * calculated. (valid only in 654 * FRAME_START TPL) 655 * C: unchanged. 656 */ 657#define TX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame 658 * source address and does not overwrite 659 * with the adapter node address. 660 * (valid only in FRAME_START TPL) 661 * 662 * C: unchanged. 663 */ 664#define TX_STRIP_FS 0xFF00 /* R: reserved. 665 * C: if no Transmission Error, 666 * field contains copy of FS byte after 667 * stripping of frame. 668 */ 669 670/* 671 * Structure of Transmit Parameter Lists (TPLs) (only one frame every TPL, 672 * but possibly multiple TPLs for one frame) the length of the TPLs has to be 673 * initialized in the OPL. (OPEN parameter list) 674 */ 675#define TPL_NUM 3 /* Number of Transmit Parameter Lists. 676 * !! MUST BE >= 3 !! 677 */ 678 679#pragma pack(1) 680typedef struct s_TPL TPL; 681 682struct s_TPL { /* Transmit Parameter List (align on even word boundaries) */ 683 __be32 NextTPLAddr; /* Pointer to next TPL in chain; if 684 * pointer is odd: this is the last 685 * TPL. Pointing to itself can cause 686 * problems! 687 */ 688 volatile u_int16_t Status; /* Initialized by the adapter: 689 * CSTAT_REQUEST important: update least 690 * significant bit first! Set by the 691 * adapter: CSTAT_COMPLETE status. 692 */ 693 __be16 FrameSize; /* Number of bytes to be transmitted 694 * as a frame including AC/FC, 695 * Destination, Source, Routing field 696 * not including CRC, FS, End Delimiter 697 * (valid only if START_FRAME bit in 698 * CSTAT nonzero) must not be zero in 699 * any list; maximum value: (BUFFER_SIZE 700 * - 8) * TX_BUF_MAX sum of DataCount 701 * values in FragmentList must equal 702 * Frame_Size value in START_FRAME TPL! 703 * frame data fragment list. 704 */ 705 706 /* TPL/RPL size in OPEN parameter list depending on maximal 707 * numbers of fragments used in one parameter list. 708 */ 709 Fragment FragList[TX_FRAG_NUM]; /* Maximum: nine frame fragments in one 710 * TPL actual version of firmware: 9 711 * fragments possible. 712 */ 713#pragma pack() 714 715 /* Special proprietary data and precalculations */ 716 717 TPL *NextTPLPtr; /* Pointer to next TPL in chain. */ 718 unsigned char *MData; 719 struct sk_buff *Skb; 720 unsigned char TPLIndex; 721 volatile unsigned char BusyFlag;/* Flag: TPL busy? */ 722 dma_addr_t DMABuff; /* DMA IO bus address from dma_map */ 723}; 724 725/* ---------------------Receive Functions-------------------------------* 726 * define RECEIVE_CSTAT_REQUEST (R) and RECEIVE_CSTAT_COMPLETE (C) values. 727 * (high-low) 728 */ 729#define RX_VALID 0x0080 /* R: set; tell adapter with 730 * RECEIVE.VALID interrupt. 731 * C: reset to zero. 732 */ 733#define RX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero, 734 * C: set to one. 735 */ 736#define RX_START_FRAME 0x0020 /* R: must be reset to zero. 737 * C: set to one on the list. 738 */ 739#define RX_END_FRAME 0x0010 /* R: must be reset to zero. 740 * C: set to one on the list 741 * that ends the frame. 742 */ 743#define RX_FRAME_IRQ 0x0008 /* R: request interrupt generation 744 * after receive. 745 * C: unchanged. 746 */ 747#define RX_INTERFRAME_WAIT 0x0004 /* R: after receiving a frame: 748 * interrupt and wait for a 749 * RECEIVE.CONTINUE. 750 * C: unchanged. 751 */ 752#define RX_PASS_CRC 0x0002 /* R: if set, the adapter includes 753 * the CRC in data passed. (last four 754 * bytes; valid only if FRAME_START is 755 * set) 756 * C: set, if CRC is included in 757 * received data. 758 */ 759#define RX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame 760 * source address and does not 761 * overwrite with the adapter node 762 * address. (valid only if FRAME_START 763 * is set) 764 * C: unchanged. 765 */ 766#define RX_RECEIVE_FS 0xFC00 /* R: reserved; must be reset to zero. 767 * C: on lists with START_FRAME, field 768 * contains frame status field from 769 * received frame; otherwise cleared. 770 */ 771#define RX_ADDR_MATCH 0x0300 /* R: reserved; must be reset to zero. 772 * C: address match code mask. 773 */ 774#define RX_STATUS_MASK 0x00FF /* Mask for receive status bits. */ 775 776#define RX_INTERN_ADDR_MATCH 0x0100 /* C: internally address match. */ 777#define RX_EXTERN_ADDR_MATCH 0x0200 /* C: externally matched via 778 * XMATCH/XFAIL interface. 779 */ 780#define RX_INTEXT_ADDR_MATCH 0x0300 /* C: internally and externally 781 * matched. 782 */ 783#define RX_READY (RX_VALID | RX_FRAME_IRQ) /* Ready for receive. */ 784 785/* Constants for Command Status Interrupt. 786 * COMMAND_REJECT status field bit functions (SSB.Parm[0]) 787 */ 788#define ILLEGAL_COMMAND 0x0080 /* Set if an unknown command 789 * is issued to the adapter 790 */ 791#define ADDRESS_ERROR 0x0040 /* Set if any address field in 792 * the SCB is odd. (not word aligned) 793 */ 794#define ADAPTER_OPEN 0x0020 /* Command issued illegal with 795 * open adapter. 796 */ 797#define ADAPTER_CLOSE 0x0010 /* Command issued illegal with 798 * closed adapter. 799 */ 800#define SAME_COMMAND 0x0008 /* Command issued with same command 801 * already executing. 802 */ 803 804/* OPEN_COMPLETION values (SSB.Parm[0], MSB) */ 805#define NODE_ADDR_ERROR 0x0040 /* Wrong address or BIA read 806 * zero address. 807 */ 808#define LIST_SIZE_ERROR 0x0020 /* If List_Size value not in 0, 809 * 14, 20, 26. 810 */ 811#define BUF_SIZE_ERROR 0x0010 /* Not enough available memory for 812 * two buffers. 813 */ 814#define TX_BUF_COUNT_ERROR 0x0004 /* Remaining receive buffers less than 815 * two. 816 */ 817#define OPEN_ERROR 0x0002 /* Error during ring insertion; more 818 * information in bits 8-15. 819 */ 820 821/* Standard return codes */ 822#define GOOD_COMPLETION 0x0080 /* =OPEN_SUCCESSFULL */ 823#define INVALID_OPEN_OPTION 0x0001 /* OPEN options are not supported by 824 * the adapter. 825 */ 826 827/* OPEN phases; details of OPEN_ERROR (SSB.Parm[0], LSB) */ 828#define OPEN_PHASES_MASK 0xF000 /* Check only the bits 8-11. */ 829#define LOBE_MEDIA_TEST 0x1000 830#define PHYSICAL_INSERTION 0x2000 831#define ADDRESS_VERIFICATION 0x3000 832#define PARTICIPATION_IN_RING_POLL 0x4000 833#define REQUEST_INITIALISATION 0x5000 834#define FULLDUPLEX_CHECK 0x6000 835 836/* OPEN error codes; details of OPEN_ERROR (SSB.Parm[0], LSB) */ 837#define OPEN_ERROR_CODES_MASK 0x0F00 /* Check only the bits 12-15. */ 838#define OPEN_FUNCTION_FAILURE 0x0100 /* Unable to transmit to itself or 839 * frames received before insertion. 840 */ 841#define OPEN_SIGNAL_LOSS 0x0200 /* Signal loss condition detected at 842 * receiver. 843 */ 844#define OPEN_TIMEOUT 0x0500 /* Insertion timer expired before 845 * logical insertion. 846 */ 847#define OPEN_RING_FAILURE 0x0600 /* Unable to receive own ring purge 848 * MAC frames. 849 */ 850#define OPEN_RING_BEACONING 0x0700 /* Beacon MAC frame received after 851 * ring insertion. 852 */ 853#define OPEN_DUPLICATE_NODEADDR 0x0800 /* Other station in ring found 854 * with the same address. 855 */ 856#define OPEN_REQUEST_INIT 0x0900 /* RPS present but does not respond. */ 857#define OPEN_REMOVE_RECEIVED 0x0A00 /* Adapter received a remove adapter 858 * MAC frame. 859 */ 860#define OPEN_FULLDUPLEX_SET 0x0D00 /* Got this with full duplex on when 861 * trying to connect to a normal ring. 862 */ 863 864/* SET_BRIDGE_PARMS return codes: */ 865#define BRIDGE_INVALID_MAX_LEN 0x4000 /* MAX_ROUTING_FIELD_LENGTH odd, 866 * less than 6 or > 30. 867 */ 868#define BRIDGE_INVALID_SRC_RING 0x2000 /* SOURCE_RING number zero, too large 869 * or = TARGET_RING. 870 */ 871#define BRIDGE_INVALID_TRG_RING 0x1000 /* TARGET_RING number zero, too large 872 * or = SOURCE_RING. 873 */ 874#define BRIDGE_INVALID_BRDGE_NO 0x0800 /* BRIDGE_NUMBER too large. */ 875#define BRIDGE_INVALID_OPTIONS 0x0400 /* Invalid bridge options. */ 876#define BRIDGE_DIAGS_FAILED 0x0200 /* Diagnostics of TMS380SRA failed. */ 877#define BRIDGE_NO_SRA 0x0100 /* The TMS380SRA does not exist in HW 878 * configuration. 879 */ 880 881/* 882 * Bring Up Diagnostics error codes. 883 */ 884#define BUD_INITIAL_ERROR 0x0 885#define BUD_CHECKSUM_ERROR 0x1 886#define BUD_ADAPTER_RAM_ERROR 0x2 887#define BUD_INSTRUCTION_ERROR 0x3 888#define BUD_CONTEXT_ERROR 0x4 889#define BUD_PROTOCOL_ERROR 0x5 890#define BUD_INTERFACE_ERROR 0x6 891 892/* BUD constants */ 893#define BUD_MAX_RETRIES 3 894#define BUD_MAX_LOOPCNT 6 895#define BUD_TIMEOUT 3000 896 897/* Initialization constants */ 898#define INIT_MAX_RETRIES 3 /* Maximum three retries. */ 899#define INIT_MAX_LOOPCNT 22 /* Maximum loop counts. */ 900 901/* RING STATUS field values (high/low) */ 902#define SIGNAL_LOSS 0x0080 /* Loss of signal on the ring 903 * detected. 904 */ 905#define HARD_ERROR 0x0040 /* Transmitting or receiving beacon 906 * frames. 907 */ 908#define SOFT_ERROR 0x0020 /* Report error MAC frame 909 * transmitted. 910 */ 911#define TRANSMIT_BEACON 0x0010 /* Transmitting beacon frames on the 912 * ring. 913 */ 914#define LOBE_WIRE_FAULT 0x0008 /* Open or short circuit in the 915 * cable to concentrator; adapter 916 * closed. 917 */ 918#define AUTO_REMOVAL_ERROR 0x0004 /* Lobe wrap test failed, deinserted; 919 * adapter closed. 920 */ 921#define REMOVE_RECEIVED 0x0001 /* Received a remove ring station MAC 922 * MAC frame request; adapter closed. 923 */ 924#define COUNTER_OVERFLOW 0x8000 /* Overflow of one of the adapters 925 * error counters; READ.ERROR.LOG. 926 */ 927#define SINGLE_STATION 0x4000 /* Adapter is the only station on the 928 * ring. 929 */ 930#define RING_RECOVERY 0x2000 /* Claim token MAC frames on the ring; 931 * reset after ring purge frame. 932 */ 933 934#define ADAPTER_CLOSED (LOBE_WIRE_FAULT | AUTO_REMOVAL_ERROR |\ 935 REMOVE_RECEIVED) 936 937/* Adapter_check_block.Status field bit assignments: */ 938#define DIO_PARITY 0x8000 /* Adapter detects bad parity 939 * through direct I/O access. 940 */ 941#define DMA_READ_ABORT 0x4000 /* Aborting DMA read operation 942 * from system Parm[0]: 0=timeout, 943 * 1=parity error, 2=bus error; 944 * Parm[1]: 32 bit pointer to host 945 * system address at failure. 946 */ 947#define DMA_WRITE_ABORT 0x2000 /* Aborting DMA write operation 948 * to system. (parameters analogous to 949 * DMA_READ_ABORT) 950 */ 951#define ILLEGAL_OP_CODE 0x1000 /* Illegal operation code in the 952 * the adapters firmware Parm[0]-2: 953 * communications processor registers 954 * R13-R15. 955 */ 956#define PARITY_ERRORS 0x0800 /* Adapter detects internal bus 957 * parity error. 958 */ 959#define RAM_DATA_ERROR 0x0080 /* Valid only during RAM testing; 960 * RAM data error Parm[0-1]: 32 bit 961 * pointer to RAM location. 962 */ 963#define RAM_PARITY_ERROR 0x0040 /* Valid only during RAM testing; 964 * RAM parity error Parm[0-1]: 32 bit 965 * pointer to RAM location. 966 */ 967#define RING_UNDERRUN 0x0020 /* Internal DMA underrun when 968 * transmitting onto ring. 969 */ 970#define INVALID_IRQ 0x0008 /* Unrecognized interrupt generated 971 * internal to adapter Parm[0-2]: 972 * adapter register R13-R15. 973 */ 974#define INVALID_ERROR_IRQ 0x0004 /* Unrecognized error interrupt 975 * generated Parm[0-2]: adapter register 976 * R13-R15. 977 */ 978#define INVALID_XOP 0x0002 /* Unrecognized XOP request in 979 * communication processor Parm[0-2]: 980 * adapter register R13-R15. 981 */ 982#define CHECKADDR 0x05E0 /* Adapter check status information 983 * address offset. 984 */ 985#define ROM_PAGE_0 0x0000 /* Adapter ROM page 0. */ 986 987/* 988 * RECEIVE.STATUS interrupt result SSB values: (high-low) 989 * (RECEIVE_COMPLETE field bit definitions in SSB.Parm[0]) 990 */ 991#define RX_COMPLETE 0x0080 /* SSB.Parm[0]; SSB.Parm[1]: 32 992 * bit pointer to last RPL. 993 */ 994#define RX_SUSPENDED 0x0040 /* SSB.Parm[0]; SSB.Parm[1]: 32 995 * bit pointer to RPL with odd 996 * forward pointer. 997 */ 998 999/* Valid receive CSTAT: */ 1000#define RX_FRAME_CONTROL_BITS (RX_VALID | RX_START_FRAME | RX_END_FRAME | \
1001 RX_FRAME_COMPLETE) 1002#define VALID_SINGLE_BUFFER_FRAME (RX_START_FRAME | RX_END_FRAME | \ 1003 RX_FRAME_COMPLETE) 1004 1005typedef enum SKB_STAT SKB_STAT; 1006enum SKB_STAT { 1007 SKB_UNAVAILABLE, 1008 SKB_DMA_DIRECT, 1009 SKB_DATA_COPY 1010}; 1011 1012/* Receive Parameter List (RPL) The length of the RPLs has to be initialized 1013 * in the OPL. (OPEN parameter list) 1014 */ 1015#define RPL_NUM 3 1016 1017#define RX_FRAG_NUM 1 /* Maximal number of used fragments in one RPL. 1018 * (up to firmware v2.24: 3, now: up to 9) 1019 */ 1020 1021#pragma pack(1) 1022typedef struct s_RPL RPL; 1023struct s_RPL { /* Receive Parameter List */ 1024 __be32 NextRPLAddr; /* Pointer to next RPL in chain 1025 * (normalized = physical 32 bit 1026 * address) if pointer is odd: this 1027 * is last RPL. Pointing to itself can 1028 * cause problems! 1029 */ 1030 volatile u_int16_t Status; /* Set by creation of Receive Parameter 1031 * List RECEIVE_CSTAT_COMPLETE set by 1032 * adapter in lists that start or end 1033 * a frame. 1034 */ 1035 volatile __be16 FrameSize; /* Number of bytes received as a 1036 * frame including AC/FC, Destination, 1037 * Source, Routing field not including 1038 * CRC, FS (Frame Status), End Delimiter 1039 * (valid only if START_FRAME bit in 1040 * CSTAT nonzero) must not be zero in 1041 * any list; maximum value: (BUFFER_SIZE 1042 * - 8) * TX_BUF_MAX sum of DataCount 1043 * values in FragmentList must equal 1044 * Frame_Size value in START_FRAME TPL! 1045 * frame data fragment list 1046 */ 1047 1048 /* TPL/RPL size in OPEN parameter list depending on maximal numbers 1049 * of fragments used in one parameter list. 1050 */ 1051 Fragment FragList[RX_FRAG_NUM]; /* Maximum: nine frame fragments in 1052 * one TPL. Actual version of firmware: 1053 * 9 fragments possible. 1054 */ 1055#pragma pack() 1056 1057 /* Special proprietary data and precalculations. */ 1058 RPL *NextRPLPtr; /* Logical pointer to next RPL in chain. */ 1059 unsigned char *MData; 1060 struct sk_buff *Skb; 1061 SKB_STAT SkbStat; 1062 int RPLIndex; 1063 dma_addr_t DMABuff; /* DMA IO bus address from dma_map */ 1064}; 1065 1066/* Information that need to be kept for each board. */ 1067typedef struct net_local { 1068#pragma pack(1) 1069 IPB ipb; /* Initialization Parameter Block. */ 1070 SCB scb; /* System Command Block: system to adapter 1071 * communication. 1072 */ 1073 SSB ssb; /* System Status Block: adapter to system 1074 * communication. 1075 */ 1076 OPB ocpl; /* Open Options Parameter Block. */ 1077 1078 ERRORTAB errorlogtable; /* Adapter statistic error counters. 1079 * (read from adapter memory) 1080 */ 1081 unsigned char ProductID[PROD_ID_SIZE + 1]; /* Product ID */ 1082#pragma pack() 1083 1084 TPL Tpl[TPL_NUM]; 1085 TPL *TplFree; 1086 TPL *TplBusy; 1087 unsigned char LocalTxBuffers[TPL_NUM][DEFAULT_PACKET_SIZE]; 1088 1089 RPL Rpl[RPL_NUM]; 1090 RPL *RplHead; 1091 RPL *RplTail; 1092 unsigned char LocalRxBuffers[RPL_NUM][DEFAULT_PACKET_SIZE]; 1093 1094 struct device *pdev; 1095 int DataRate; 1096 unsigned char ScbInUse; 1097 unsigned short CMDqueue; 1098 1099 unsigned long AdapterOpenFlag:1; 1100 unsigned long AdapterVirtOpenFlag:1; 1101 unsigned long OpenCommandIssued:1; 1102 unsigned long TransmitCommandActive:1; 1103 unsigned long TransmitHaltScheduled:1; 1104 unsigned long HaltInProgress:1; 1105 unsigned long LobeWireFaultLogged:1; 1106 unsigned long ReOpenInProgress:1; 1107 unsigned long Sleeping:1; 1108 1109 unsigned long LastOpenStatus; 1110 unsigned short CurrentRingStatus; 1111 unsigned long MaxPacketSize; 1112 1113 unsigned long StartTime; 1114 unsigned long LastSendTime; 1115 1116 struct tr_statistics MacStat; /* MAC statistics structure */ 1117 1118 unsigned long dmalimit; /* the max DMA address (ie, ISA) */ 1119 dma_addr_t dmabuffer; /* the DMA bus address corresponding to 1120 priv. Might be different from virt_to_bus() 1121 for architectures with IO MMU (Alpha) */ 1122 1123 struct timer_list timer; 1124 1125 wait_queue_head_t wait_for_tok_int; 1126 1127 INTPTRS intptrs; /* Internal adapter pointer. Must be read 1128 * before OPEN command. 1129 */ 1130 unsigned short (*setnselout)(struct net_device *); 1131 unsigned short (*sifreadb)(struct net_device *, unsigned short); 1132 void (*sifwriteb)(struct net_device *, unsigned short, unsigned short); 1133 unsigned short (*sifreadw)(struct net_device *, unsigned short); 1134 void (*sifwritew)(struct net_device *, unsigned short, unsigned short); 1135 1136 spinlock_t lock; /* SMP protection */ 1137 void *tmspriv; 1138} NET_LOCAL; 1139 1140#endif /* __KERNEL__ */ 1141#endif /* __LINUX_TMS380TR_H */ 1142